FR2413752A1 - Tampon d'instructions associe a une unite d'antememoire - Google Patents

Tampon d'instructions associe a une unite d'antememoire

Info

Publication number
FR2413752A1
FR2413752A1 FR7835609A FR7835609A FR2413752A1 FR 2413752 A1 FR2413752 A1 FR 2413752A1 FR 7835609 A FR7835609 A FR 7835609A FR 7835609 A FR7835609 A FR 7835609A FR 2413752 A1 FR2413752 A1 FR 2413752A1
Authority
FR
France
Prior art keywords
unit
data
antememory
groups
central processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7835609A
Other languages
English (en)
French (fr)
Other versions
FR2413752B3 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull HN Information Systems Italia SpA
Bull HN Information Systems Inc
Original Assignee
Honeywell Information Systems Italia SpA
Honeywell Information Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Information Systems Italia SpA, Honeywell Information Systems Inc filed Critical Honeywell Information Systems Italia SpA
Publication of FR2413752A1 publication Critical patent/FR2413752A1/fr
Application granted granted Critical
Publication of FR2413752B3 publication Critical patent/FR2413752B3/fr
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3804—Instruction prefetching for branches, e.g. hedging, branch folding

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Advance Control (AREA)
FR7835609A 1977-12-30 1978-12-18 Tampon d'instructions associe a une unite d'antememoire Granted FR2413752A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US86608377A 1977-12-30 1977-12-30

Publications (2)

Publication Number Publication Date
FR2413752A1 true FR2413752A1 (fr) 1979-07-27
FR2413752B3 FR2413752B3 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1981-10-16

Family

ID=25346880

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7835609A Granted FR2413752A1 (fr) 1977-12-30 1978-12-18 Tampon d'instructions associe a une unite d'antememoire

Country Status (5)

Country Link
JP (1) JPS5494841A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
AU (1) AU529675B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
DE (1) DE2856680A1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
FR (1) FR2413752A1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
GB (1) GB2011682B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2072905B (en) * 1978-12-11 1983-08-03 Honeywell Inf Systems Data-processing apparatus
DE2934771C3 (de) * 1979-08-28 1982-03-25 Siemens AG, 1000 Berlin und 8000 München Speichervorrichtung.
FR2479532B1 (fr) * 1980-04-01 1986-09-19 Bull Sa Procede et dispositif pour gerer les transferts d'informations entre un ensemble memoire et les differentes unites de traitement d'un systeme de traitement numerique de l'information
US4742451A (en) * 1984-05-21 1988-05-03 Digital Equipment Corporation Instruction prefetch system for conditional branch instruction for central processor unit
US4775927A (en) * 1984-10-31 1988-10-04 International Business Machines Corporation Processor including fetch operation for branch instruction with control tag
JPS6168641A (ja) * 1985-09-17 1986-04-09 Hitachi Ltd 情報処理装置
EP0264077A3 (en) * 1986-10-14 1991-01-30 Honeywell Bull Inc. Buffer address register
JPH0769812B2 (ja) * 1987-12-29 1995-07-31 富士通株式会社 データ処理装置
US4974155A (en) * 1988-08-15 1990-11-27 Evans & Sutherland Computer Corp. Variable delay branch system
US5127091A (en) * 1989-01-13 1992-06-30 International Business Machines Corporation System for reducing delay in instruction execution by executing branch instructions in separate processor while dispatching subsequent instructions to primary processor
JPH0421129A (ja) * 1990-05-16 1992-01-24 Nec Corp 命令キャッシュ装置
JP3333196B2 (ja) * 1991-07-08 2002-10-07 セイコーエプソン株式会社 トラップ処理方法
US5539911A (en) 1991-07-08 1996-07-23 Seiko Epson Corporation High-performance, superscalar-based computer system with out-of-order instruction execution
US5961629A (en) * 1991-07-08 1999-10-05 Seiko Epson Corporation High performance, superscalar-based computer system with out-of-order instruction execution
DE69233493T2 (de) * 1991-07-08 2005-07-28 Seiko Epson Corp. RISC-Prozessor mit erweiterbarer Architektur
US5438668A (en) 1992-03-31 1995-08-01 Seiko Epson Corporation System and method for extraction, alignment and decoding of CISC instructions into a nano-instruction bucket for execution by a RISC computer
WO1994008287A1 (en) 1992-09-29 1994-04-14 Seiko Epson Corporation System and method for handling load and/or store operations in a superscalar microprocessor
US6735685B1 (en) 1992-09-29 2004-05-11 Seiko Epson Corporation System and method for handling load and/or store operations in a superscalar microprocessor
DE19546882C2 (de) * 1995-12-15 1998-11-26 Webasto Thermosysteme Gmbh Fahrzeugheizgerät
US6256727B1 (en) * 1998-05-12 2001-07-03 International Business Machines Corporation Method and system for fetching noncontiguous instructions in a single clock cycle

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5021821B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1968-10-31 1975-07-25
JPS51138355A (en) * 1975-05-26 1976-11-29 Hitachi Ltd Processing apparatus with a high speed branching feature
JPS5282149A (en) * 1975-12-29 1977-07-09 Fujitsu Ltd Instruction address control system
CA1116756A (en) * 1977-12-16 1982-01-19 Charles P. Ryan Cache memory command circuit

Also Published As

Publication number Publication date
DE2856680C2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1990-05-17
DE2856680A1 (de) 1979-08-23
GB2011682B (en) 1982-04-21
AU4247078A (en) 1979-07-05
GB2011682A (en) 1979-07-11
AU529675B2 (en) 1983-06-16
FR2413752B3 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1981-10-16
JPS5494841A (en) 1979-07-26

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