GB2011682B - Instructin buffer in computer - Google Patents

Instructin buffer in computer

Info

Publication number
GB2011682B
GB2011682B GB7850151A GB7850151A GB2011682B GB 2011682 B GB2011682 B GB 2011682B GB 7850151 A GB7850151 A GB 7850151A GB 7850151 A GB7850151 A GB 7850151A GB 2011682 B GB2011682 B GB 2011682B
Authority
GB
United Kingdom
Prior art keywords
instructin
buffer
computer
instructin buffer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB7850151A
Other versions
GB2011682A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull HN Information Systems Italia SpA
Bull HN Information Systems Inc
Original Assignee
Honeywell Information Systems Italia SpA
Honeywell Information Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Information Systems Italia SpA, Honeywell Information Systems Inc filed Critical Honeywell Information Systems Italia SpA
Publication of GB2011682A publication Critical patent/GB2011682A/en
Application granted granted Critical
Publication of GB2011682B publication Critical patent/GB2011682B/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3804—Instruction prefetching for branches, e.g. hedging, branch folding

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Advance Control (AREA)
GB7850151A 1977-12-30 1978-12-28 Instructin buffer in computer Expired GB2011682B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US86608377A 1977-12-30 1977-12-30

Publications (2)

Publication Number Publication Date
GB2011682A GB2011682A (en) 1979-07-11
GB2011682B true GB2011682B (en) 1982-04-21

Family

ID=25346880

Family Applications (1)

Application Number Title Priority Date Filing Date
GB7850151A Expired GB2011682B (en) 1977-12-30 1978-12-28 Instructin buffer in computer

Country Status (5)

Country Link
JP (1) JPS5494841A (en)
AU (1) AU529675B2 (en)
DE (1) DE2856680A1 (en)
FR (1) FR2413752A1 (en)
GB (1) GB2011682B (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6230254B1 (en) 1992-09-29 2001-05-08 Seiko Epson Corporation System and method for handling load and/or store operators in a superscalar microprocessor
US6434693B1 (en) 1992-09-29 2002-08-13 Seiko Epson Corporation System and method for handling load and/or store operations in a superscalar microprocessor
US7721070B2 (en) 1991-07-08 2010-05-18 Le Trong Nguyen High-performance, superscalar-based computer system with out-of-order instruction execution

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2037037B (en) * 1978-12-11 1983-07-27 Honeywell Inf Systems Data-processing apparatus
DE2934771C3 (en) * 1979-08-28 1982-03-25 Siemens AG, 1000 Berlin und 8000 München Storage device.
FR2479532B1 (en) * 1980-04-01 1986-09-19 Bull Sa METHOD AND DEVICE FOR MANAGING THE TRANSFER OF INFORMATION BETWEEN A MEMORY SET AND THE DIFFERENT PROCESSING UNITS OF A DIGITAL INFORMATION PROCESSING SYSTEM
US4742451A (en) * 1984-05-21 1988-05-03 Digital Equipment Corporation Instruction prefetch system for conditional branch instruction for central processor unit
US4775927A (en) * 1984-10-31 1988-10-04 International Business Machines Corporation Processor including fetch operation for branch instruction with control tag
JPS6168641A (en) * 1985-09-17 1986-04-09 Hitachi Ltd Information processor
EP0264077A3 (en) * 1986-10-14 1991-01-30 Honeywell Bull Inc. Buffer address register
JPH0769812B2 (en) * 1987-12-29 1995-07-31 富士通株式会社 Data processing device
US4974155A (en) * 1988-08-15 1990-11-27 Evans & Sutherland Computer Corp. Variable delay branch system
US5127091A (en) * 1989-01-13 1992-06-30 International Business Machines Corporation System for reducing delay in instruction execution by executing branch instructions in separate processor while dispatching subsequent instructions to primary processor
JPH0421129A (en) * 1990-05-16 1992-01-24 Nec Corp Instruction cache device
EP0547247B1 (en) 1991-07-08 2001-04-04 Seiko Epson Corporation Extensible risc microprocessor architecture
DE69230554T2 (en) * 1991-07-08 2000-07-06 Seiko Epson Corp RISC MICROPROCESSOR ARCHITECTURE WITH FAST INTERRUPT AND EXCEPTION MODE
US5961629A (en) * 1991-07-08 1999-10-05 Seiko Epson Corporation High performance, superscalar-based computer system with out-of-order instruction execution
US5438668A (en) * 1992-03-31 1995-08-01 Seiko Epson Corporation System and method for extraction, alignment and decoding of CISC instructions into a nano-instruction bucket for execution by a RISC computer
DE19546882C2 (en) * 1995-12-15 1998-11-26 Webasto Thermosysteme Gmbh Vehicle heater
US6256727B1 (en) * 1998-05-12 2001-07-03 International Business Machines Corporation Method and system for fetching noncontiguous instructions in a single clock cycle

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5021821B1 (en) * 1968-10-31 1975-07-25
JPS51138355A (en) * 1975-05-26 1976-11-29 Hitachi Ltd Processing apparatus with a high speed branching feature
JPS5282149A (en) * 1975-12-29 1977-07-09 Fujitsu Ltd Instruction address control system
FR2412139B1 (en) * 1977-12-16 1986-05-09 Honeywell Inf Systems ANTEMEMORY GUIDELINES CIRCUITS

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7721070B2 (en) 1991-07-08 2010-05-18 Le Trong Nguyen High-performance, superscalar-based computer system with out-of-order instruction execution
US7739482B2 (en) 1991-07-08 2010-06-15 Seiko Epson Corporation High-performance, superscalar-based computer system with out-of-order instruction execution
US6230254B1 (en) 1992-09-29 2001-05-08 Seiko Epson Corporation System and method for handling load and/or store operators in a superscalar microprocessor
US6434693B1 (en) 1992-09-29 2002-08-13 Seiko Epson Corporation System and method for handling load and/or store operations in a superscalar microprocessor

Also Published As

Publication number Publication date
DE2856680A1 (en) 1979-08-23
DE2856680C2 (en) 1990-05-17
GB2011682A (en) 1979-07-11
AU529675B2 (en) 1983-06-16
FR2413752B3 (en) 1981-10-16
FR2413752A1 (en) 1979-07-27
AU4247078A (en) 1979-07-05
JPS5494841A (en) 1979-07-26

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Legal Events

Date Code Title Description
PE20 Patent expired after termination of 20 years

Effective date: 19981227