JPS56127228A - Bootstrap controller - Google Patents

Bootstrap controller

Info

Publication number
JPS56127228A
JPS56127228A JP3008080A JP3008080A JPS56127228A JP S56127228 A JPS56127228 A JP S56127228A JP 3008080 A JP3008080 A JP 3008080A JP 3008080 A JP3008080 A JP 3008080A JP S56127228 A JPS56127228 A JP S56127228A
Authority
JP
Japan
Prior art keywords
program
code
controller
processors
arithmetic processors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3008080A
Other languages
Japanese (ja)
Inventor
Yasuhiro Watanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP3008080A priority Critical patent/JPS56127228A/en
Publication of JPS56127228A publication Critical patent/JPS56127228A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/4401—Bootstrapping

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)

Abstract

PURPOSE:To realize common use of an input/output device by plural units of arithmetic processors and furthermore secure a loading of different programs, by transferring the number that identifies the different programs from plural arithmetic processors. CONSTITUTION:Each of arithmetic processors A1-An has a function to transfer the device number 1, control code 2 and identifying number 3 that selects the program to be stored in the storage device D to the controller C of an input/output device Z. When the key K is pushed in either one of processors A1-An, a loading or program is interpreted. Thus the timing circuit T works to produce the signals T1-T3, and then sends successively the number 1, code 2 and number 3 stored in the registers R1-R3 to the transfer line B via the gates G1-G3. The controller C receives the data sent by the timing signals T1-T3 to compare it with the number 1 and the set device number. If a coincidence is obtained, a request to the device Z is decided. Thus a reading request is given to the memory device D via the number 3 for selection of the program as well as the code 2.
JP3008080A 1980-03-10 1980-03-10 Bootstrap controller Pending JPS56127228A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3008080A JPS56127228A (en) 1980-03-10 1980-03-10 Bootstrap controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3008080A JPS56127228A (en) 1980-03-10 1980-03-10 Bootstrap controller

Publications (1)

Publication Number Publication Date
JPS56127228A true JPS56127228A (en) 1981-10-05

Family

ID=12293811

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3008080A Pending JPS56127228A (en) 1980-03-10 1980-03-10 Bootstrap controller

Country Status (1)

Country Link
JP (1) JPS56127228A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01152581A (en) * 1987-12-10 1989-06-15 Canon Inc Picture information processor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01152581A (en) * 1987-12-10 1989-06-15 Canon Inc Picture information processor

Similar Documents

Publication Publication Date Title
IL43641A (en) Programmable processor
US3337854A (en) Multi-processor using the principle of time-sharing
ES458222A1 (en) Common polling logic for input/output interrupt or cycle steal data transfer requests
CN1010259B (en) Distributed control store word architecture
US3411147A (en) Apparatus for executing halt instructions in a multi-program processor
EP0331191A3 (en) Information processing system capable of carrying out advanced execution
US3480917A (en) Arrangement for transferring between program sequences in a data processor
JPS56127228A (en) Bootstrap controller
US3958223A (en) Expandable data storage in a calculator system
ES315571A1 (en) A data processing machine. (Machine-translation by Google Translate, not legally binding)
SU1536391A1 (en) Device for information input
JPS57161938A (en) Instruction control system
SU458814A1 (en) Centralized program management system
FR2357468A1 (en) Automatic lift control microprocessor - has internal time reference for program store and LF time generator for data logger access(NL050477)
SU474806A1 (en) Firmware device with c-value coding
GB920483A (en) Improvements in or relating to computers
JPS5583960A (en) Paragraph associater
SU1280639A1 (en) Device for loading data
SU614432A1 (en) Telemechanics system-computer interfage
ES396697A1 (en) Improvements introduced in devices to reduce the inactive burden or sleeping time of the central unit of a calculator that works in real time. (Machine-translation by Google Translate, not legally binding)
SU1103236A1 (en) Data loding device
SU523438A1 (en) Device for reducing redundancy of information
JPS5688563A (en) Vector register control system
JPS5746389A (en) Refresh control system
JPS5585965A (en) Microprogram branch system