FR2411467A1 - Memoire tampon d'informations du type " file d'attente " comportant une entree variable et une sortie fixe - Google Patents

Memoire tampon d'informations du type " file d'attente " comportant une entree variable et une sortie fixe

Info

Publication number
FR2411467A1
FR2411467A1 FR7834812A FR7834812A FR2411467A1 FR 2411467 A1 FR2411467 A1 FR 2411467A1 FR 7834812 A FR7834812 A FR 7834812A FR 7834812 A FR7834812 A FR 7834812A FR 2411467 A1 FR2411467 A1 FR 2411467A1
Authority
FR
France
Prior art keywords
buffer
information
waiting queue
buffer memory
variable input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7834812A
Other languages
English (en)
French (fr)
Other versions
FR2411467B1 (enExample
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Publication of FR2411467A1 publication Critical patent/FR2411467A1/fr
Application granted granted Critical
Publication of FR2411467B1 publication Critical patent/FR2411467B1/fr
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Image Input (AREA)
  • Communication Control (AREA)
  • Logic Circuits (AREA)
  • Medicines That Contain Protein Lipid Enzymes And Other Medicines (AREA)
FR7834812A 1977-12-12 1978-12-11 Memoire tampon d'informations du type " file d'attente " comportant une entree variable et une sortie fixe Granted FR2411467A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL7713707A NL7713707A (nl) 1977-12-12 1977-12-12 Informatiebuffergeheugen van het "eerst-in, eerst-uit" type met variabele ingang en vaste uitgang.

Publications (2)

Publication Number Publication Date
FR2411467A1 true FR2411467A1 (fr) 1979-07-06
FR2411467B1 FR2411467B1 (enExample) 1985-01-18

Family

ID=19829732

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7834812A Granted FR2411467A1 (fr) 1977-12-12 1978-12-11 Memoire tampon d'informations du type " file d'attente " comportant une entree variable et une sortie fixe

Country Status (9)

Country Link
US (1) US4236225A (enExample)
JP (1) JPS5920139B2 (enExample)
CA (1) CA1122329A (enExample)
DE (1) DE2853239A1 (enExample)
FR (1) FR2411467A1 (enExample)
GB (1) GB2009984B (enExample)
IT (1) IT1101479B (enExample)
NL (1) NL7713707A (enExample)
SE (2) SE437581B (enExample)

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4437166A (en) 1980-12-23 1984-03-13 Sperry Corporation High speed byte shifter for a bi-directional data bus
JPS57164331A (en) * 1981-04-02 1982-10-08 Nec Corp Buffer controller
JPS57185492A (en) * 1981-05-11 1982-11-15 Matsushita Electric Industrial Co Ltd Data latch circuit
JPS58220293A (ja) * 1982-06-15 1983-12-21 Nec Corp 記憶装置
US4510581A (en) * 1983-02-14 1985-04-09 Prime Computer, Inc. High speed buffer allocation apparatus
US4930102A (en) * 1983-04-29 1990-05-29 The Regents Of The University Of California Dynamic activity-creating data-driven computer architecture
JPS59226923A (ja) * 1983-05-27 1984-12-20 インタ−ナシヨナル ビジネス マシ−ンズ コ−ポレ−シヨン バスインタ−フエ−ス装置
US4598363A (en) * 1983-07-07 1986-07-01 At&T Bell Laboratories Adaptive delayed polling of sensors
US4592019A (en) * 1983-08-31 1986-05-27 At&T Bell Laboratories Bus oriented LIFO/FIFO memory
FR2552916B1 (fr) * 1983-09-29 1988-06-10 Thomas Alain File d'attente asynchrone a empilement de registres
AU575351B2 (en) * 1983-11-07 1988-07-28 Digital Equipment Corporation Data processing system
US5038277A (en) * 1983-11-07 1991-08-06 Digital Equipment Corporation Adjustable buffer for data communications in a data processing system
US4764894A (en) * 1985-01-16 1988-08-16 Varian Associates, Inc. Multiple FIFO NMR acquisition system
US4833655A (en) * 1985-06-28 1989-05-23 Wang Laboratories, Inc. FIFO memory with decreased fall-through delay
NL8502023A (nl) * 1985-07-15 1987-02-02 Philips Nv Werkwijze voor het schakelen van tijdsloten in een tdm-signaal en inrichting voor het uitvoeren van de werkwijze.
US4672646A (en) * 1986-09-16 1987-06-09 Hewlett-Packard Company Direct-injection FIFO shift register
US4847812A (en) * 1986-09-18 1989-07-11 Advanced Micro Devices FIFO memory device including circuit for generating flag signals
US4995005A (en) * 1986-09-18 1991-02-19 Advanced Micro Devices, Inc. Memory device which can function as two separate memories or a single memory
JPS648732A (en) * 1987-06-30 1989-01-12 Sharp Kk Digital serial/parallel converter
US5115496A (en) * 1988-01-26 1992-05-19 Nec Corporation Queue device capable of quickly transferring a digital signal unit of a word length different from a single word length
JP2764908B2 (ja) * 1988-02-04 1998-06-11 日本電気株式会社 カスケード・バッファ回路
JP2576616B2 (ja) * 1988-12-29 1997-01-29 カシオ計算機株式会社 処理装置
JPH0391188A (ja) * 1989-09-04 1991-04-16 Matsushita Electric Ind Co Ltd Fifoメモリ
US5095462A (en) * 1990-05-25 1992-03-10 Advanced Micro Devices, Inc. Fifo information storage apparatus including status and logic modules for each cell
US5412611A (en) * 1992-03-17 1995-05-02 Fujitsu, Limited FIFO memory device capable of writing contiguous data into rows
US5513224A (en) * 1993-09-16 1996-04-30 Codex, Corp. Fill level indicator for self-timed fifo
WO1997003444A1 (en) * 1995-07-10 1997-01-30 Xilinx, Inc. System comprising field programmable gate array and intelligent memory
JP2001505752A (ja) 1997-08-20 2001-04-24 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ 複数のレベルのハウスキーピングに適合されたソフトウェアマネジメントを備える一時データストリーム処理バッファメモリ編成
JP4841314B2 (ja) * 2006-05-29 2011-12-21 川崎マイクロエレクトロニクス株式会社 データ転送回路
JP6568560B2 (ja) 2017-09-15 2019-08-28 株式会社Subaru 車両の走行制御装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1507949A (fr) * 1966-01-15 1967-12-29 Philips Nv Registre tampon
US3646526A (en) * 1970-03-17 1972-02-29 Us Army Fifo shift register memory with marker and data bit storage
US3781821A (en) * 1972-06-02 1973-12-25 Ibm Selective shift register

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL7014737A (enExample) * 1970-10-08 1972-04-11
GB1289249A (enExample) * 1971-05-05 1972-09-13
US3942163A (en) * 1974-06-21 1976-03-02 Burroughs Corporation CCD stack memory organization
US3953838A (en) * 1974-12-30 1976-04-27 Burroughs Corporation FIFO Buffer register memory utilizing a one-shot data transfer system
JPS5247638A (en) * 1975-10-15 1977-04-15 Toshiba Corp Information processing device
US4095283A (en) * 1976-07-02 1978-06-13 International Business Machines Corporation First in-first out memory array containing special bits for replacement addressing

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1507949A (fr) * 1966-01-15 1967-12-29 Philips Nv Registre tampon
US3646526A (en) * 1970-03-17 1972-02-29 Us Army Fifo shift register memory with marker and data bit storage
US3781821A (en) * 1972-06-02 1973-12-25 Ibm Selective shift register

Also Published As

Publication number Publication date
IT7830681A0 (it) 1978-12-07
CA1122329A (en) 1982-04-20
GB2009984A (en) 1979-06-20
NL7713707A (nl) 1979-06-14
GB2009984B (en) 1982-01-27
DE2853239A1 (de) 1979-06-13
DE2853239C2 (enExample) 1989-02-02
SE437581B (sv) 1985-03-04
JPS5489439A (en) 1979-07-16
FR2411467B1 (enExample) 1985-01-18
JPS5920139B2 (ja) 1984-05-11
SE7812716L (sv) 1979-06-13
US4236225A (en) 1980-11-25
IT1101479B (it) 1985-09-28

Similar Documents

Publication Publication Date Title
FR2411467A1 (fr) Memoire tampon d'informations du type " file d'attente " comportant une entree variable et une sortie fixe
FR2411466A1 (fr) Memoire tampon d'informations du type " file d'attente " comportant une entree variable et une sortie variable
FR2411468A1 (fr) Memoire tampon d'informations du type " file d'attente " comportant une entree fixe et une sortie variable
FR2355335A1 (fr) Adaptateur d'interface d'epreuve commandee a distance
FR2440657A1 (fr) Perfectionnement aux reseaux logiques programmables a fonctions multiples
BR8507112A (pt) Sistema para reparticao de prioridade entre computadores cooperantes
FR2472778B1 (fr) Dispositif de transfert d'informations a un multiplexeur d'entree/sortie dans un systeme de traitement de donnees
FR2412910A1 (fr) Systeme de traitement de donnees a memoires hierarchisees, applicable notamment aux mini-ordinateurs
Itard James Gow, A short History of Greek Mathematics, nouveau tirage
SU1619252A1 (ru) Устройство дл обработки нечеткой информации
JPS57108905A (en) Synchronous queuing system for machine tool with plural movable members
SU970698A1 (ru) Сенсорна клавиатура
SLOTNICK Research in the design of high-performance reconfigurable systems(Semiannual Status Report, 1 Apr.- 30 Sep. 1985)
SU881736A1 (ru) Устройство дл поиска чисел в заданном диапазоне
SU1005010A1 (ru) Таймер
SU847506A1 (ru) Селектор одиночных импульсов
SU964638A1 (ru) Многоканальное устройство приоритета
SU496547A1 (ru) Устройство дл управлени промышленным производством
BE866417A (fr) Dispositif pour diriger un train d'informations d'entree vers plusieurs branches de traitement d'informations de sortie
SU400034A1 (ru) УСТРОЙСТВО дл УПРАВЛЕНИЯ РЕВЕРСИВНЫМ СЧЕТЧИКОМ
Petit Leitourgia Papyri. Documents on compulsory public Service in Egypt under Roman Rule. Ed. by Naphtali Lewis (Transactions of the American Philosophical Society, held at Philadelphia for promoting useful Knowledge. New Series, Vol. 53, Part 9. 1963)
SU1585805A1 (ru) Устройство дл определени экстремумов
SU1046719A1 (ru) Логический пробник
SU818017A1 (ru) Логическое устройство из
Dopp Arthur Schopenhauer, The World as Will and Representation. Translated from the German by AFJ Payne

Legal Events

Date Code Title Description
ST Notification of lapse