FR2401520A1 - Procede de realisation de dispositifs semiconducteurs a heterostructure et dispositifs en resultant - Google Patents

Procede de realisation de dispositifs semiconducteurs a heterostructure et dispositifs en resultant

Info

Publication number
FR2401520A1
FR2401520A1 FR7725680A FR7725680A FR2401520A1 FR 2401520 A1 FR2401520 A1 FR 2401520A1 FR 7725680 A FR7725680 A FR 7725680A FR 7725680 A FR7725680 A FR 7725680A FR 2401520 A1 FR2401520 A1 FR 2401520A1
Authority
FR
France
Prior art keywords
deposition
acceptor
formation
indium oxide
doped indium
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7725680A
Other languages
English (en)
Other versions
FR2401520B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Laboratoires dElectronique Philips SAS
Original Assignee
Laboratoires dElectronique et de Physique Appliquee
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Laboratoires dElectronique et de Physique Appliquee filed Critical Laboratoires dElectronique et de Physique Appliquee
Priority to FR7725680A priority Critical patent/FR2401520A1/fr
Publication of FR2401520A1 publication Critical patent/FR2401520A1/fr
Application granted granted Critical
Publication of FR2401520B1 publication Critical patent/FR2401520B1/fr
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251Diffusion into or out of group IV semiconductors
    • H01L21/2254Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H01L21/2255Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer comprising oxides only, e.g. P2O5, PSG, H3BO3, doped oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02565Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/0257Doping during depositing
    • H01L21/02573Conductivity type
    • H01L21/02576N-type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/0257Doping during depositing
    • H01L21/02573Conductivity type
    • H01L21/02579P-type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/26Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups H01L29/16, H01L29/18, H01L29/20, H01L29/22, H01L29/24, e.g. alloys
    • H01L29/267Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups H01L29/16, H01L29/18, H01L29/20, H01L29/22, H01L29/24, e.g. alloys in different semiconductor regions, e.g. heterojunctions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0224Electrodes
    • H01L31/022466Electrodes made of transparent conductive layers, e.g. TCO, ITO layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Electromagnetism (AREA)
  • Light Receiving Elements (AREA)

Abstract

L'invention est relative à la réalisation de dispositifs semiconducteurs, du type à hétérostructure, par dépôt d'une couche d'oxyde d'indium, dopé à l'étain, et contenant en outre diverses impuretés donatrices ou acceptrices d'électrons, sur un substrat semiconducteur, d'un type de conductivité; par simple chauffage, les impuretés diffusent de la couche d'oxyde dans le substrat, afin d'y former une homojonction. L'invention est remarquable en ce que la couche déposée est à la fois transparente, antiréflectrice, électroconductrice et dopante. L'invention apporte une simplification dans le procédé habituel de réalisation de tels dispositifs. Application : cellules solaires, photodiodes.
FR7725680A 1977-08-23 1977-08-23 Procede de realisation de dispositifs semiconducteurs a heterostructure et dispositifs en resultant Granted FR2401520A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR7725680A FR2401520A1 (fr) 1977-08-23 1977-08-23 Procede de realisation de dispositifs semiconducteurs a heterostructure et dispositifs en resultant

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7725680A FR2401520A1 (fr) 1977-08-23 1977-08-23 Procede de realisation de dispositifs semiconducteurs a heterostructure et dispositifs en resultant

Publications (2)

Publication Number Publication Date
FR2401520A1 true FR2401520A1 (fr) 1979-03-23
FR2401520B1 FR2401520B1 (fr) 1982-01-08

Family

ID=9194697

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7725680A Granted FR2401520A1 (fr) 1977-08-23 1977-08-23 Procede de realisation de dispositifs semiconducteurs a heterostructure et dispositifs en resultant

Country Status (1)

Country Link
FR (1) FR2401520A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2505556A1 (fr) * 1981-05-11 1982-11-12 Labo Electronique Physique Procede de fabrication de cellules solaires en silicium et cellules solaires ainsi obtenues

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2505556A1 (fr) * 1981-05-11 1982-11-12 Labo Electronique Physique Procede de fabrication de cellules solaires en silicium et cellules solaires ainsi obtenues

Also Published As

Publication number Publication date
FR2401520B1 (fr) 1982-01-08

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