FR2354001A1 - Circuit logique differentiel - Google Patents

Circuit logique differentiel

Info

Publication number
FR2354001A1
FR2354001A1 FR7716418A FR7716418A FR2354001A1 FR 2354001 A1 FR2354001 A1 FR 2354001A1 FR 7716418 A FR7716418 A FR 7716418A FR 7716418 A FR7716418 A FR 7716418A FR 2354001 A1 FR2354001 A1 FR 2354001A1
Authority
FR
France
Prior art keywords
delay time
propagation delay
compensator
range
deviation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7716418A
Other languages
English (en)
French (fr)
Other versions
FR2354001B1 (de
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of FR2354001A1 publication Critical patent/FR2354001A1/fr
Application granted granted Critical
Publication of FR2354001B1 publication Critical patent/FR2354001B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/086—Emitter coupled logic
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/086—Emitter coupled logic
    • H03K19/0866—Stacked emitter coupled logic

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Manipulation Of Pulses (AREA)
  • Pulse Circuits (AREA)
FR7716418A 1976-06-01 1977-05-27 Circuit logique differentiel Granted FR2354001A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US69193076A 1976-06-01 1976-06-01

Publications (2)

Publication Number Publication Date
FR2354001A1 true FR2354001A1 (fr) 1977-12-30
FR2354001B1 FR2354001B1 (de) 1980-02-01

Family

ID=24778554

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7716418A Granted FR2354001A1 (fr) 1976-06-01 1977-05-27 Circuit logique differentiel

Country Status (4)

Country Link
JP (1) JPS52147053A (de)
DE (1) DE2723386C3 (de)
FR (1) FR2354001A1 (de)
NL (1) NL173004B (de)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0220454A1 (de) * 1985-09-27 1987-05-06 Siemens Aktiengesellschaft Schaltungsanordnung zur Kompensation des Temperaturganges von Gatterlaufzeiten
EP0349824A2 (de) * 1988-06-30 1990-01-10 Fujitsu Limited IC mit einer Pegelumsetzungsschaltung

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS579134A (en) * 1980-06-18 1982-01-18 Nec Corp Logical circuit
DE3043358A1 (de) * 1980-11-17 1982-07-08 Siemens AG, 1000 Berlin und 8000 München Sendestufe zur erzeugung mehrstufiger digitaler signale hoher schrittgeschwindigkeit
JPS62222711A (ja) * 1986-03-11 1987-09-30 Fujitsu Ltd ラツチ回路

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL6700144A (de) * 1967-01-05 1968-07-08
US3522446A (en) * 1967-08-31 1970-08-04 Tokyo Shibaura Electric Co Current switching logic circuit
US3716722A (en) * 1970-04-29 1973-02-13 Cogar Corp Temperature compensation for logic circuits

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0220454A1 (de) * 1985-09-27 1987-05-06 Siemens Aktiengesellschaft Schaltungsanordnung zur Kompensation des Temperaturganges von Gatterlaufzeiten
US4758740A (en) * 1985-09-27 1988-07-19 Siemens Aktiengesellschaft Circuit for compensating the temperature dependence of gate transit times
EP0349824A2 (de) * 1988-06-30 1990-01-10 Fujitsu Limited IC mit einer Pegelumsetzungsschaltung
EP0349824A3 (de) * 1988-06-30 1990-07-25 Fujitsu Limited IC mit einer Pegelumsetzungsschaltung

Also Published As

Publication number Publication date
NL7705979A (nl) 1977-12-05
FR2354001B1 (de) 1980-02-01
JPS52147053A (en) 1977-12-07
DE2723386A1 (de) 1977-12-08
DE2723386C3 (de) 1981-08-13
DE2723386B2 (de) 1980-12-04
NL173004B (nl) 1983-06-16

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Legal Events

Date Code Title Description
ST Notification of lapse