FR2352449A1 - Dispositif logique a trois etats en technologie mos complementaire - Google Patents

Dispositif logique a trois etats en technologie mos complementaire

Info

Publication number
FR2352449A1
FR2352449A1 FR7614931A FR7614931A FR2352449A1 FR 2352449 A1 FR2352449 A1 FR 2352449A1 FR 7614931 A FR7614931 A FR 7614931A FR 7614931 A FR7614931 A FR 7614931A FR 2352449 A1 FR2352449 A1 FR 2352449A1
Authority
FR
France
Prior art keywords
circuit
transistors
transistor
logic circuit
stable states
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7614931A
Other languages
English (en)
Other versions
FR2352449B3 (fr
Inventor
Andre Charles Choserot
Marie-Helene Comte
Pierre Girard
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Laboratoire Central de Telecommunications SA
Original Assignee
Laboratoire Central de Telecommunications SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Laboratoire Central de Telecommunications SA filed Critical Laboratoire Central de Telecommunications SA
Priority to FR7614931A priority Critical patent/FR2352449A1/fr
Publication of FR2352449A1 publication Critical patent/FR2352449A1/fr
Application granted granted Critical
Publication of FR2352449B3 publication Critical patent/FR2352449B3/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/09425—Multistate logic
    • H03K19/09429—Multistate logic one of the states being the high impedance or floating state
FR7614931A 1976-05-18 1976-05-18 Dispositif logique a trois etats en technologie mos complementaire Granted FR2352449A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR7614931A FR2352449A1 (fr) 1976-05-18 1976-05-18 Dispositif logique a trois etats en technologie mos complementaire

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7614931A FR2352449A1 (fr) 1976-05-18 1976-05-18 Dispositif logique a trois etats en technologie mos complementaire

Publications (2)

Publication Number Publication Date
FR2352449A1 true FR2352449A1 (fr) 1977-12-16
FR2352449B3 FR2352449B3 (fr) 1980-10-17

Family

ID=9173275

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7614931A Granted FR2352449A1 (fr) 1976-05-18 1976-05-18 Dispositif logique a trois etats en technologie mos complementaire

Country Status (1)

Country Link
FR (1) FR2352449A1 (fr)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0102670A2 (fr) * 1982-09-03 1984-03-14 Lsi Logic Corporation Elément de circuit à trois états
US4491749A (en) * 1982-03-26 1985-01-01 Tokyo Shibaura Denki Kabushiki Kaisha Three-output level logic circuit
US5633603A (en) * 1995-12-26 1997-05-27 Hyundai Electronics Industries Co., Ltd. Data output buffer using pass transistors biased with a reference voltage and a precharged data input

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4491749A (en) * 1982-03-26 1985-01-01 Tokyo Shibaura Denki Kabushiki Kaisha Three-output level logic circuit
EP0102670A2 (fr) * 1982-09-03 1984-03-14 Lsi Logic Corporation Elément de circuit à trois états
EP0102670A3 (fr) * 1982-09-03 1984-07-04 Lsi Logic Corporation Elément de circuit à trois états
US5633603A (en) * 1995-12-26 1997-05-27 Hyundai Electronics Industries Co., Ltd. Data output buffer using pass transistors biased with a reference voltage and a precharged data input

Also Published As

Publication number Publication date
FR2352449B3 (fr) 1980-10-17

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