FR2341944A1 - Procede d'obtention d'un circuit integre comportant au moins un niveau de connexions et dispositif obtenu par ce procede - Google Patents

Procede d'obtention d'un circuit integre comportant au moins un niveau de connexions et dispositif obtenu par ce procede

Info

Publication number
FR2341944A1
FR2341944A1 FR7604759A FR7604759A FR2341944A1 FR 2341944 A1 FR2341944 A1 FR 2341944A1 FR 7604759 A FR7604759 A FR 7604759A FR 7604759 A FR7604759 A FR 7604759A FR 2341944 A1 FR2341944 A1 FR 2341944A1
Authority
FR
France
Prior art keywords
layer
integrated circuit
contacts
insulating layers
mask
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7604759A
Other languages
English (en)
Other versions
FR2341944B1 (fr
Inventor
Jean-Pierre Rioult
Raymond Fabien
Michel De Brebisson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Radiotechnique Compelec RTC SA
Original Assignee
Radiotechnique Compelec RTC SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Radiotechnique Compelec RTC SA filed Critical Radiotechnique Compelec RTC SA
Priority to FR7604759A priority Critical patent/FR2341944A1/fr
Publication of FR2341944A1 publication Critical patent/FR2341944A1/fr
Application granted granted Critical
Publication of FR2341944B1 publication Critical patent/FR2341944B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
FR7604759A 1976-02-20 1976-02-20 Procede d'obtention d'un circuit integre comportant au moins un niveau de connexions et dispositif obtenu par ce procede Granted FR2341944A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR7604759A FR2341944A1 (fr) 1976-02-20 1976-02-20 Procede d'obtention d'un circuit integre comportant au moins un niveau de connexions et dispositif obtenu par ce procede

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7604759A FR2341944A1 (fr) 1976-02-20 1976-02-20 Procede d'obtention d'un circuit integre comportant au moins un niveau de connexions et dispositif obtenu par ce procede

Publications (2)

Publication Number Publication Date
FR2341944A1 true FR2341944A1 (fr) 1977-09-16
FR2341944B1 FR2341944B1 (fr) 1979-06-22

Family

ID=9169405

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7604759A Granted FR2341944A1 (fr) 1976-02-20 1976-02-20 Procede d'obtention d'un circuit integre comportant au moins un niveau de connexions et dispositif obtenu par ce procede

Country Status (1)

Country Link
FR (1) FR2341944A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0008359A2 (fr) * 1978-08-21 1980-03-05 International Business Machines Corporation Procédé de fabrication d'une structure à couches minces

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0008359A2 (fr) * 1978-08-21 1980-03-05 International Business Machines Corporation Procédé de fabrication d'une structure à couches minces
EP0008359A3 (en) * 1978-08-21 1980-03-19 International Business Machines Corporation Process for making a thin-film structure

Also Published As

Publication number Publication date
FR2341944B1 (fr) 1979-06-22

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Legal Events

Date Code Title Description
ST Notification of lapse