FR2319978A1 - Circuits integres semi-conducteurs et procede de preparation - Google Patents

Circuits integres semi-conducteurs et procede de preparation

Info

Publication number
FR2319978A1
FR2319978A1 FR7622906A FR7622906A FR2319978A1 FR 2319978 A1 FR2319978 A1 FR 2319978A1 FR 7622906 A FR7622906 A FR 7622906A FR 7622906 A FR7622906 A FR 7622906A FR 2319978 A1 FR2319978 A1 FR 2319978A1
Authority
FR
France
Prior art keywords
integrated circuits
semiconductor integrated
preparation process
semiconductor
preparation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7622906A
Other languages
English (en)
French (fr)
Other versions
FR2319978B1 (OSRAM
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NTT Inc
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Publication of FR2319978A1 publication Critical patent/FR2319978A1/fr
Application granted granted Critical
Publication of FR2319978B1 publication Critical patent/FR2319978B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/44—Conductive materials thereof
    • H10W20/4451—Semiconductor materials, e.g. polysilicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
    • H10D64/0111—Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors
    • H10D64/0113—Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors the conductive layers comprising highly doped semiconductor materials, e.g. polysilicon layers or amorphous silicon layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/14—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase
    • H10P32/1408—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers
    • H10P32/1414—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers the applied layer being silicon, silicide or SIPOS, e.g. polysilicon or porous silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/17—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material
    • H10P32/171—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material being group IV material
FR7622906A 1975-07-28 1976-07-27 Circuits integres semi-conducteurs et procede de preparation Granted FR2319978A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50091090A JPS5215262A (en) 1975-07-28 1975-07-28 Semiconductor device and its manufacturing method

Publications (2)

Publication Number Publication Date
FR2319978A1 true FR2319978A1 (fr) 1977-02-25
FR2319978B1 FR2319978B1 (OSRAM) 1978-12-15

Family

ID=14016812

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7622906A Granted FR2319978A1 (fr) 1975-07-28 1976-07-27 Circuits integres semi-conducteurs et procede de preparation

Country Status (7)

Country Link
US (1) US4128845A (OSRAM)
JP (1) JPS5215262A (OSRAM)
CA (1) CA1042559A (OSRAM)
DE (1) DE2633714C2 (OSRAM)
FR (1) FR2319978A1 (OSRAM)
GB (1) GB1514370A (OSRAM)
NL (1) NL180264C (OSRAM)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2387516A1 (fr) * 1977-04-12 1978-11-10 Philips Nv Procede pour fabriquer un dispositif semi-conducteur comportant de tres petits transistors complementaires, et dispositif fabrique de la sorte
EP0139266A3 (en) * 1983-10-07 1986-01-22 Kabushiki Kaisha Toshiba A semiconductor integrated circuit device comprising an mos transistor and a bipolar transistor and a manufacturing method of the same

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5351985A (en) * 1976-10-22 1978-05-11 Hitachi Ltd Semiconductor wiring constitution
US4160991A (en) * 1977-10-25 1979-07-10 International Business Machines Corporation High performance bipolar device and method for making same
US4190466A (en) * 1977-12-22 1980-02-26 International Business Machines Corporation Method for making a bipolar transistor structure utilizing self-passivating diffusion sources
NL190710C (nl) * 1978-02-10 1994-07-01 Nec Corp Geintegreerde halfgeleiderketen.
US4236122A (en) * 1978-04-26 1980-11-25 Bell Telephone Laboratories, Incorporated Mesa devices fabricated on channeled substrates
JPS577959A (en) * 1980-06-19 1982-01-16 Toshiba Corp Semiconductor device
US4446613A (en) * 1981-10-19 1984-05-08 Intel Corporation Integrated circuit resistor and method of fabrication
JPH0719838B2 (ja) * 1985-07-19 1995-03-06 松下電器産業株式会社 半導体装置およびその製造方法
US4922318A (en) * 1985-09-18 1990-05-01 Advanced Micro Devices, Inc. Bipolar and MOS devices fabricated on same integrated circuit substrate
US4883772A (en) * 1986-09-11 1989-11-28 National Semiconductor Corporation Process for making a self-aligned silicide shunt
US4904980A (en) * 1988-08-19 1990-02-27 Westinghouse Electric Corp. Refractory resistors with etch stop for superconductor integrated circuits
US6060375A (en) * 1996-07-31 2000-05-09 Lsi Logic Corporation Process for forming re-entrant geometry for gate electrode of integrated circuit structure
US5895960A (en) * 1996-09-03 1999-04-20 Lucent Technologies Inc. Thin oxide mask level defined resistor
US7208361B2 (en) * 2004-03-24 2007-04-24 Intel Corporation Replacement gate process for making a semiconductor device that includes a metal gate electrode

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1154201B (de) * 1960-06-28 1963-09-12 Intermetall Verfahren zur gleichzeitigen Kontaktierung von zahlreichen Halbleiterbauelementen
US3519901A (en) * 1968-01-29 1970-07-07 Texas Instruments Inc Bi-layer insulation structure including polycrystalline semiconductor material for integrated circuit isolation
US3756877A (en) * 1970-10-05 1973-09-04 Tokyo Shibaura Electric Co By dielectric material method for manufacturing a semiconductor integrated circuit isolated
US3738880A (en) * 1971-06-23 1973-06-12 Rca Corp Method of making a semiconductor device
US3780359A (en) * 1971-12-20 1973-12-18 Ibm Bipolar transistor with a heterojunction emitter and a method fabricating the same
US3860836A (en) * 1972-12-01 1975-01-14 Honeywell Inc Stabilization of emitter followers
JPS5513426B2 (OSRAM) * 1974-06-18 1980-04-09

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
*REVUE US ELECTRONICS, VOL. 49, 22 JANVIER 1976 "SELF ALIGNMENT METHOD OF FABRICATING BIPOLAR TRANSISTORS BOOSTS FREQUENCY", PAGES 7E, 8E.) *
PAGES 65-66 *
REVUE JA JOURNAL OF ELECTRONIC ENGINEERING, NO 96, NOVEMBRE 1974 "STEP ELECTRODE TRANSISTOR IN THE IMPROVED RADIO-FREQUENCY CHARACTERISTIC" *

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2387516A1 (fr) * 1977-04-12 1978-11-10 Philips Nv Procede pour fabriquer un dispositif semi-conducteur comportant de tres petits transistors complementaires, et dispositif fabrique de la sorte
EP0139266A3 (en) * 1983-10-07 1986-01-22 Kabushiki Kaisha Toshiba A semiconductor integrated circuit device comprising an mos transistor and a bipolar transistor and a manufacturing method of the same
US4818720A (en) * 1983-10-07 1989-04-04 Kabushiki Kaisha Toshiba Method for manufacturing a BiCMOS device
US4965220A (en) * 1983-10-07 1990-10-23 Kabushiki Kaisha Toshiba Method of manufacturing a semiconductor integrated circuit device comprising an MOS transistor and a bipolar transistor

Also Published As

Publication number Publication date
FR2319978B1 (OSRAM) 1978-12-15
JPS5215262A (en) 1977-02-04
NL180264C (nl) 1987-01-16
GB1514370A (en) 1978-06-14
DE2633714A1 (de) 1977-02-03
NL180264B (nl) 1986-08-18
CA1042559A (en) 1978-11-14
US4128845A (en) 1978-12-05
NL7608309A (nl) 1977-02-01
DE2633714C2 (de) 1984-12-06

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