FR2325196A1 - Dispositif semi-conducteur presentant des courants de fuite en surface reduits et procede de fabrication - Google Patents

Dispositif semi-conducteur presentant des courants de fuite en surface reduits et procede de fabrication

Info

Publication number
FR2325196A1
FR2325196A1 FR7623078A FR7623078A FR2325196A1 FR 2325196 A1 FR2325196 A1 FR 2325196A1 FR 7623078 A FR7623078 A FR 7623078A FR 7623078 A FR7623078 A FR 7623078A FR 2325196 A1 FR2325196 A1 FR 2325196A1
Authority
FR
France
Prior art keywords
semiconductor device
manufacturing process
leakage currents
reduced surface
surface leakage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7623078A
Other languages
English (en)
Other versions
FR2325196B1 (fr
Inventor
Reinhard Glang
Stanley I Raider
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of FR2325196A1 publication Critical patent/FR2325196A1/fr
Application granted granted Critical
Publication of FR2325196B1 publication Critical patent/FR2325196B1/fr
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/3115Doping the insulating layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0638Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layer, e.g. with channel stopper
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/91Controlling charging state at semiconductor-insulator interface

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Bipolar Transistors (AREA)
  • Element Separation (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
  • Semiconductor Memories (AREA)
FR7623078A 1975-09-19 1976-07-20 Dispositif semi-conducteur presentant des courants de fuite en surface reduits et procede de fabrication Granted FR2325196A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/615,040 US4048350A (en) 1975-09-19 1975-09-19 Semiconductor device having reduced surface leakage and methods of manufacture

Publications (2)

Publication Number Publication Date
FR2325196A1 true FR2325196A1 (fr) 1977-04-15
FR2325196B1 FR2325196B1 (fr) 1979-09-28

Family

ID=24463770

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7623078A Granted FR2325196A1 (fr) 1975-09-19 1976-07-20 Dispositif semi-conducteur presentant des courants de fuite en surface reduits et procede de fabrication

Country Status (4)

Country Link
US (1) US4048350A (fr)
JP (1) JPS5813026B2 (fr)
DE (1) DE2639465C2 (fr)
FR (1) FR2325196A1 (fr)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0086010A1 (fr) * 1982-02-08 1983-08-17 Koninklijke Philips Electronics N.V. Dispositif semi-conducteur à intensité du champ de surface réduite
EP0308814A2 (fr) * 1987-09-21 1989-03-29 National Semiconductor Corporation Modification des champs interfaciaux entre diélectriques et semi-conducteurs
FR3049769A1 (fr) * 2016-03-31 2017-10-06 St Microelectronics Tours Sas Composant de puissance vertical
US10211326B2 (en) 2016-03-31 2019-02-19 Stmicroelectronics (Tours) Sas Vertical power component

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54149469A (en) * 1978-05-16 1979-11-22 Toshiba Corp Semiconductor device
US4329016A (en) * 1978-06-01 1982-05-11 Hughes Aircraft Company Optical waveguide formed by diffusing metal into substrate
US4206251A (en) * 1978-06-01 1980-06-03 Hughes Aircraft Company Method for diffusing metals into substrates
US6740958B2 (en) 1985-09-25 2004-05-25 Renesas Technology Corp. Semiconductor memory device
US5324982A (en) * 1985-09-25 1994-06-28 Hitachi, Ltd. Semiconductor memory device having bipolar transistor and structure to avoid soft error
US5108940A (en) * 1987-12-22 1992-04-28 Siliconix, Inc. MOS transistor with a charge induced drain extension
US5243212A (en) * 1987-12-22 1993-09-07 Siliconix Incorporated Transistor with a charge induced drain extension
ES2084606T3 (es) * 1988-12-21 1996-05-16 At & T Corp Procedimiento de oxidacion termica de crecimiento modificado para oxidos delgados.
US5264380A (en) * 1989-12-18 1993-11-23 Motorola, Inc. Method of making an MOS transistor having improved transconductance and short channel characteristics
US5930638A (en) * 1993-07-12 1999-07-27 Peregrine Semiconductor Corp. Method of making a low parasitic resistor on ultrathin silicon on insulator
US5869405A (en) * 1996-01-03 1999-02-09 Micron Technology, Inc. In situ rapid thermal etch and rapid thermal oxidation
JP2004193155A (ja) * 2002-12-06 2004-07-08 Matsushita Electric Ind Co Ltd 帯電量評価装置、その製造方法および帯電量の評価方法
US9984894B2 (en) * 2011-08-03 2018-05-29 Cree, Inc. Forming SiC MOSFETs with high channel mobility by treating the oxide interface with cesium ions
US8796761B2 (en) 2012-03-15 2014-08-05 Infineon Technologies Austria Ag Semiconductor device including charged structure and methods for manufacturing a semiconductor device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3442721A (en) * 1964-10-26 1969-05-06 North American Rockwell Semiconducting device
FR2162039A1 (fr) * 1971-12-02 1973-07-13 Itt

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3084079A (en) * 1960-10-13 1963-04-02 Pacific Semiconductors Inc Manufacture of semiconductor devices
US3183130A (en) * 1962-01-22 1965-05-11 Motorola Inc Diffusion process and apparatus
US3402081A (en) * 1965-06-30 1968-09-17 Ibm Method for controlling the electrical characteristics of a semiconductor surface and product produced thereby
US3514348A (en) * 1967-05-10 1970-05-26 Ncr Co Method for making semiconductor devices
US3541676A (en) * 1967-12-18 1970-11-24 Gen Electric Method of forming field-effect transistors utilizing doped insulators as activator source
US3834939A (en) * 1970-02-19 1974-09-10 Ibm Method of forming doped silicon oxide layers on substrates and paint-on compositions useful in such methods
US3767483A (en) * 1970-05-11 1973-10-23 Hitachi Ltd Method of making semiconductor devices
US3787251A (en) * 1972-04-24 1974-01-22 Signetics Corp Mos semiconductor structure with increased field threshold and method for making the same
IT1012166B (it) * 1973-06-08 1977-03-10 Rca Corp Dispositivo semiconduttore

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3442721A (en) * 1964-10-26 1969-05-06 North American Rockwell Semiconducting device
FR2162039A1 (fr) * 1971-12-02 1973-07-13 Itt

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0086010A1 (fr) * 1982-02-08 1983-08-17 Koninklijke Philips Electronics N.V. Dispositif semi-conducteur à intensité du champ de surface réduite
EP0308814A2 (fr) * 1987-09-21 1989-03-29 National Semiconductor Corporation Modification des champs interfaciaux entre diélectriques et semi-conducteurs
EP0308814A3 (en) * 1987-09-21 1989-04-26 National Semiconductor Corporation Modification of interfacial fields between dielectrics amodification of interfacial fields between dielectrics and semiconductors nd semiconductors
US6117749A (en) * 1987-09-21 2000-09-12 National Semiconductor Corporation Modification of interfacial fields between dielectrics and semiconductors
FR3049769A1 (fr) * 2016-03-31 2017-10-06 St Microelectronics Tours Sas Composant de puissance vertical
US10211326B2 (en) 2016-03-31 2019-02-19 Stmicroelectronics (Tours) Sas Vertical power component

Also Published As

Publication number Publication date
DE2639465A1 (de) 1977-03-31
JPS5813026B2 (ja) 1983-03-11
US4048350A (en) 1977-09-13
FR2325196B1 (fr) 1979-09-28
JPS5238892A (en) 1977-03-25
DE2639465C2 (de) 1985-07-11

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Legal Events

Date Code Title Description
ST Notification of lapse