FR2309879B1 - - Google Patents
Info
- Publication number
- FR2309879B1 FR2309879B1 FR7608558A FR7608558A FR2309879B1 FR 2309879 B1 FR2309879 B1 FR 2309879B1 FR 7608558 A FR7608558 A FR 7608558A FR 7608558 A FR7608558 A FR 7608558A FR 2309879 B1 FR2309879 B1 FR 2309879B1
- Authority
- FR
- France
- Prior art keywords
- logic block
- display
- circuit
- under test
- line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/3193—Tester hardware, i.e. output processing circuits with comparison between actual response and known fault free response
- G01R31/31937—Timing aspects, e.g. measuring propagation delay
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2853—Electrical testing of internal connections or -isolation, e.g. latch-up or chip-to-lead connections
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/30—Marginal testing, e.g. by varying supply voltage
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Tests Of Electronic Circuits (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US05/572,806 US4058767A (en) | 1975-04-29 | 1975-04-29 | Apparatus and process for testing AC performance of LSI components |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| FR2309879A1 FR2309879A1 (fr) | 1976-11-26 |
| FR2309879B1 true FR2309879B1 (enExample) | 1979-04-20 |
Family
ID=24289429
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FR7608558A Granted FR2309879A1 (fr) | 1975-04-29 | 1976-03-12 | Dispositif et procede de test des performances en courant alternatif des composants a integration a grande echelle |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US4058767A (enExample) |
| JP (1) | JPS6029906B2 (enExample) |
| DE (1) | DE2615787C2 (enExample) |
| FR (1) | FR2309879A1 (enExample) |
| GB (1) | GB1515245A (enExample) |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4161029A (en) * | 1977-09-19 | 1979-07-10 | Frye George J | Automatic transient response analyzer system |
| GB1599069A (en) * | 1978-05-31 | 1981-09-30 | Ferranti Ltd | Testing of circuit arrangements |
| DE2833608C2 (de) * | 1978-07-31 | 1986-07-10 | Siemens AG, 1000 Berlin und 8000 München | Vorrichtung zum Bestimmen der Signallaufzeit in integrierten digitalen Halbleiterschaltungen |
| US4225957A (en) * | 1978-10-16 | 1980-09-30 | International Business Machines Corporation | Testing macros embedded in LSI chips |
| US4562554A (en) * | 1983-06-09 | 1985-12-31 | The United States Of America As Represented By The Secretary Of The Navy | Universal microcomputer for individual sensors |
| US4564943A (en) * | 1983-07-05 | 1986-01-14 | International Business Machines | System path stressing |
| US4527907A (en) * | 1983-09-06 | 1985-07-09 | Fairchild Camera And Instrument Corporation | Method and apparatus for measuring the settling time of an analog signal |
| GB2200465B (en) * | 1987-01-16 | 1991-10-02 | Teradyne Inc | Automatic test equipment |
| JPH01163840A (ja) * | 1987-12-21 | 1989-06-28 | Nec Corp | 遅延時間チエック方式 |
| US4878209A (en) * | 1988-03-17 | 1989-10-31 | International Business Machines Corporation | Macro performance test |
| JPH06249919A (ja) * | 1993-03-01 | 1994-09-09 | Fujitsu Ltd | 半導体集積回路装置の端子間接続試験方法 |
| US5796751A (en) * | 1996-07-22 | 1998-08-18 | International Business Machines Corporation | Technique for sorting high frequency integrated circuits |
| DE10127656B4 (de) * | 2001-06-07 | 2008-09-18 | Qimonda Ag | Vorrichtung und Verfahren zur Untersuchung des Signalverhaltens von Halbleiterschaltungen |
| CN109308427A (zh) * | 2018-08-08 | 2019-02-05 | 上海华虹集成电路有限责任公司 | 一种扩展测试通道的方法和电路 |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3673397A (en) * | 1970-10-02 | 1972-06-27 | Singer Co | Circuit tester |
| DE2121330C3 (de) * | 1971-04-30 | 1974-10-17 | Ludwig 6369 Dortelweil Illian | Verfahren und Schaltungsanordnung zum Prüfen digital arbeitender elektronischer Geräte und ihrer Bauteile |
| US3740646A (en) * | 1971-08-02 | 1973-06-19 | Ibm | Testing of non-linear circuits by accumulated result comparison |
| US3751695A (en) * | 1972-03-24 | 1973-08-07 | Amf Inc | One-way directional control means for synchronous a.c. motors |
| US3887869A (en) * | 1972-07-25 | 1975-06-03 | Tau Tron Inc | Method and apparatus for high speed digital circuit testing |
| US3783254A (en) * | 1972-10-16 | 1974-01-01 | Ibm | Level sensitive logic system |
| US3784907A (en) * | 1972-10-16 | 1974-01-08 | Ibm | Method of propagation delay testing a functional logic system |
| US3832535A (en) * | 1972-10-25 | 1974-08-27 | Instrumentation Engineering | Digital word generating and receiving apparatus |
| US3916306A (en) | 1973-09-06 | 1975-10-28 | Ibm | Method and apparatus for testing high circuit density devices |
| US3883801A (en) * | 1973-11-07 | 1975-05-13 | Bell Telephone Labor Inc | Fault testing of logic circuits |
-
1975
- 1975-04-29 US US05/572,806 patent/US4058767A/en not_active Expired - Lifetime
-
1976
- 1976-03-12 FR FR7608558A patent/FR2309879A1/fr active Granted
- 1976-03-23 JP JP51030924A patent/JPS6029906B2/ja not_active Expired
- 1976-03-24 GB GB11811/76A patent/GB1515245A/en not_active Expired
- 1976-04-10 DE DE2615787A patent/DE2615787C2/de not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| FR2309879A1 (fr) | 1976-11-26 |
| JPS51132945A (en) | 1976-11-18 |
| JPS6029906B2 (ja) | 1985-07-13 |
| DE2615787C2 (de) | 1987-04-30 |
| US4058767A (en) | 1977-11-15 |
| GB1515245A (en) | 1978-06-21 |
| DE2615787A1 (de) | 1976-11-11 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| ST | Notification of lapse |