FR2301092A1 - Procede de fabrication d'un semi-conducteur et semi-conducteur obtenu - Google Patents

Procede de fabrication d'un semi-conducteur et semi-conducteur obtenu

Info

Publication number
FR2301092A1
FR2301092A1 FR7604063A FR7604063A FR2301092A1 FR 2301092 A1 FR2301092 A1 FR 2301092A1 FR 7604063 A FR7604063 A FR 7604063A FR 7604063 A FR7604063 A FR 7604063A FR 2301092 A1 FR2301092 A1 FR 2301092A1
Authority
FR
France
Prior art keywords
semiconductor
manufacturing
semiconductor obtained
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7604063A
Other languages
English (en)
French (fr)
Other versions
FR2301092B1 (Direct
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of FR2301092A1 publication Critical patent/FR2301092A1/fr
Application granted granted Critical
Publication of FR2301092B1 publication Critical patent/FR2301092B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H10P76/40—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass
    • H10P14/60—
    • H10W74/43—
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking
    • Y10S438/945—Special, e.g. metal
FR7604063A 1975-02-15 1976-02-13 Procede de fabrication d'un semi-conducteur et semi-conducteur obtenu Granted FR2301092A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50019353A JPS5193874A (en) 1975-02-15 1975-02-15 Handotaisochino seizohoho

Publications (2)

Publication Number Publication Date
FR2301092A1 true FR2301092A1 (fr) 1976-09-10
FR2301092B1 FR2301092B1 (Direct) 1982-06-18

Family

ID=11997006

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7604063A Granted FR2301092A1 (fr) 1975-02-15 1976-02-13 Procede de fabrication d'un semi-conducteur et semi-conducteur obtenu

Country Status (8)

Country Link
US (1) US4062707A (Direct)
JP (1) JPS5193874A (Direct)
AU (1) AU499549B2 (Direct)
CA (1) CA1059243A (Direct)
DE (1) DE2605830C3 (Direct)
FR (1) FR2301092A1 (Direct)
GB (1) GB1513332A (Direct)
NL (1) NL186048C (Direct)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0082256A3 (en) * 1981-12-10 1986-05-07 Kabushiki Kaisha Toshiba Method of manufacturing a semiconductor device comprising dielectric isolation regions
EP0274718A3 (en) * 1987-01-14 1990-06-06 Polaroid Corporation Dual layer encapsulating coating for iii-v semiconductor compounds

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4161744A (en) * 1977-05-23 1979-07-17 Varo Semiconductor, Inc. Passivated semiconductor device and method of making same
US4134125A (en) * 1977-07-20 1979-01-09 Bell Telephone Laboratories, Incorporated Passivation of metallized semiconductor substrates
US4149307A (en) * 1977-12-28 1979-04-17 Hughes Aircraft Company Process for fabricating insulated-gate field-effect transistors with self-aligned contacts
US4148133A (en) * 1978-05-08 1979-04-10 Sperry Rand Corporation Polysilicon mask for etching thick insulator
US4174252A (en) * 1978-07-26 1979-11-13 Rca Corporation Method of defining contact openings in insulating layers on semiconductor devices without the formation of undesirable pinholes
US4219379A (en) * 1978-09-25 1980-08-26 Mostek Corporation Method for making a semiconductor device
US4242697A (en) * 1979-03-14 1980-12-30 Bell Telephone Laboratories, Incorporated Dielectrically isolated high voltage semiconductor devices
JPS5640269A (en) * 1979-09-11 1981-04-16 Toshiba Corp Preparation of semiconductor device
US4317690A (en) * 1980-06-18 1982-03-02 Signetics Corporation Self-aligned double polysilicon MOS fabrication
US4990989A (en) * 1982-03-19 1991-02-05 At&T Bell Laboratories Restricted contact planar photodiode
US4894703A (en) * 1982-03-19 1990-01-16 American Telephone And Telegraph Company, At&T Bell Laboratories Restricted contact, planar photodiode
US4634474A (en) * 1984-10-09 1987-01-06 At&T Bell Laboratories Coating of III-V and II-VI compound semiconductors
JPS61222172A (ja) * 1985-03-15 1986-10-02 Sharp Corp Ｍｏｓｆｅｔのゲ−ト絶縁膜形成方法
US5460983A (en) * 1993-07-30 1995-10-24 Sgs-Thomson Microelectronics, Inc. Method for forming isolated intra-polycrystalline silicon structures
DE4424420A1 (de) * 1994-07-12 1996-01-18 Telefunken Microelectron Kontaktierungsprozeß
US6068928A (en) * 1998-02-25 2000-05-30 Siemens Aktiengesellschaft Method for producing a polycrystalline silicon structure and polycrystalline silicon layer to be produced by the method
DE69923436T2 (de) * 1998-03-06 2006-01-05 Asm America Inc., Phoenix Verfahren zum beschichten von silizium mit hoher kantenabdeckung
DE60005541T2 (de) * 2000-12-20 2004-07-01 Stmicroelectronics S.R.L., Agrate Brianza Verfahren zur Kontrollierung von Zwischenoxyd bei einer monokristallinischen/polykristallinischen Silizium-Zwischenschicht
US9837271B2 (en) 2014-07-18 2017-12-05 Asm Ip Holding B.V. Process for forming silicon-filled openings with a reduced occurrence of voids
US9443730B2 (en) 2014-07-18 2016-09-13 Asm Ip Holding B.V. Process for forming silicon-filled openings with a reduced occurrence of voids
US10460932B2 (en) 2017-03-31 2019-10-29 Asm Ip Holding B.V. Semiconductor device with amorphous silicon filled gaps and methods for forming
KR102591247B1 (ko) * 2023-04-13 2023-10-19 삼성엔지니어링 주식회사 한쌍의 마스트를 이용한 대용량 건설용 리프트와 로드 셀을 이용한 건설용 리프트 장치

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2789258A (en) * 1955-06-29 1957-04-16 Raytheon Mfg Co Intrinsic coatings for semiconductor junctions
NL251064A (Direct) * 1955-11-04
GB1053046A (Direct) * 1963-02-25 1900-01-01
DE1514807B2 (de) * 1964-04-15 1971-09-02 Texas Instruments Inc., Dallas. Tex. (V.St.A.) Verfahren zum herstellen einer planaren halbleiteranordnung
GB1104935A (en) * 1964-05-08 1968-03-06 Standard Telephones Cables Ltd Improvements in or relating to a method of forming a layer of an inorganic compound
SE300472B (Direct) * 1965-03-31 1968-04-29 Asea Ab
US3479237A (en) * 1966-04-08 1969-11-18 Bell Telephone Labor Inc Etch masks on semiconductor surfaces
US3422321A (en) * 1966-06-20 1969-01-14 Sperry Rand Corp Oxygenated silicon nitride semiconductor devices and silane method for making same
US3463715A (en) * 1966-07-07 1969-08-26 Trw Inc Method of cathodically sputtering a layer of silicon having a reduced resistivity
US3455020A (en) * 1966-10-13 1969-07-15 Rca Corp Method of fabricating insulated-gate field-effect devices
US3472689A (en) * 1967-01-19 1969-10-14 Rca Corp Vapor deposition of silicon-nitrogen insulating coatings
US3537921A (en) * 1967-02-28 1970-11-03 Motorola Inc Selective hydrofluoric acid etching and subsequent processing
DE1614455C3 (de) * 1967-03-16 1979-07-19 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zum Herstellen einer teils aus Siliciumoxid, teils aus Siliciumnitrid bestehenden Schutzschicht an der Oberfläche eines Halbleiterkörpers
US3475234A (en) * 1967-03-27 1969-10-28 Bell Telephone Labor Inc Method for making mis structures
US3549411A (en) * 1967-06-27 1970-12-22 Texas Instruments Inc Method of preparing silicon nitride films
GB1244013A (en) * 1967-10-13 1971-08-25 Gen Electric Fabrication of semiconductor devices
GB1239852A (en) * 1969-01-09 1971-07-21 Ferranti Ltd Improvements relating to semiconductor devices
JPS497870B1 (Direct) * 1969-06-06 1974-02-22
JPS5314420B2 (Direct) * 1973-05-14 1978-05-17
JPS523277B2 (Direct) * 1973-05-19 1977-01-27
US3862852A (en) * 1973-06-01 1975-01-28 Fairchild Camera Instr Co Method of obtaining high-quality thick films of polycrystalline silicone from dielectric isolation
JPS532552B2 (Direct) 1974-03-30 1978-01-28

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0082256A3 (en) * 1981-12-10 1986-05-07 Kabushiki Kaisha Toshiba Method of manufacturing a semiconductor device comprising dielectric isolation regions
EP0274718A3 (en) * 1987-01-14 1990-06-06 Polaroid Corporation Dual layer encapsulating coating for iii-v semiconductor compounds

Also Published As

Publication number Publication date
NL186048B (nl) 1990-04-02
FR2301092B1 (Direct) 1982-06-18
GB1513332A (en) 1978-06-07
AU1084076A (en) 1977-08-11
DE2605830B2 (de) 1980-11-06
JPS5193874A (en) 1976-08-17
US4062707A (en) 1977-12-13
NL186048C (nl) 1990-09-03
AU499549B2 (en) 1979-04-26
DE2605830C3 (de) 1983-01-05
CA1059243A (en) 1979-07-24
NL7601576A (nl) 1976-08-17
DE2605830A1 (de) 1976-09-02

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Legal Events

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