FR2295575A1 - Procede de depot hetero-epitaxique pour la realisation de diodes emettrices de lumiere de type gaasp/si - Google Patents

Procede de depot hetero-epitaxique pour la realisation de diodes emettrices de lumiere de type gaasp/si

Info

Publication number
FR2295575A1
FR2295575A1 FR7533264A FR7533264A FR2295575A1 FR 2295575 A1 FR2295575 A1 FR 2295575A1 FR 7533264 A FR7533264 A FR 7533264A FR 7533264 A FR7533264 A FR 7533264A FR 2295575 A1 FR2295575 A1 FR 2295575A1
Authority
FR
France
Prior art keywords
epitaxic
gaasp
hetero
realization
light emitting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7533264A
Other languages
English (en)
French (fr)
Other versions
FR2295575B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Inventor
Bernard M Kemlage
Jerry M Woodall
William C Wuestenhoefer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of FR2295575A1 publication Critical patent/FR2295575A1/fr
Application granted granted Critical
Publication of FR2295575B1 publication Critical patent/FR2295575B1/fr
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02455Group 13/15 materials
    • H01L21/02461Phosphides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02455Group 13/15 materials
    • H01L21/02463Arsenides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02494Structure
    • H01L21/02496Layer structure
    • H01L21/02502Layer structure consisting of two layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02494Structure
    • H01L21/02496Layer structure
    • H01L21/0251Graded layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02538Group 13/15 materials
    • H01L21/02543Phosphides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02538Group 13/15 materials
    • H01L21/02546Arsenides
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/025Deposition multi-step
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/059Germanium on silicon or Ge-Si on III-V
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/067Graded energy gap
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/072Heterojunctions
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/119Phosphides of gallium or indium
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/933Germanium or silicon or Ge-Si on III-V
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/938Lattice strain control or utilization

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Led Devices (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
FR7533264A 1974-12-17 1975-10-20 Procede de depot hetero-epitaxique pour la realisation de diodes emettrices de lumiere de type gaasp/si Granted FR2295575A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/533,590 US3963539A (en) 1974-12-17 1974-12-17 Two stage heteroepitaxial deposition process for GaAsP/Si LED's

Publications (2)

Publication Number Publication Date
FR2295575A1 true FR2295575A1 (fr) 1976-07-16
FR2295575B1 FR2295575B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1978-04-07

Family

ID=24126627

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7533264A Granted FR2295575A1 (fr) 1974-12-17 1975-10-20 Procede de depot hetero-epitaxique pour la realisation de diodes emettrices de lumiere de type gaasp/si

Country Status (5)

Country Link
US (1) US3963539A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JPS5311837B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
DE (1) DE2549738C2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
FR (1) FR2295575A1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
IT (1) IT1050021B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4025157A (en) * 1975-06-26 1977-05-24 The United States Of America As Represented By The Secretary Of The Navy Gradient index miniature coupling lens
JPS5856963B2 (ja) * 1977-05-06 1983-12-17 三菱化成ポリテック株式会社 電子発光化合物半導体の製造方法
US4314873A (en) * 1977-07-05 1982-02-09 The United States Of America As Represented By The Secretary Of The Navy Method for depositing heteroepitaxially InP on GaAs semi-insulating substrates
US4120706A (en) * 1977-09-16 1978-10-17 Harris Corporation Heteroepitaxial deposition of gap on silicon substrates
US4180825A (en) * 1977-09-16 1979-12-25 Harris Corporation Heteroepitaxial deposition of GaP on silicon substrates
US4517047A (en) * 1981-01-23 1985-05-14 The United States Of America As Represented By The Secretary Of The Army MBE growth technique for matching superlattices grown on GaAs substrates
JPS6012724A (ja) * 1983-07-01 1985-01-23 Agency Of Ind Science & Technol 化合物半導体の成長方法
US4697202A (en) * 1984-02-02 1987-09-29 Sri International Integrated circuit having dislocation free substrate
JPS61291491A (ja) * 1985-06-19 1986-12-22 Mitsubishi Monsanto Chem Co りん化ひ化ガリウム混晶エピタキシヤルウエハ
US4876210A (en) * 1987-04-30 1989-10-24 The University Of Delaware Solution growth of lattice mismatched and solubility mismatched heterostructures
US5238869A (en) * 1988-07-25 1993-08-24 Texas Instruments Incorporated Method of forming an epitaxial layer on a heterointerface
US5060028A (en) * 1989-01-19 1991-10-22 Hewlett-Packard Company High band-gap opto-electronic device
US5204284A (en) * 1989-01-19 1993-04-20 Hewlett-Packard Company Method of making a high band-gap opto-electronic device
CA2062134C (en) * 1991-05-31 1997-03-25 Ibm Low Defect Densiry/Arbitrary Lattice Constant Heteroepitaxial Layers
JPH05291140A (ja) * 1992-04-09 1993-11-05 Fujitsu Ltd 化合物半導体薄膜の成長方法
DE4310569A1 (de) * 1993-03-26 1994-09-29 Daimler Benz Ag Laserdiode
DE4310571A1 (de) * 1993-03-26 1994-09-29 Daimler Benz Ag Leuchtdiode
US5526768A (en) * 1994-02-03 1996-06-18 Harris Corporation Method for providing a silicon and diamond substrate having a carbon to silicon transition layer and apparatus thereof
US5449927A (en) * 1994-05-16 1995-09-12 Santa Barbara Research Center Multilayer buffer structure including II-VI compounds on a silicon substrate
US6010937A (en) * 1995-09-05 2000-01-04 Spire Corporation Reduction of dislocations in a heteroepitaxial semiconductor structure
JP3268731B2 (ja) 1996-10-09 2002-03-25 沖電気工業株式会社 光電変換素子
US7202503B2 (en) * 2004-06-30 2007-04-10 Intel Corporation III-V and II-VI compounds as template materials for growing germanium containing film on silicon

Family Cites Families (8)

* Cited by examiner, † Cited by third party
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USB524765I5 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1966-02-03 1900-01-01
US3433684A (en) * 1966-09-13 1969-03-18 North American Rockwell Multilayer semiconductor heteroepitaxial structure
US3783009A (en) * 1971-02-22 1974-01-01 Air Reduction Method for improving perfection of epitaxially grown germanium films
US3699401A (en) * 1971-05-17 1972-10-17 Rca Corp Photoemissive electron tube comprising a thin film transmissive semiconductor photocathode structure
JPS52915B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1971-06-01 1977-01-11
US3766447A (en) * 1971-10-20 1973-10-16 Harris Intertype Corp Heteroepitaxial structure
US3862859A (en) * 1972-01-10 1975-01-28 Rca Corp Method of making a semiconductor device
JPS5228444Y2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1972-01-18 1977-06-28

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
REVUE US: "IBM TECHNICAL DISCLOSURE BULLETIN" VOLUME 16, NO. 4, SEPTEMBRE 1973 "SELECTIVE PLANAR GAP *
SI DEPOSITION PROCESS WITH SELF-ISOLATED LIGHT-EMITTING DIODES. R.W. BROADIE ET H.B. POGGE, PAGE 1301) *

Also Published As

Publication number Publication date
FR2295575B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1978-04-07
DE2549738A1 (de) 1976-07-01
US3963539A (en) 1976-06-15
JPS5311837B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1978-04-25
DE2549738C2 (de) 1984-04-19
IT1050021B (it) 1981-03-10
JPS5178186A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1976-07-07

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