FR2276690A1 - Substrat isolant portant une couche mince semi-conductrice monocristalline et procede pour sa fabrication - Google Patents

Substrat isolant portant une couche mince semi-conductrice monocristalline et procede pour sa fabrication

Info

Publication number
FR2276690A1
FR2276690A1 FR7519751A FR7519751A FR2276690A1 FR 2276690 A1 FR2276690 A1 FR 2276690A1 FR 7519751 A FR7519751 A FR 7519751A FR 7519751 A FR7519751 A FR 7519751A FR 2276690 A1 FR2276690 A1 FR 2276690A1
Authority
FR
France
Prior art keywords
monocristalline
manufacturing
layer
substrate carrying
insulation substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
FR7519751A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CBS Corp
Original Assignee
Westinghouse Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Westinghouse Electric Corp filed Critical Westinghouse Electric Corp
Publication of FR2276690A1 publication Critical patent/FR2276690A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/051—Etching
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/135—Removal of substrate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/15—Silicon on sapphire SOS
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24942—Structurally defined web or sheet [e.g., overall dimension, etc.] including components having same physical characteristic in differing degree
    • Y10T428/2495—Thickness [relative or absolute]
    • Y10T428/24959—Thickness [relative or absolute] of adhesive layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Organic Chemistry (AREA)
  • Metallurgy (AREA)
  • Materials Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Weting (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
FR7519751A 1974-06-24 1975-06-24 Substrat isolant portant une couche mince semi-conductrice monocristalline et procede pour sa fabrication Withdrawn FR2276690A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US482193A US3902979A (en) 1974-06-24 1974-06-24 Insulator substrate with a thin mono-crystalline semiconductive layer and method of fabrication

Publications (1)

Publication Number Publication Date
FR2276690A1 true FR2276690A1 (fr) 1976-01-23

Family

ID=23915091

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7519751A Withdrawn FR2276690A1 (fr) 1974-06-24 1975-06-24 Substrat isolant portant une couche mince semi-conductrice monocristalline et procede pour sa fabrication

Country Status (5)

Country Link
US (1) US3902979A (fr)
JP (1) JPS5118475A (fr)
DE (1) DE2526507A1 (fr)
FR (1) FR2276690A1 (fr)
GB (1) GB1482616A (fr)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4180439A (en) * 1976-03-15 1979-12-25 International Business Machines Corporation Anodic etching method for the detection of electrically active defects in silicon
FR2344847A1 (fr) * 1976-03-15 1977-10-14 Ibm Procede de detection de defauts electriquement actifs dans un substrat de silicium de type n
US4118857A (en) * 1977-01-12 1978-10-10 The United States Of America As Represented By The Secretary Of The Army Flipped method for characterization of epitaxial layers
US4727047A (en) * 1980-04-10 1988-02-23 Massachusetts Institute Of Technology Method of producing sheets of crystalline material
JPS5830145A (ja) * 1981-08-17 1983-02-22 Sony Corp 半導体装置の製造方法
JPS6011504A (ja) * 1983-06-30 1985-01-21 Nippon Paint Co Ltd 水分散型樹脂組成物
JPH0616537B2 (ja) * 1983-10-31 1994-03-02 株式会社東芝 半導体基体の製造方法
US4554059A (en) * 1983-11-04 1985-11-19 Harris Corporation Electrochemical dielectric isolation technique
FR2559960B1 (fr) * 1984-02-20 1987-03-06 Solems Sa Procede de formation de circuits electriques en couche mince et produits obtenus
US4599792A (en) * 1984-06-15 1986-07-15 International Business Machines Corporation Buried field shield for an integrated circuit
JPH0770473B2 (ja) * 1985-02-08 1995-07-31 株式会社東芝 半導体基板の製造方法
US4601779A (en) * 1985-06-24 1986-07-22 International Business Machines Corporation Method of producing a thin silicon-on-insulator layer
US4952446A (en) * 1986-02-10 1990-08-28 Cornell Research Foundation, Inc. Ultra-thin semiconductor membranes
JPH07120757B2 (ja) * 1986-05-07 1995-12-20 セイコーエプソン株式会社 Ｓｏｉ基板及びその製造方法
HU199020B (en) * 1987-05-04 1989-12-28 Magyar Tudomanyos Akademia Method and apparatus for measuring the layer thickness of semiconductor layer structures
CA2061796C (fr) * 1991-03-28 2002-12-24 Kalluri R. Sarma Excitateurs integres a grande mobilite electronique pour afficheurs matriciels actifs
JPH0770694B2 (ja) * 1993-01-18 1995-07-31 株式会社東芝 半導体基体
US5512375A (en) * 1993-10-14 1996-04-30 Intevac, Inc. Pseudomorphic substrates
US5395481A (en) * 1993-10-18 1995-03-07 Regents Of The University Of California Method for forming silicon on a glass substrate
GB0612093D0 (en) * 2006-06-19 2006-07-26 Univ Belfast IC Substrate and Method of Manufacture of IC Substrate
WO2012074009A1 (fr) * 2010-11-30 2012-06-07 京セラ株式会社 Substrat composite et son procédé de production
US9287353B2 (en) * 2010-11-30 2016-03-15 Kyocera Corporation Composite substrate and method of manufacturing the same

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3096262A (en) * 1958-10-23 1963-07-02 Shockley William Method of making thin slices of semiconductive material
GB1138401A (en) * 1965-05-06 1969-01-01 Mallory & Co Inc P R Bonding
NL6703014A (fr) * 1967-02-25 1968-08-26
NL6910274A (fr) * 1969-07-04 1971-01-06
US3655540A (en) * 1970-06-22 1972-04-11 Bell Telephone Labor Inc Method of making semiconductor device components

Also Published As

Publication number Publication date
GB1482616A (en) 1977-08-10
DE2526507A1 (de) 1976-01-15
US3902979A (en) 1975-09-02
JPS5118475A (fr) 1976-02-14

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Legal Events

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ST Notification of lapse