FI943017A0 - Kellosignaalin vaiheen siirto, erityisesti digitaalisen signaalin ajastuksen ilmaisua varten - Google Patents

Kellosignaalin vaiheen siirto, erityisesti digitaalisen signaalin ajastuksen ilmaisua varten

Info

Publication number
FI943017A0
FI943017A0 FI943017A FI943017A FI943017A0 FI 943017 A0 FI943017 A0 FI 943017A0 FI 943017 A FI943017 A FI 943017A FI 943017 A FI943017 A FI 943017A FI 943017 A0 FI943017 A0 FI 943017A0
Authority
FI
Finland
Prior art keywords
control signal
timing
detecting
phase change
clock signal
Prior art date
Application number
FI943017A
Other languages
English (en)
Swedish (sv)
Other versions
FI943017A (fi
FI107663B (fi
Inventor
Mats Hedberg
Original Assignee
Ericsson Telefon Ab L M
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Telefon Ab L M filed Critical Ericsson Telefon Ab L M
Publication of FI943017A publication Critical patent/FI943017A/fi
Publication of FI943017A0 publication Critical patent/FI943017A0/fi
Application granted granted Critical
Publication of FI107663B publication Critical patent/FI107663B/fi

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/0807—Details of the phase-locked loop concerning mainly a recovery circuit for the reference signal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0337—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)
  • Dc Digital Transmission (AREA)
FI943017A 1991-12-23 1994-06-22 Kellosignaalin vaiheen siirto, erityisesti digitaalisen signaalin ajastuksen ilmaisua varten FI107663B (fi)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
SE9103833A SE469616B (sv) 1991-12-23 1991-12-23 Anordning foer foerskjutning av fasen hos en klocksignal samt saett och anordning foer taktaatervinning hos en digital datasignal
SE9103833 1991-12-23
SE9200809 1992-11-25
PCT/SE1992/000809 WO1993013602A1 (en) 1991-12-23 1992-11-25 Shifting phase of a clock signal, in particular for clock recovery of a digital data signal

Publications (3)

Publication Number Publication Date
FI943017A FI943017A (fi) 1994-06-22
FI943017A0 true FI943017A0 (fi) 1994-06-22
FI107663B FI107663B (fi) 2001-09-14

Family

ID=20384712

Family Applications (1)

Application Number Title Priority Date Filing Date
FI943017A FI107663B (fi) 1991-12-23 1994-06-22 Kellosignaalin vaiheen siirto, erityisesti digitaalisen signaalin ajastuksen ilmaisua varten

Country Status (15)

Country Link
US (1) US5396523A (fi)
EP (1) EP0619052B1 (fi)
JP (1) JPH07502394A (fi)
KR (1) KR100233617B1 (fi)
CN (1) CN1055812C (fi)
AU (1) AU662033B2 (fi)
BR (1) BR9206947A (fi)
CA (1) CA2126552C (fi)
DE (1) DE69226283T2 (fi)
DK (1) DK0619052T3 (fi)
ES (1) ES2118220T3 (fi)
FI (1) FI107663B (fi)
NO (1) NO308976B1 (fi)
SE (2) SE469616B (fi)
WO (1) WO1993013602A1 (fi)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE515076C2 (sv) * 1992-07-01 2001-06-05 Ericsson Telefon Ab L M Multiplexor-/demultiplexorkrets
US5870592A (en) * 1996-10-31 1999-02-09 International Business Machines Corp. Clock generation apparatus and method for CMOS microprocessors using a differential saw oscillator
US5949262A (en) * 1998-01-07 1999-09-07 International Business Machines Corporation Method and apparatus for coupled phase locked loops
US6014047A (en) * 1998-01-07 2000-01-11 International Business Machines Corporation Method and apparatus for phase rotation in a phase locked loop
US6343108B1 (en) 1999-06-18 2002-01-29 Philips Medical Systems (Cleveland), Inc. Cone beam scanner using oblique surface reconstructions
US6552619B2 (en) * 2001-02-05 2003-04-22 Pmc Sierra, Inc. Multi-channel clock recovery circuit
GB0413071D0 (en) 2004-06-12 2004-07-14 Texas Instruments Ltd Triangulating phase interpolator
US7917798B2 (en) 2005-10-04 2011-03-29 Hypres, Inc. Superconducting digital phase rotator
US8090067B2 (en) * 2008-05-23 2012-01-03 Avago Technologies Fiber Ip (Singapore) Pte. Ltd. Circuits and methods for clock and data recovery
US7759997B2 (en) * 2008-06-27 2010-07-20 Microsoft Corporation Multi-phase correction circuit
US7821316B2 (en) 2008-08-29 2010-10-26 Microsoft Corporation Multiphase clock generator with enhanced phase control
CN103107796B (zh) * 2011-11-09 2016-02-03 群联电子股份有限公司 时脉数据恢复电路
US9200702B2 (en) 2014-05-01 2015-12-01 Ford Global Technologies, Llc Driver aware adaptive shifting
JP6492442B2 (ja) 2014-07-25 2019-04-03 富士通株式会社 電子部品及び情報処理装置
US11201723B1 (en) * 2020-09-08 2021-12-14 Ciena Corporation Highly linear phase rotators with continuous rotation
CN114167135B (zh) * 2021-11-19 2023-07-21 青岛仪迪电子有限公司 一种用于功率计的电压电流相角判别方法
CN116505928B (zh) * 2023-06-28 2023-09-22 牛芯半导体(深圳)有限公司 应用于tx时钟的缓冲器电路

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3621406A (en) * 1969-12-09 1971-11-16 Nasa Continuously variable voltage-controlled phase shifter
US4218771A (en) * 1978-12-04 1980-08-19 Rockwell International Corporation Automatic clock positioning circuit for a digital data transmission system
US4423382A (en) * 1981-08-10 1983-12-27 Reliance Electric Company Circuit for generating two periodic signals having a controllable phase relationship therebetween
JPS60251740A (ja) * 1984-05-29 1985-12-12 Nec Corp タイミング同期回路
JPS6149536A (ja) * 1984-08-18 1986-03-11 Fujitsu Ltd デイジタル位相同期回路
US4829257A (en) * 1987-02-20 1989-05-09 Cooper J Carl Method and apparatus for continuously shifting phase of an electronic signal
US4955040A (en) * 1987-10-27 1990-09-04 Siemens Aktiengesellschaft Method and apparatus for generating a correction signal in a digital clock recovery device
US4808936A (en) * 1988-03-25 1989-02-28 Tektronix, Inc. Continuously variable clock delay circuit

Also Published As

Publication number Publication date
NO308976B1 (no) 2000-11-20
NO942171D0 (no) 1994-06-10
SE9103833L (sv) 1993-06-24
EP0619052B1 (en) 1998-07-15
NO942171L (no) 1994-08-23
CN1055812C (zh) 2000-08-23
SE513051C2 (sv) 2000-06-26
DE69226283D1 (de) 1998-08-20
SE9103833D0 (sv) 1991-12-23
EP0619052A1 (en) 1994-10-12
DE69226283T2 (de) 1998-11-19
FI943017A (fi) 1994-06-22
BR9206947A (pt) 1995-11-28
WO1993013602A1 (en) 1993-07-08
SE469616B (sv) 1993-08-02
JPH07502394A (ja) 1995-03-09
SE9203543D0 (sv) 1992-11-25
SE9203543L (sv) 1993-06-24
CA2126552A1 (en) 1993-07-08
DK0619052T3 (da) 1999-02-01
ES2118220T3 (es) 1998-09-16
CN1077831A (zh) 1993-10-27
KR100233617B1 (ko) 1999-12-01
CA2126552C (en) 2002-03-05
US5396523A (en) 1995-03-07
AU3270093A (en) 1993-07-28
AU662033B2 (en) 1995-08-17
FI107663B (fi) 2001-09-14

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Legal Events

Date Code Title Description
MA Patent expired