JPS5745649A - Asynchronizing signal synchronizer - Google Patents

Asynchronizing signal synchronizer

Info

Publication number
JPS5745649A
JPS5745649A JP55121075A JP12107580A JPS5745649A JP S5745649 A JPS5745649 A JP S5745649A JP 55121075 A JP55121075 A JP 55121075A JP 12107580 A JP12107580 A JP 12107580A JP S5745649 A JPS5745649 A JP S5745649A
Authority
JP
Japan
Prior art keywords
signal
control signal
turns
tpn
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55121075A
Other languages
Japanese (ja)
Inventor
Ryoichi Takamatsu
Takeshi Kato
Hiroshi Watanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP55121075A priority Critical patent/JPS5745649A/en
Publication of JPS5745649A publication Critical patent/JPS5745649A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00

Abstract

PURPOSE:To achieve data in high speed without selection of ICs, by making the operation of synchronizing of a response signal and of control signal in parallel timingly. CONSTITUTION:When a B section start circuit 10 is operated and a start signal 4 turns on, DTFFs 15, 16 are set and a control signal generating circuit 8 stops at the state that a control signal TPn turns on with a stop signal 13. On the other hand, since a selector 19 is switched to Q side with a selector switching signal 21, when a response signal 7 from a B section 2 turns on, the control signal TPn is generated with an AND circuit 20. Data and error signals are respectively set to registers 11, 12 in the timing of the signal TPn-on.
JP55121075A 1980-09-03 1980-09-03 Asynchronizing signal synchronizer Pending JPS5745649A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55121075A JPS5745649A (en) 1980-09-03 1980-09-03 Asynchronizing signal synchronizer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55121075A JPS5745649A (en) 1980-09-03 1980-09-03 Asynchronizing signal synchronizer

Publications (1)

Publication Number Publication Date
JPS5745649A true JPS5745649A (en) 1982-03-15

Family

ID=14802221

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55121075A Pending JPS5745649A (en) 1980-09-03 1980-09-03 Asynchronizing signal synchronizer

Country Status (1)

Country Link
JP (1) JPS5745649A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61217215A (en) * 1985-03-25 1986-09-26 三林 良喜 Method and device for manufacturing concrete
JPS61255808A (en) * 1985-05-10 1986-11-13 五洋建設株式会社 Method of kneading concrete
JPS6239206A (en) * 1985-08-15 1987-02-20 五洋建設株式会社 Method of mixing cocrete

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61217215A (en) * 1985-03-25 1986-09-26 三林 良喜 Method and device for manufacturing concrete
JPS61255808A (en) * 1985-05-10 1986-11-13 五洋建設株式会社 Method of kneading concrete
JPS6239206A (en) * 1985-08-15 1987-02-20 五洋建設株式会社 Method of mixing cocrete

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