FI67632C - Saett och anordning foer att oevervaka fel vid dataoeverfoering mellan datorer - Google Patents

Saett och anordning foer att oevervaka fel vid dataoeverfoering mellan datorer Download PDF

Info

Publication number
FI67632C
FI67632C FI801497A FI801497A FI67632C FI 67632 C FI67632 C FI 67632C FI 801497 A FI801497 A FI 801497A FI 801497 A FI801497 A FI 801497A FI 67632 C FI67632 C FI 67632C
Authority
FI
Finland
Prior art keywords
sum
yes
adder
information
algorithm
Prior art date
Application number
FI801497A
Other languages
English (en)
Finnish (fi)
Swedish (sv)
Other versions
FI67632B (fi
FI801497A (fi
Inventor
Jens Erland Pehrson
Original Assignee
Ericsson Telefon Ab L M
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Telefon Ab L M filed Critical Ericsson Telefon Ab L M
Publication of FI801497A publication Critical patent/FI801497A/fi
Application granted granted Critical
Publication of FI67632B publication Critical patent/FI67632B/sv
Publication of FI67632C publication Critical patent/FI67632C/sv

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0064Concatenated codes
    • H04L1/0065Serial concatenated codes
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041Arrangements at the transmitter end
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0061Error detection codes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/24Testing correct operation
    • H04L1/245Testing correct operation by using the properties of transmission codes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L2001/0092Error control systems characterised by the topology of the transmission link
    • H04L2001/0097Relays

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Detection And Correction Of Errors (AREA)
  • Multi Processors (AREA)
  • Maintenance And Management Of Digital Transmission (AREA)
FI801497A 1979-05-15 1980-05-08 Saett och anordning foer att oevervaka fel vid dataoeverfoering mellan datorer FI67632C (fi)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
SE7904270A SE417760B (sv) 1979-05-15 1979-05-15 Sett att vid dataoverforing mellan en sendande dator och en mottagande dator overvaka fel och anordning for genomforande av settet
SE7904270 1979-05-15

Publications (3)

Publication Number Publication Date
FI801497A FI801497A (fi) 1980-11-16
FI67632B FI67632B (fi) 1984-12-31
FI67632C true FI67632C (fi) 1985-04-10

Family

ID=20338063

Family Applications (1)

Application Number Title Priority Date Filing Date
FI801497A FI67632C (fi) 1979-05-15 1980-05-08 Saett och anordning foer att oevervaka fel vid dataoeverfoering mellan datorer

Country Status (18)

Country Link
US (1) US4390989A (it)
EP (1) EP0028619B1 (it)
JP (1) JPS56500549A (it)
AR (1) AR232050A1 (it)
BR (1) BR8008867A (it)
CA (1) CA1150843A (it)
DE (1) DE3068583D1 (it)
DK (1) DK15481A (it)
ES (1) ES491476A0 (it)
FI (1) FI67632C (it)
IE (1) IE49596B1 (it)
IN (1) IN154500B (it)
IT (1) IT8022043A0 (it)
MX (1) MX149002A (it)
NO (1) NO153668C (it)
SE (1) SE417760B (it)
WO (1) WO1980002611A1 (it)
YU (1) YU40777B (it)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4583161A (en) * 1981-04-16 1986-04-15 Ncr Corporation Data processing system wherein all subsystems check for message errors
WO1982003710A1 (en) * 1981-04-16 1982-10-28 Ncr Co Data processing system having error checking capability
JPS60196027A (ja) * 1984-03-19 1985-10-04 Tsubakimoto Chain Co 時分割多重伝送方式
US4712215A (en) * 1985-12-02 1987-12-08 Advanced Micro Devices, Inc. CRC calculation machine for separate calculation of checkbits for the header packet and data packet
DE3605359C2 (de) * 1986-02-20 1995-03-16 Bosch Gmbh Robert Rechnersystem mit mehreren Rechnern
IT1191903B (it) * 1986-05-15 1988-03-31 Selenia Spazio Spa Sistema di codifica-decodifica concatenata per la protezione dai disturbi di trasmissioni digitali effettuate attraverso un ripetitore rigenerativo intermedio
US4908521A (en) * 1987-01-06 1990-03-13 Visa International Service Association Transaction approval system
DE3785211T2 (de) * 1987-10-30 1993-10-07 Ibm Mittel für Datenintegritätssicherung.
US4868824A (en) * 1987-12-28 1989-09-19 American Telephone And Telegraph Company Measurement of missed start-up rate and missed message rate
JP2799515B2 (ja) * 1990-01-23 1998-09-17 日本電信電話株式会社 データ伝送誤り検査符号生成回路
JP2799516B2 (ja) * 1990-01-23 1998-09-17 日本電信電話株式会社 データ伝送誤り検査符号生成回路
US5247524A (en) * 1990-06-29 1993-09-21 Digital Equipment Corporation Method for generating a checksum
EP0473102B1 (en) * 1990-08-29 1995-11-22 Honeywell Inc. Data communication system with checksum calculating means
US6151689A (en) * 1992-12-17 2000-11-21 Tandem Computers Incorporated Detecting and isolating errors occurring in data communication in a multiple processor system
GB9312135D0 (en) * 1993-06-11 1993-07-28 Inmos Ltd Generation of checking data
US6141784A (en) * 1997-11-26 2000-10-31 International Business Machines Corporation Method and system in a data communications system for the retransmission of only an incorrectly transmitted portion of a data packet
US6049902A (en) * 1997-11-26 2000-04-11 International Business Machines Corporation Method and system in a data communications system for the establishment of multiple, related data links and the utilization of one data link for recovery of errors detected on another link
EP1260023A2 (en) * 2000-02-17 2002-11-27 Analog Devices, Inc. Method, apparatus, and product for use in generating crc and other remainder based codes
JP6295961B2 (ja) * 2012-11-13 2018-03-20 日本電気株式会社 メッセージ認証システム、およびメッセージ認証方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3573726A (en) * 1968-09-26 1971-04-06 Computer Ind Inc Partial modification and check sum accumulation for error detection in data systems
US3753225A (en) * 1971-11-19 1973-08-14 Eaton Corp Communication technique
US3967250A (en) * 1972-05-22 1976-06-29 Kokusai Denshin Denwa Kabushiki Kaisha Control system of an electronic exchange
US4112414A (en) * 1977-01-03 1978-09-05 Chevron Research Company Host-controlled fault diagnosis in a data communication system
US4208650A (en) * 1978-01-30 1980-06-17 Forney Engineering Company Data transmission system

Also Published As

Publication number Publication date
DK15481A (da) 1981-01-14
IT8022043A0 (it) 1980-05-14
ES8200778A1 (es) 1981-11-01
FI67632B (fi) 1984-12-31
DE3068583D1 (en) 1984-08-23
WO1980002611A1 (en) 1980-11-27
US4390989A (en) 1983-06-28
JPS56500549A (it) 1981-04-23
EP0028619B1 (en) 1984-07-18
EP0028619A1 (en) 1981-05-20
IE800983L (en) 1980-11-15
FI801497A (fi) 1980-11-16
MX149002A (es) 1983-08-05
SE7904270L (sv) 1980-11-16
NO153668B (no) 1986-01-20
YU40777B (en) 1986-06-30
AR232050A1 (es) 1985-04-30
CA1150843A (en) 1983-07-26
YU128480A (en) 1983-04-30
NO153668C (no) 1986-04-30
IE49596B1 (en) 1985-10-30
NO810119L (no) 1981-01-14
IN154500B (it) 1984-11-03
SE417760B (sv) 1981-04-06
ES491476A0 (es) 1981-11-01
BR8008867A (pt) 1981-08-11

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MM Patent lapsed

Owner name: OY L M ERICSSON AB