FI112709B - Fördelning av dataminne i ett flerprosessorsystem - Google Patents

Fördelning av dataminne i ett flerprosessorsystem Download PDF

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Publication number
FI112709B
FI112709B FI953204A FI953204A FI112709B FI 112709 B FI112709 B FI 112709B FI 953204 A FI953204 A FI 953204A FI 953204 A FI953204 A FI 953204A FI 112709 B FI112709 B FI 112709B
Authority
FI
Finland
Prior art keywords
signal
memory
data
nämnda
processor
Prior art date
Application number
FI953204A
Other languages
English (en)
Finnish (fi)
Other versions
FI953204A (sv
FI953204A0 (sv
Inventor
Paul W Dent
Alf Joergen Peter Larsson
Original Assignee
Ericsson Ge Mobile Communicat
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Ge Mobile Communicat filed Critical Ericsson Ge Mobile Communicat
Publication of FI953204A0 publication Critical patent/FI953204A0/sv
Publication of FI953204A publication Critical patent/FI953204A/sv
Application granted granted Critical
Publication of FI112709B publication Critical patent/FI112709B/sv

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G06F13/30—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal with priority control
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04M—TELEPHONIC COMMUNICATION
    • H04M1/00—Substation equipment, e.g. for use by subscribers
    • H04M1/72—Mobile telephones; Cordless telephones, i.e. devices for establishing wireless links to base stations without route selection
    • H04M1/725—Cordless telephones

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Memory System (AREA)
  • Multi Processors (AREA)
FI953204A 1993-11-01 1995-06-28 Fördelning av dataminne i ett flerprosessorsystem FI112709B (sv)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US14364093A 1993-11-01 1993-11-01
US14364093 1993-11-01
PCT/US1994/012634 WO1995012854A1 (en) 1993-11-01 1994-11-01 Multiprocessor data memory sharing
US9412634 1994-11-01

Publications (3)

Publication Number Publication Date
FI953204A0 FI953204A0 (sv) 1995-06-28
FI953204A FI953204A (sv) 1995-08-28
FI112709B true FI112709B (sv) 2003-12-31

Family

ID=22504949

Family Applications (1)

Application Number Title Priority Date Filing Date
FI953204A FI112709B (sv) 1993-11-01 1995-06-28 Fördelning av dataminne i ett flerprosessorsystem

Country Status (10)

Country Link
US (1) US5598575A (sv)
JP (1) JP3877231B2 (sv)
KR (1) KR100324885B1 (sv)
CN (1) CN1038160C (sv)
AU (1) AU675169B2 (sv)
DE (1) DE4438975A1 (sv)
FI (1) FI112709B (sv)
FR (1) FR2714747B1 (sv)
GB (1) GB2283596B (sv)
WO (1) WO1995012854A1 (sv)

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US5815674A (en) * 1996-07-15 1998-09-29 Micron Electronics, Inc. Method and system for interfacing a plurality of bus requesters with a computer bus
EP1059588A1 (en) * 1999-06-09 2000-12-13 Texas Instruments Incorporated Multi-channel dma with request scheduling
DE69919992T2 (de) * 1999-06-09 2005-01-20 Texas Instruments Inc., Dallas Verteilter Speicher mit programmierbarer Grösse
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IT1320466B1 (it) * 2000-06-29 2003-11-26 Cselt Centro Studi Lab Telecom Procedimento e apparecchiuatura per l'arbitrio di processi concorrenti in sistemi multiprocessore.
US6785284B1 (en) * 2000-08-10 2004-08-31 Infineon Technologies North America Corp. Interleavement for transport of frames and cells
EP1317712A1 (en) * 2000-09-06 2003-06-11 Koninklijke Philips Electronics N.V. Inter-processor communication system
FR2824650A1 (fr) 2001-05-10 2002-11-15 Koninkl Philips Electronics Nv Systeme de traitement de donnees et procede de distribution d'acces a des memoires
JP2002342104A (ja) * 2001-05-18 2002-11-29 Hitachi Ltd 制御装置及びそれを用いた光ディスク装置
US7024511B2 (en) * 2001-06-22 2006-04-04 Intel Corporation Method and apparatus for active memory bus peripheral control utilizing address call sequencing
KR100761473B1 (ko) * 2001-07-19 2007-09-27 삼성전자주식회사 휴대용 기기의 파일관리장치 및 파일관리방법
US20030095447A1 (en) * 2001-11-20 2003-05-22 Koninklijke Philips Electronics N.V. Shared memory controller for display processor
JP2004096534A (ja) * 2002-09-02 2004-03-25 Nec Corp 携帯電話器およびその制御方法
US7139881B2 (en) * 2003-09-25 2006-11-21 International Business Machines Corporation Semiconductor device comprising a plurality of memory structures
US20050132145A1 (en) * 2003-12-15 2005-06-16 Finisar Corporation Contingent processor time division multiple access of memory in a multi-processor system to allow supplemental memory consumer access
EP1550953A1 (en) * 2003-12-29 2005-07-06 CNX S.p.A. Method and device implementing a time multiplexed access to a single dual port RAM from several data source with independent clocks
JP3949674B2 (ja) * 2004-05-11 2007-07-25 株式会社コナミデジタルエンタテインメント 表示装置、表示方法、ならびに、プログラム
US7660916B2 (en) * 2005-06-16 2010-02-09 Agere Systems Inc. Emulation of independent active DMA channels with a single DMA capable bus master hardware and firmware
JP2010003067A (ja) * 2008-06-19 2010-01-07 Sony Corp メモリシステムおよびそのアクセス制御方法、並びにプログラム
WO2010016169A1 (ja) * 2008-08-07 2010-02-11 日本電気株式会社 マルチプロセッサシステム及びその制御方法
EP2382637B1 (en) * 2008-12-30 2016-01-06 Micron Technology, Inc. Enhanced addressability for serial non-volatile memory
CN101763484B (zh) * 2009-10-10 2012-05-23 北京派瑞根科技开发有限公司 高安全信息网络系统
US20110321052A1 (en) * 2010-06-23 2011-12-29 International Business Machines Corporation Mutli-priority command processing among microcontrollers
FR2961923B1 (fr) * 2010-06-25 2013-12-20 Commissariat Energie Atomique Dispositif, chaine et procede de traitement de donnees, et programme d'ordinateur correspondant
FR2961922B1 (fr) * 2010-06-29 2013-12-13 Flexycore Procede de compilation selective, dispositif et produit programme d'ordinateur correspondant.
CN102567238B (zh) * 2010-12-13 2015-12-16 联想(北京)有限公司 接口切换控制方法、便携终端、便携移动设备及输入设备
GB2495959A (en) * 2011-10-26 2013-05-01 Imagination Tech Ltd Multi-threaded memory access processor
US9373182B2 (en) * 2012-08-17 2016-06-21 Intel Corporation Memory sharing via a unified memory architecture
CN103200131B (zh) * 2013-04-03 2015-08-19 清华大学深圳研究生院 一种数据收发装置
CN106294233B (zh) * 2015-06-29 2019-05-03 华为技术有限公司 一种直接内存访问的传输控制方法及装置
US9921986B2 (en) 2015-10-27 2018-03-20 International Business Machines Corporation Suspend and resume in a time shared coprocessor
CN110162122B (zh) * 2019-04-29 2021-02-12 贵州贵谷农业股份有限公司 一种双中控的大棚控制系统
CN113778040B (zh) * 2021-11-11 2022-02-15 西安热工研究院有限公司 一种基于火电厂嵌入式智能控制的装置及方法
CN116155290B (zh) * 2023-04-18 2023-07-21 青岛本原微电子有限公司 一种模数转换单元的控制装置及控制方法

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Also Published As

Publication number Publication date
WO1995012854A1 (en) 1995-05-11
FI953204A (sv) 1995-08-28
CN1038160C (zh) 1998-04-22
DE4438975A1 (de) 1995-06-29
CN1117318A (zh) 1996-02-21
GB9421100D0 (en) 1994-12-07
AU7741494A (en) 1995-05-18
KR960700478A (ko) 1996-01-20
JPH07281946A (ja) 1995-10-27
GB2283596B (en) 1998-07-01
GB2283596A (en) 1995-05-10
KR100324885B1 (ko) 2002-07-03
US5598575A (en) 1997-01-28
FI953204A0 (sv) 1995-06-28
AU675169B2 (en) 1997-01-23
JP3877231B2 (ja) 2007-02-07
FR2714747A1 (fr) 1995-07-07
FR2714747B1 (fr) 1997-06-13

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