ES8707631A1 - Un metodo mejorado para separar un dispositivo conductor de menor area a partir de un area mayor de una estructura semiconductora - Google Patents

Un metodo mejorado para separar un dispositivo conductor de menor area a partir de un area mayor de una estructura semiconductora

Info

Publication number
ES8707631A1
ES8707631A1 ES553395A ES553395A ES8707631A1 ES 8707631 A1 ES8707631 A1 ES 8707631A1 ES 553395 A ES553395 A ES 553395A ES 553395 A ES553395 A ES 553395A ES 8707631 A1 ES8707631 A1 ES 8707631A1
Authority
ES
Spain
Prior art keywords
area
severing
semiconductor
semiconductor device
top electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES553395A
Other languages
English (en)
Other versions
ES553395A0 (es
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sovonics Solar Systems
Original Assignee
Sovonics Solar Systems
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sovonics Solar Systems filed Critical Sovonics Solar Systems
Publication of ES553395A0 publication Critical patent/ES553395A0/es
Publication of ES8707631A1 publication Critical patent/ES8707631A1/es
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/20—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
    • H01L31/206—Particular processes or apparatus for continuous treatment of the devices, e.g. roll-to roll processes, multi-chamber deposition
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T83/00—Cutting
    • Y10T83/04—Processes
    • Y10T83/0524—Plural cutting steps
    • Y10T83/0538—Repetitive transverse severing from leading edge of work
    • Y10T83/0548—With longitudinal severing
    • Y10T83/0562—Prior to transverse severing

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Photovoltaic Devices (AREA)
  • Dicing (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

METODO PARA SEPARAR UN DISPOSITIVO CONDUCTOR DE MENOR AREA A PARTIR DE UN AREA MAYOR DE UNA ESTRUCTURA SEMICONDUCTORA, SIN CREAR CORTOCIRCUITOS. CONSISTE EN SOPORTAR EL REVESTIMIENTO CONDUCTOR DE LA MAYOR AREA Y APLICAR UNA FUERZA DE CIZALLAMIENTO AL SUSTRATO CERCA DEL SOPORTE, PARA SEPARAR UNA MENOR AREA DE LA ESTRUCTURA A PARTIR DE DICHA ESTRUCTURA DE MAYOR AREA. ANTES DE SOPORTAR EL REVESTIMIENTO SE DEBE DISPONER UN MIEMBRO PROTECTOR DEL MISMO, EL CUAL SE SELECCIONA ENTRE CARTON, PAPEL, POLIMEROS Y COMBINACIONES DE LOS MISMOS. DE APLICACION EN LA PREPARACION POR DESCARGA INCANDESCENTE O POR DEPOSICION EN FASE VAPOR, DE ALEACIONES DE SILICIO O GERMANIO AMORFAS EN PELICULA DELGADA, CON CALIDAD PARA DISPOSITIVOS EN GRANDES AREAS.
ES553395A 1985-04-01 1986-03-25 Un metodo mejorado para separar un dispositivo conductor de menor area a partir de un area mayor de una estructura semiconductora Expired ES8707631A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/718,770 US4704369A (en) 1985-04-01 1985-04-01 Method of severing a semiconductor device

Publications (2)

Publication Number Publication Date
ES553395A0 ES553395A0 (es) 1987-08-01
ES8707631A1 true ES8707631A1 (es) 1987-08-01

Family

ID=24887463

Family Applications (1)

Application Number Title Priority Date Filing Date
ES553395A Expired ES8707631A1 (es) 1985-04-01 1986-03-25 Un metodo mejorado para separar un dispositivo conductor de menor area a partir de un area mayor de una estructura semiconductora

Country Status (11)

Country Link
US (1) US4704369A (es)
EP (1) EP0197679B1 (es)
JP (1) JP2502513B2 (es)
AU (1) AU577010B2 (es)
BR (1) BR8601422A (es)
CA (1) CA1244558A (es)
DE (1) DE3679697D1 (es)
ES (1) ES8707631A1 (es)
IN (1) IN164588B (es)
MX (1) MX167950B (es)
ZA (1) ZA862254B (es)

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JPS63280464A (ja) * 1987-05-12 1988-11-17 Sanyo Electric Co Ltd 太陽電池モジュ−ルの製造方法
US4999160A (en) * 1989-12-04 1991-03-12 Micron Technology, Inc. Aluminum alloy containing copper, silicon and titanium for VLSI devices
US5139969A (en) * 1990-05-30 1992-08-18 Mitsubishi Denki Kabushiki Kaisha Method of making resin molded semiconductor device
JP2951060B2 (ja) * 1990-12-27 1999-09-20 三洋電機株式会社 光起電力装置の製造方法
US5637537A (en) * 1991-06-27 1997-06-10 United Solar Systems Corporation Method of severing a thin film semiconductor device
DE4415132C2 (de) * 1994-04-29 1997-03-20 Siemens Ag Verfahren zur formgebenden Bearbeitung von dünnen Wafern und Solarzellen aus kristallinem Silizium
US7732243B2 (en) 1995-05-15 2010-06-08 Daniel Luch Substrate structures for integrated series connected photovoltaic arrays and process of manufacture of such arrays
US20080314433A1 (en) * 1995-05-15 2008-12-25 Daniel Luch Substrate structures for integrated series connected photovoltaic arrays and process of manufacture of such arrays
JPH114010A (ja) * 1997-06-13 1999-01-06 Canon Inc 太陽電池モジュールの製造方法及び設置方法
AU2003200108B2 (en) * 1997-06-13 2004-12-02 Canon Kabushiki Kaisha Solar Cell Module, Production Method Thereof, and Installation Method of Solar Cell Modules
US6316283B1 (en) 1998-03-25 2001-11-13 Asulab Sa Batch manufacturing method for photovoltaic cells
US6642077B1 (en) 1998-03-25 2003-11-04 Asulab S.A. Method for manufacturing and assembling photovoltaic cells
EP0948060B1 (fr) * 1998-03-27 2008-07-16 Asulab S.A. Procédé de fabrication collective de cellules photovoltaïques
US8138413B2 (en) 2006-04-13 2012-03-20 Daniel Luch Collector grid and interconnect structures for photovoltaic arrays and modules
US8076568B2 (en) 2006-04-13 2011-12-13 Daniel Luch Collector grid and interconnect structures for photovoltaic arrays and modules
US20090111206A1 (en) 1999-03-30 2009-04-30 Daniel Luch Collector grid, electrode structures and interrconnect structures for photovoltaic arrays and methods of manufacture
US8664030B2 (en) 1999-03-30 2014-03-04 Daniel Luch Collector grid and interconnect structures for photovoltaic arrays and modules
US7635810B2 (en) * 1999-03-30 2009-12-22 Daniel Luch Substrate and collector grid structures for integrated photovoltaic arrays and process of manufacture of such arrays
US7507903B2 (en) 1999-03-30 2009-03-24 Daniel Luch Substrate and collector grid structures for integrated series connected photovoltaic arrays and process of manufacture of such arrays
US8222513B2 (en) 2006-04-13 2012-07-17 Daniel Luch Collector grid, electrode structures and interconnect structures for photovoltaic arrays and methods of manufacture
US7898053B2 (en) 2000-02-04 2011-03-01 Daniel Luch Substrate structures for integrated series connected photovoltaic arrays and process of manufacture of such arrays
US7898054B2 (en) 2000-02-04 2011-03-01 Daniel Luch Substrate structures for integrated series connected photovoltaic arrays and process of manufacture of such arrays
US8198696B2 (en) 2000-02-04 2012-06-12 Daniel Luch Substrate structures for integrated series connected photovoltaic arrays and process of manufacture of such arrays
US7067849B2 (en) 2001-07-17 2006-06-27 Lg Electronics Inc. Diode having high brightness and method thereof
US6949395B2 (en) 2001-10-22 2005-09-27 Oriol, Inc. Method of making diode having reflective layer
US7148520B2 (en) 2001-10-26 2006-12-12 Lg Electronics Inc. Diode having vertical structure and method of manufacturing the same
US6767762B2 (en) 2002-07-23 2004-07-27 United Solar Systems Corporation Lightweight semiconductor device and method for its manufacture
US20060289966A1 (en) * 2005-06-22 2006-12-28 Dani Ashay A Silicon wafer with non-soluble protective coating
US8729385B2 (en) 2006-04-13 2014-05-20 Daniel Luch Collector grid and interconnect structures for photovoltaic arrays and modules
US8884155B2 (en) 2006-04-13 2014-11-11 Daniel Luch Collector grid and interconnect structures for photovoltaic arrays and modules
US9865758B2 (en) 2006-04-13 2018-01-09 Daniel Luch Collector grid and interconnect structures for photovoltaic arrays and modules
US9006563B2 (en) 2006-04-13 2015-04-14 Solannex, Inc. Collector grid and interconnect structures for photovoltaic arrays and modules
US8822810B2 (en) 2006-04-13 2014-09-02 Daniel Luch Collector grid and interconnect structures for photovoltaic arrays and modules
US9236512B2 (en) 2006-04-13 2016-01-12 Daniel Luch Collector grid and interconnect structures for photovoltaic arrays and modules
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JP2013089659A (ja) * 2011-10-14 2013-05-13 Nitto Denko Corp 太陽電池セルの製造方法、及び太陽電池モジュール
EP2828901B1 (en) 2012-03-21 2017-01-04 Parker Hannifin Corporation Roll-to-roll manufacturing processes for producing self-healing electroactive polymer devices
EP2885867A4 (en) * 2012-08-16 2016-04-13 Bayer Ip Gmbh ELECTRICAL INTERCONNECTION TERMINALS FOR LAMINATED DIELECTRIC ELASTOMERIC TRANSDUCERS

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Also Published As

Publication number Publication date
US4704369A (en) 1987-11-03
ES553395A0 (es) 1987-08-01
MX167950B (es) 1993-04-26
DE3679697D1 (de) 1991-07-18
EP0197679A2 (en) 1986-10-15
AU5553286A (en) 1986-10-09
JPS61263173A (ja) 1986-11-21
IN164588B (es) 1989-04-15
CA1244558A (en) 1988-11-08
BR8601422A (pt) 1986-12-09
AU577010B2 (en) 1988-09-08
EP0197679A3 (en) 1988-01-13
ZA862254B (en) 1986-11-26
EP0197679B1 (en) 1991-06-12
JP2502513B2 (ja) 1996-05-29

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Legal Events

Date Code Title Description
FD1A Patent lapsed

Effective date: 20070428