JPS54868A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS54868A
JPS54868A JP6569677A JP6569677A JPS54868A JP S54868 A JPS54868 A JP S54868A JP 6569677 A JP6569677 A JP 6569677A JP 6569677 A JP6569677 A JP 6569677A JP S54868 A JPS54868 A JP S54868A
Authority
JP
Japan
Prior art keywords
semiconductor device
way
solder
substrate
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6569677A
Other languages
Japanese (ja)
Inventor
Tamio Saito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP6569677A priority Critical patent/JPS54868A/en
Publication of JPS54868A publication Critical patent/JPS54868A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE: The electrode is buried into the hole drilled on the substrate in such a way that the electrode component surface may be positioned lower then the substrate surface, and the solder is filled at the upper part of the hole. In this way, the solder outflow can be prevented, at the same time securing an assured positioning of the lead wire.
COPYRIGHT: (C)1979,JPO&Japio
JP6569677A 1977-06-06 1977-06-06 Semiconductor device Pending JPS54868A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6569677A JPS54868A (en) 1977-06-06 1977-06-06 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6569677A JPS54868A (en) 1977-06-06 1977-06-06 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS54868A true JPS54868A (en) 1979-01-06

Family

ID=13294424

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6569677A Pending JPS54868A (en) 1977-06-06 1977-06-06 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS54868A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4694702A (en) * 1984-09-12 1987-09-22 Tokico Ltd. Vortex shedding flowmeter
JPS6356394A (en) * 1986-08-26 1988-03-10 Showa Alum Corp Aluminum alloy filler metal
JPS63248593A (en) * 1987-03-31 1988-10-14 Showa Alum Corp Aluminum alloy filler metal

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4694702A (en) * 1984-09-12 1987-09-22 Tokico Ltd. Vortex shedding flowmeter
JPS6356394A (en) * 1986-08-26 1988-03-10 Showa Alum Corp Aluminum alloy filler metal
JPS63248593A (en) * 1987-03-31 1988-10-14 Showa Alum Corp Aluminum alloy filler metal

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