ES8702009A1 - Perfeccionamientos en un bucle digital enganchado en fase de frecuencia multiple. - Google Patents
Perfeccionamientos en un bucle digital enganchado en fase de frecuencia multiple.Info
- Publication number
- ES8702009A1 ES8702009A1 ES539342A ES539342A ES8702009A1 ES 8702009 A1 ES8702009 A1 ES 8702009A1 ES 539342 A ES539342 A ES 539342A ES 539342 A ES539342 A ES 539342A ES 8702009 A1 ES8702009 A1 ES 8702009A1
- Authority
- ES
- Spain
- Prior art keywords
- locked loop
- digital phase
- clock signal
- phase
- multiple frequency
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000002131 composite material Substances 0.000 abstract 2
- 230000000694 effects Effects 0.000 abstract 2
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D13/00—Circuits for comparing the phase or frequency of two mutually-independent oscillations
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K23/00—Pulse counters comprising counting chains; Frequency dividers comprising counting chains
- H03K23/64—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two
- H03K23/66—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two with a variable counting base, e.g. by presetting or by adding or suppressing pulses
- H03K23/662—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two with a variable counting base, e.g. by presetting or by adding or suppressing pulses by adding or suppressing pulses
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/095—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using a lock detector
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
- H03L7/0991—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
- H03L7/0992—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider comprising a counter or a frequency divider
- H03L7/0993—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider comprising a counter or a frequency divider and a circuit for adding and deleting pulses
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L7/0331—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Waveguide Switches, Polarizers, And Phase Shifters (AREA)
- Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
Abstract
BUCLE DITGITAL ENGANCHADO EN FASE DE FRECUENCIA MULTIPLE. SE CARACTERIZA PORQUE LA FRECUENCIA CENTRAL DE FUNCIONAMIENTO DEL CIRCUITO SE PUEDE ALTERAR DE UNA FORMA PROGRAMABLE SIN ALTERAR LA RELACION DEL DIVISOR DE FRECUENCIA EN LA PARTE DE LA REALIMENTACION DEL BUCLE DIGITAL ENGANCHADO EN FASE. COMPRENDE UN COMPARADOR DE FASE CON DOS ENTRADAS QUE SE ACOPLAN A LA SEÑAL DE DATOS RECIBIDA Y A LA SEÑAL DE SALIDA DEL BUCLE RESPECTIVAMENTE; ASI COMO UNA SALIDA INDICATIVA DE LA FASE RELATIVA ENTRE SALIDA Y ENTRADA. CONSTA TAMBIEN DE UN RELOJ QUE GENERA UNA SEÑAL DE REFERENCIA, QUE ATRAVIESA DESPUES UN DIVISOR PROGRAMABLE Y MEDIOS DE AJUSTE DE FASE Y FRECUENCIA ACOPLADOS AL RELOJ PARA PRODUCIR UNA SEÑAL DE RELOJ COMPUESTA A LOS QUE SE AÑADE OTRO DIVISOR DE FRECUENCIA. TAMBIEN SE DISPONE DE UN MEDIO DE CONTROL DEL AMCHO DE BANDA ACOPLADO ENTRE EL COMPARADOR DE FASE Y EL MEDIO DE AJUSTE DE FRECUENCIA Y FASE.
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US56772584A | 1984-01-03 | 1984-01-03 | |
US06/567,724 US4573017A (en) | 1984-01-03 | 1984-01-03 | Unitary phase and frequency adjust network for a multiple frequency digital phase locked loop |
US06/567,714 US4617520A (en) | 1984-01-03 | 1984-01-03 | Digital lock detector for a phase-locked loop |
US06/567,715 US4574243A (en) | 1984-01-03 | 1984-01-03 | Multiple frequency digital phase locked loop |
Publications (2)
Publication Number | Publication Date |
---|---|
ES539342A0 ES539342A0 (es) | 1986-12-01 |
ES8702009A1 true ES8702009A1 (es) | 1986-12-01 |
Family
ID=27504867
Family Applications (4)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES539342A Expired ES8702009A1 (es) | 1984-01-03 | 1985-01-03 | Perfeccionamientos en un bucle digital enganchado en fase de frecuencia multiple. |
ES550912A Expired ES8800803A1 (es) | 1984-01-03 | 1986-01-15 | Perfeccionamientos en una red de compensacion de fase y frecuencia |
ES550914A Expired ES8800801A1 (es) | 1984-01-03 | 1986-01-15 | Perfeccionamientos en un comparadorde fases para un bucle digital |
ES550913A Expired ES8800442A1 (es) | 1984-01-03 | 1986-01-15 | Perfeccionamientos en un detector de enganche para un bucle digital enganchado en fase |
Family Applications After (3)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES550912A Expired ES8800803A1 (es) | 1984-01-03 | 1986-01-15 | Perfeccionamientos en una red de compensacion de fase y frecuencia |
ES550914A Expired ES8800801A1 (es) | 1984-01-03 | 1986-01-15 | Perfeccionamientos en un comparadorde fases para un bucle digital |
ES550913A Expired ES8800442A1 (es) | 1984-01-03 | 1986-01-15 | Perfeccionamientos en un detector de enganche para un bucle digital enganchado en fase |
Country Status (11)
Country | Link |
---|---|
EP (2) | EP0168426B1 (es) |
JP (4) | JPH0744447B2 (es) |
KR (1) | KR940002449B1 (es) |
AT (1) | ATE150916T1 (es) |
AU (1) | AU573682B2 (es) |
DE (1) | DE3486447T2 (es) |
ES (4) | ES8702009A1 (es) |
HK (1) | HK100795A (es) |
MX (1) | MX157636A (es) |
SG (1) | SG28382G (es) |
WO (1) | WO1985003176A1 (es) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05252153A (ja) * | 1992-03-03 | 1993-09-28 | Fujitsu Ltd | ディジタル・ループフィルタ |
US5654991A (en) * | 1995-07-31 | 1997-08-05 | Harris Corporation | Fast acquisition bit timing loop method and apparatus |
JP3171162B2 (ja) | 1998-04-02 | 2001-05-28 | 日本電気株式会社 | Pll回路 |
US6233020B1 (en) * | 1998-08-07 | 2001-05-15 | Thomson Licensing S.A. | Phase lock loop with selectable response |
US6891441B2 (en) | 2002-11-15 | 2005-05-10 | Zoran Corporation | Edge synchronized phase-locked loop circuit |
CN1989751B (zh) | 2004-07-15 | 2011-07-13 | 汤姆森特许公司 | 改进的载波恢复的系统和方法 |
US8035653B2 (en) | 2006-10-27 | 2011-10-11 | Hewlett-Packard Development Company, L.P. | Dynamically adjustable elements of an on-screen display |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3644721A (en) * | 1970-11-09 | 1972-02-22 | Gen Motors Corp | Apparatus and method for digital frequency addition and subtraction |
US4051440A (en) * | 1973-05-15 | 1977-09-27 | Tektronix, Inc. | Phase locked demodulator |
US4014025A (en) * | 1975-03-24 | 1977-03-22 | The Cessna Aircraft Company | Scalloping suppression system and method |
US3982190A (en) * | 1975-07-31 | 1976-09-21 | Rockwell International Corporation | Phaselock circuitry with lock indication |
US3988696A (en) * | 1975-11-28 | 1976-10-26 | The Bendix Corporation | Phase lock detector for digital frequency synthesizer |
JPS601984B2 (ja) * | 1976-10-22 | 1985-01-18 | 日本電気株式会社 | デイジタルpll回路 |
JPS6058609B2 (ja) * | 1977-05-17 | 1985-12-20 | 三洋電機株式会社 | デイジタル型位相比較器 |
US4122405A (en) * | 1977-10-21 | 1978-10-24 | National Semiconductor Corporation | Digital logic level signal indication of phase and frequency lock condition in a phase-locked loop |
US4219784A (en) * | 1978-10-27 | 1980-08-26 | Westinghouse Electric Corp. | Phase detection system using sample and hold technique, and phase locked loop using such phase detection system |
JPS561626A (en) * | 1979-06-18 | 1981-01-09 | Anritsu Corp | Lock indicator for phase synchronous circuit |
JPS6010458B2 (ja) * | 1979-08-23 | 1985-03-18 | 富士通株式会社 | フエ−ズ・ロツクド・ル−プ回路 |
US4308619A (en) * | 1979-12-26 | 1981-12-29 | General Electric Company | Apparatus and methods for synchronizing a digital receiver |
US4345219A (en) * | 1980-02-14 | 1982-08-17 | E-Systems, Inc. | Frequency agile hold-sample-hold phase detector |
US4330758A (en) * | 1980-02-20 | 1982-05-18 | Motorola, Inc. | Synchronized frequency synthesizer with high speed lock |
JPS5944814B2 (ja) * | 1980-02-29 | 1984-11-01 | 沖電気工業株式会社 | 位相比較回路 |
EP0060862B1 (de) * | 1980-09-29 | 1984-12-05 | Hasler AG | Schaltungsanordnung zur erzeugung einer regelspannung in abhängigkeit von der frequenz- oder phasendifferenz und verwendung der schaltungsanordnung |
JPS58171131A (ja) * | 1982-03-31 | 1983-10-07 | Fujitsu Ltd | Pll電圧制御発振器のドリフト検出回路 |
US4456890A (en) * | 1982-04-05 | 1984-06-26 | Computer Peripherals Inc. | Data tracking clock recovery system using digitally controlled oscillator |
AU568051B2 (en) * | 1983-02-16 | 1987-12-10 | Nec Corporation | Frequency stabilisation circuit |
-
1984
- 1984-12-28 MX MX203916A patent/MX157636A/es unknown
- 1984-12-31 KR KR1019850700208A patent/KR940002449B1/ko not_active IP Right Cessation
- 1984-12-31 EP EP85900442A patent/EP0168426B1/en not_active Expired - Lifetime
- 1984-12-31 AT AT91120379T patent/ATE150916T1/de not_active IP Right Cessation
- 1984-12-31 EP EP91120379A patent/EP0490178B1/en not_active Expired - Lifetime
- 1984-12-31 AU AU37877/85A patent/AU573682B2/en not_active Ceased
- 1984-12-31 WO PCT/US1984/002133 patent/WO1985003176A1/en active IP Right Grant
- 1984-12-31 JP JP60500245A patent/JPH0744447B2/ja not_active Expired - Lifetime
- 1984-12-31 SG SG1995906012A patent/SG28382G/en unknown
- 1984-12-31 DE DE3486447T patent/DE3486447T2/de not_active Expired - Fee Related
-
1985
- 1985-01-03 ES ES539342A patent/ES8702009A1/es not_active Expired
-
1986
- 1986-01-15 ES ES550912A patent/ES8800803A1/es not_active Expired
- 1986-01-15 ES ES550914A patent/ES8800801A1/es not_active Expired
- 1986-01-15 ES ES550913A patent/ES8800442A1/es not_active Expired
-
1991
- 1991-07-02 JP JP3188017A patent/JP2541398B2/ja not_active Expired - Fee Related
- 1991-07-02 JP JP3188018A patent/JP2770204B2/ja not_active Expired - Fee Related
- 1991-07-02 JP JP18801991A patent/JPH0738428A/ja active Pending
-
1995
- 1995-06-22 HK HK100795A patent/HK100795A/xx not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
ES550912A0 (es) | 1987-11-16 |
EP0490178B1 (en) | 1997-03-26 |
JP2770204B2 (ja) | 1998-06-25 |
JPH0744447B2 (ja) | 1995-05-15 |
WO1985003176A1 (en) | 1985-07-18 |
EP0168426A4 (en) | 1988-05-10 |
DE3486447T2 (de) | 1997-10-23 |
JPS61501002A (ja) | 1986-05-15 |
EP0490178A1 (en) | 1992-06-17 |
ATE150916T1 (de) | 1997-04-15 |
EP0168426B1 (en) | 1992-08-19 |
ES539342A0 (es) | 1986-12-01 |
KR850700194A (ko) | 1985-10-25 |
AU3787785A (en) | 1985-07-30 |
ES550913A0 (es) | 1987-11-01 |
JPH0738428A (ja) | 1995-02-07 |
ES8800803A1 (es) | 1987-11-16 |
EP0168426A1 (en) | 1986-01-22 |
HK100795A (en) | 1995-06-30 |
AU573682B2 (en) | 1988-06-16 |
MX157636A (es) | 1988-12-07 |
DE3486447D1 (de) | 1997-04-30 |
JP2541398B2 (ja) | 1996-10-09 |
ES550914A0 (es) | 1987-11-16 |
SG28382G (en) | 1995-09-01 |
ES8800801A1 (es) | 1987-11-16 |
JPH0738426A (ja) | 1995-02-07 |
ES8800442A1 (es) | 1987-11-01 |
JPH0738427A (ja) | 1995-02-07 |
KR940002449B1 (ko) | 1994-03-24 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
FD1A | Patent lapsed |
Effective date: 20001102 |