ES402719A1 - Flipchip mounted transistor - Google Patents
Flipchip mounted transistorInfo
- Publication number
- ES402719A1 ES402719A1 ES402719A ES402719A ES402719A1 ES 402719 A1 ES402719 A1 ES 402719A1 ES 402719 A ES402719 A ES 402719A ES 402719 A ES402719 A ES 402719A ES 402719 A1 ES402719 A1 ES 402719A1
- Authority
- ES
- Spain
- Prior art keywords
- layer
- openings
- insulating material
- main surface
- metallic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000010410 layer Substances 0.000 abstract 4
- 239000011810 insulating material Substances 0.000 abstract 2
- 239000002184 metal Substances 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 238000004377 microelectronic Methods 0.000 abstract 1
- 239000011241 protective layer Substances 0.000 abstract 1
- 239000004065 semiconductor Substances 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
- 238000003466 welding Methods 0.000 abstract 1
Classifications
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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- H01L2224/05001—Internal layers
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- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
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Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Bipolar Transistors (AREA)
Abstract
Improvements introduced into transistors intended to be mounted by the method of inverting the tablets on terminal areas included in a substrate of a hybrid micro-electronic circuit, said transistors comprising a semiconductor body (2) having a main surface (7), a plurality of isolated emitter regions (8a, 8b, 8c, id,) a base region (6) and a collector region (4) in said body, each of said regions (4,6,8a-8d) having parts exposed on said surface (7), metallic electrode layers (22a, 22b, 24) directly on and in contact only with said exposed parts, a protective layer of insulating material (12) that covers said main surface (7), said layer not having metallic connections in it, and openings (32,40) in said layer of insulating material (12) for said metallic electrode layers (22a, 22b, 24) characterized in that welding projections (44a, 44d, 46) in said c metal electrode pins (22a, 22b, 24) inside said openings (32,40) (Machine-translation by Google Translate, not legally binding)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US14540671A | 1971-05-20 | 1971-05-20 |
Publications (1)
Publication Number | Publication Date |
---|---|
ES402719A1 true ES402719A1 (en) | 1975-12-01 |
Family
ID=22512964
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES402719A Expired ES402719A1 (en) | 1971-05-20 | 1972-05-13 | Flipchip mounted transistor |
Country Status (8)
Country | Link |
---|---|
AU (1) | AU4236672A (en) |
BE (1) | BE783729A (en) |
DE (1) | DE2224334A1 (en) |
ES (1) | ES402719A1 (en) |
FR (1) | FR2138731A1 (en) |
GB (1) | GB1374867A (en) |
IT (1) | IT955650B (en) |
NL (1) | NL7206816A (en) |
-
1972
- 1972-05-12 GB GB2244172A patent/GB1374867A/en not_active Expired
- 1972-05-13 ES ES402719A patent/ES402719A1/en not_active Expired
- 1972-05-17 AU AU42366/72A patent/AU4236672A/en not_active Expired
- 1972-05-18 IT IT24551/72A patent/IT955650B/en active
- 1972-05-18 DE DE19722224334 patent/DE2224334A1/en active Pending
- 1972-05-18 FR FR7217768A patent/FR2138731A1/fr not_active Withdrawn
- 1972-05-19 BE BE783729A patent/BE783729A/en unknown
- 1972-05-19 NL NL7206816A patent/NL7206816A/xx unknown
Also Published As
Publication number | Publication date |
---|---|
FR2138731A1 (en) | 1973-01-05 |
GB1374867A (en) | 1974-11-20 |
BE783729A (en) | 1972-09-18 |
IT955650B (en) | 1973-09-29 |
AU4236672A (en) | 1973-11-22 |
DE2224334A1 (en) | 1972-11-30 |
NL7206816A (en) | 1972-11-22 |
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