ES2026444T3 - Procedimiento y disposicion de circuitos para la suma de numeros de coma flotante. - Google Patents

Procedimiento y disposicion de circuitos para la suma de numeros de coma flotante.

Info

Publication number
ES2026444T3
ES2026444T3 ES198686115152T ES86115152T ES2026444T3 ES 2026444 T3 ES2026444 T3 ES 2026444T3 ES 198686115152 T ES198686115152 T ES 198686115152T ES 86115152 T ES86115152 T ES 86115152T ES 2026444 T3 ES2026444 T3 ES 2026444T3
Authority
ES
Spain
Prior art keywords
remainder
floating point
sum
stage
adder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES198686115152T
Other languages
English (en)
Inventor
D. K. Dipl.-Ing. Unkauf
A.T. Dipl.-Ing. Gerlicher
S.M. Priv.-Doz. Dr. Rump
J. H. Dr.-Ing. Bleher
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of ES2026444T3 publication Critical patent/ES2026444T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/483—Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers
    • G06F7/485—Adding; Subtracting

Abstract

PARA LA ADICION SUCESIVA DE UNA SERIE DE NUMEROS VARIABLES DE PUNTOS FLOTNTES SE EMPLEA UNA ETAPA DE ADICION DE PUNTOS QUE SE DISTRIBUYE JUNTO A LA ZONA DE DOS OPERANDOS DE PUNTO VARIABLE CON EL RESTO SEPARADO DE LOS OPERANDOS MINIMOS COMO NUMEROS VARIABLES DE PUNTO FLOTANTE. PARA LOGRAR UNA SUMA EXACTA DE LOS OPERANDO SE ADICIONA EL RESTO EN LA SUMA INTERMEDIA. UN SISTEMA PARA LOGRAR UN FUNCIONAMIENTO PARALELO CONTIENE UNA CONEXION EN SERIE DE ETAPAS DE ADICION DE PUNTO FLOTANTE. EN LA SALIDA DE CADA ETAPA SE ACUMULA LA SUMA INTERMEDIA PRODUCIDA Y EL RESTO INTERMEDIO ORIGINADO. EL RESTO PRODUCIDO SE TRANSMITE EN SUCESIVAS ETAPAS SIEMPRE CON VALORES PEQUEÑOS Y FINALMENTE SE HACE CERO. UN MECANISMO CON FUNCIONAMIENTO EN SERIE CONTIENE SOLAMENTE UNA ETAPA (30) DE ADICION UNICA Y UN REGISTRADOR (34) DE ADICIONES PARA ACUMULACIONES INTERMEDIAS DE LA SUMA INTERMEDIA Y LOS RESULTADOS FINALES. UN RESTO ORIGINADO EN UN REGISTRADOR DE RESTO (32) SE ACUMULA EN LA SALIDA DE LA ETAPA DE ADICION Y SEADICIONA EN LA SUMA INTERMEDIA HASTA OBTENER UN RESTO NULO. SE COLOCA UN NUEVO OPERANDO EN LA ENTRADA DE LA ETAPA DE ADICION.
ES198686115152T 1986-10-31 1986-10-31 Procedimiento y disposicion de circuitos para la suma de numeros de coma flotante. Expired - Lifetime ES2026444T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP86115152A EP0265555B1 (de) 1986-10-31 1986-10-31 Verfahren und Schaltungsanordnung zur Addition von Gleitkommazahlen

Publications (1)

Publication Number Publication Date
ES2026444T3 true ES2026444T3 (es) 1992-05-01

Family

ID=8195554

Family Applications (1)

Application Number Title Priority Date Filing Date
ES198686115152T Expired - Lifetime ES2026444T3 (es) 1986-10-31 1986-10-31 Procedimiento y disposicion de circuitos para la suma de numeros de coma flotante.

Country Status (9)

Country Link
US (1) US4866651A (es)
EP (1) EP0265555B1 (es)
JP (1) JPS63123125A (es)
AT (1) ATE67619T1 (es)
AU (1) AU589049B2 (es)
BR (1) BR8705232A (es)
CA (1) CA1270955A (es)
DE (1) DE3681591D1 (es)
ES (1) ES2026444T3 (es)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5268856A (en) * 1988-06-06 1993-12-07 Applied Intelligent Systems, Inc. Bit serial floating point parallel processing system and method
JP2693800B2 (ja) * 1988-12-28 1997-12-24 甲府日本電気株式会社 浮動小数点データ総和演算回路
US5111421A (en) * 1990-02-26 1992-05-05 General Electric Company System for performing addition and subtraction of signed magnitude floating point binary numbers
US5493520A (en) * 1994-04-15 1996-02-20 International Business Machines Corporation Two state leading zero/one anticipator (LZA)
US5557734A (en) * 1994-06-17 1996-09-17 Applied Intelligent Systems, Inc. Cache burst architecture for parallel processing, such as for image processing
US5880983A (en) * 1996-03-25 1999-03-09 International Business Machines Corporation Floating point split multiply/add system which has infinite precision
US5790445A (en) * 1996-04-30 1998-08-04 International Business Machines Corporation Method and system for performing a high speed floating point add operation
US7827451B2 (en) * 2006-05-24 2010-11-02 International Business Machines Corporation Method, system and program product for establishing decimal floating point operands for facilitating testing of decimal floating point instructions
US10019227B2 (en) 2014-11-19 2018-07-10 International Business Machines Corporation Accuracy-conserving floating-point value aggregation
CN105278923B (zh) * 2015-10-22 2017-10-03 合肥工业大学 一种基于aic信息准则的信号源个数估计硬件电路及其实现方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59188740A (ja) * 1983-04-11 1984-10-26 Hitachi Ltd フロ−テイング加算器

Also Published As

Publication number Publication date
US4866651A (en) 1989-09-12
EP0265555A1 (de) 1988-05-04
AU8053587A (en) 1988-05-05
EP0265555B1 (de) 1991-09-18
BR8705232A (pt) 1988-05-24
JPS63123125A (ja) 1988-05-26
AU589049B2 (en) 1989-09-28
CA1270955A (en) 1990-06-26
DE3681591D1 (de) 1991-10-24
ATE67619T1 (de) 1991-10-15
JPH0568725B2 (es) 1993-09-29

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