EP3501042A1 - Procédé de connection intercomposants à densité optimisée - Google Patents
Procédé de connection intercomposants à densité optimiséeInfo
- Publication number
- EP3501042A1 EP3501042A1 EP17764883.9A EP17764883A EP3501042A1 EP 3501042 A1 EP3501042 A1 EP 3501042A1 EP 17764883 A EP17764883 A EP 17764883A EP 3501042 A1 EP3501042 A1 EP 3501042A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- connection
- insert
- hybridization
- barrier
- forming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 238000000034 method Methods 0.000 title claims abstract description 52
- 230000004888 barrier function Effects 0.000 claims abstract description 115
- 238000009396 hybridization Methods 0.000 claims abstract description 106
- 239000000463 material Substances 0.000 claims abstract description 101
- 239000004020 conductor Substances 0.000 claims abstract description 12
- 229910052751 metal Inorganic materials 0.000 claims description 23
- 239000002184 metal Substances 0.000 claims description 23
- 239000007769 metal material Substances 0.000 claims description 19
- 238000000151 deposition Methods 0.000 claims description 9
- 230000015572 biosynthetic process Effects 0.000 claims description 8
- 238000005530 etching Methods 0.000 claims description 5
- 238000005498 polishing Methods 0.000 claims description 4
- 230000000717 retained effect Effects 0.000 claims description 4
- 239000010949 copper Substances 0.000 description 12
- 238000003780 insertion Methods 0.000 description 12
- 230000037431 insertion Effects 0.000 description 12
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Substances [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 9
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Substances [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 9
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 8
- 239000010931 gold Substances 0.000 description 7
- 239000004065 semiconductor Substances 0.000 description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 6
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 6
- 229910052782 aluminium Inorganic materials 0.000 description 6
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 6
- 229910052802 copper Inorganic materials 0.000 description 6
- 229910052737 gold Inorganic materials 0.000 description 6
- 229910052738 indium Inorganic materials 0.000 description 6
- 239000011701 zinc Substances 0.000 description 6
- 229910002601 GaN Inorganic materials 0.000 description 5
- 229910001128 Sn alloy Inorganic materials 0.000 description 5
- 229910045601 alloy Inorganic materials 0.000 description 5
- 239000000956 alloy Substances 0.000 description 5
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 5
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 4
- 238000004377 microelectronic Methods 0.000 description 4
- 229910052718 tin Inorganic materials 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 3
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 3
- 230000008021 deposition Effects 0.000 description 3
- 239000011159 matrix material Substances 0.000 description 3
- 229910052759 nickel Inorganic materials 0.000 description 3
- 230000005693 optoelectronics Effects 0.000 description 3
- 229910052763 palladium Inorganic materials 0.000 description 3
- 229910052697 platinum Inorganic materials 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 229910052725 zinc Inorganic materials 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 229910007116 SnPb Inorganic materials 0.000 description 2
- PQIJHIWFHSVPMH-UHFFFAOYSA-N [Cu].[Ag].[Sn] Chemical compound [Cu].[Ag].[Sn] PQIJHIWFHSVPMH-UHFFFAOYSA-N 0.000 description 2
- 239000011651 chromium Substances 0.000 description 2
- 238000010292 electrical insulation Methods 0.000 description 2
- 239000012777 electrically insulating material Substances 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- LQBJWKCYZGMFEV-UHFFFAOYSA-N lead tin Chemical compound [Sn].[Pb] LQBJWKCYZGMFEV-UHFFFAOYSA-N 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 238000004513 sizing Methods 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 239000007787 solid Substances 0.000 description 2
- 230000001629 suppression Effects 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 239000010937 tungsten Substances 0.000 description 2
- 238000003466 welding Methods 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 1
- 239000010953 base metal Substances 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 229910052593 corundum Inorganic materials 0.000 description 1
- 239000010431 corundum Substances 0.000 description 1
- 238000012217 deletion Methods 0.000 description 1
- 230000037430 deletion Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000012811 non-conductive material Substances 0.000 description 1
- 239000000615 nonconductor Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 238000003892 spreading Methods 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- WQJQOUPTWCFRMM-UHFFFAOYSA-N tungsten disilicide Chemical compound [Si]#[W]#[Si] WQJQOUPTWCFRMM-UHFFFAOYSA-N 0.000 description 1
- -1 tungsten nitride Chemical class 0.000 description 1
- 229910021342 tungsten silicide Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14636—Interconnect structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0657—Stacked arrangements of devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14634—Assemblies, i.e. Hybrid structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/1469—Assemblies, i.e. hybrid integration
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05555—Shape in top view being circular or elliptic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05568—Disposition the whole external layer protruding from the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05573—Single external layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05575—Plural external layers
- H01L2224/0558—Plural external layers being stacked
- H01L2224/05582—Two-layer coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05639—Silver [Ag] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05644—Gold [Au] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05655—Nickel [Ni] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05663—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/05664—Palladium [Pd] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05663—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/05669—Platinum [Pt] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/1012—Auxiliary members for bump connectors, e.g. spacers
- H01L2224/10122—Auxiliary members for bump connectors, e.g. spacers being formed on the semiconductor or solid-state body to be connected
- H01L2224/10145—Flow barriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/1147—Manufacturing methods using a lift-off mask
- H01L2224/11472—Profile of the lift-off mask
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/1147—Manufacturing methods using a lift-off mask
- H01L2224/1148—Permanent masks, i.e. masks left in the finished device, e.g. passivation layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/116—Manufacturing methods by patterning a pre-deposited material
- H01L2224/11602—Mechanical treatment, e.g. polishing, grinding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/118—Post-treatment of the bump connector
- H01L2224/1182—Applying permanent coating, e.g. in-situ coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13005—Structure
- H01L2224/13007—Bump connector smaller than the underlying bonding area, e.g. than the under bump metallisation [UBM]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/1301—Shape
- H01L2224/13011—Shape comprising apertures or cavities, e.g. hollow bump
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/1301—Shape
- H01L2224/13012—Shape in top view
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/1301—Shape
- H01L2224/13012—Shape in top view
- H01L2224/13014—Shape in top view being circular or elliptic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/1301—Shape
- H01L2224/13016—Shape in side view
- H01L2224/13018—Shape in side view comprising protrusions or indentations
- H01L2224/13019—Shape in side view comprising protrusions or indentations at the bonding interface of the bump connector, i.e. on the surface of the bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/1302—Disposition
- H01L2224/13023—Disposition the whole bump connector protruding from the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13075—Plural core members
- H01L2224/13078—Plural core members being disposed next to each other, e.g. side-to-side arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/13147—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/13164—Palladium [Pd] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/13166—Titanium [Ti] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/13169—Platinum [Pt] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/13171—Chromium [Cr] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/13184—Tungsten [W] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/13186—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/1354—Coating
- H01L2224/1356—Disposition
- H01L2224/13562—On the entire exposed surface of the core
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/1354—Coating
- H01L2224/1357—Single coating layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/1354—Coating
- H01L2224/13599—Material
- H01L2224/136—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/13644—Gold [Au] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/1601—Structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/81053—Bonding environment
- H01L2224/81095—Temperature settings
- H01L2224/81099—Ambient temperature
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81193—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/812—Applying energy for connecting
- H01L2224/81201—Compression bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8134—Bonding interfaces of the bump connector
- H01L2224/81345—Shape, e.g. interlocking features
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81897—Mechanical interlocking, e.g. anchoring, hook and loop-type fastening or the like
- H01L2224/81898—Press-fitting, i.e. pushing the parts together and fastening by friction, e.g. by compression of one part against the other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06513—Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/38—Effects and problems related to the device integration
- H01L2924/384—Bump effects
- H01L2924/3841—Solder bridging
Definitions
- the invention relates to the field of microelectronics and optoelectronics and relates more particularly to the methods of connecting components of microelectronics and optoelectronics with each other and in particular the methods of vertical connection (also known by the names " hybridization "and” flipped chip ", and better known by their English name” flip-chip ").
- the invention thus relates to a method of connecting two components together and an assembly comprising two components connected to each other.
- the light capture component is generally integrated in a III-V semiconductor substrate, such as a gallium nitride GaN substrate
- the light capture component is generally integrated in a III-V semiconductor substrate, such as a gallium nitride GaN substrate.
- processing electronics for processing the signals obtained by the capture component is integrated in a silicon Si substrate.
- the first and second components respectively comprise a first and a second connection face, the first connection face comprising at least a first and a second connection area to respectively connect to at least a third and a fourth corresponding area of the second connection face.
- the method comprises the following steps: forming a first and a second stud of ductile material, such as a first and second indium ball, in respective contact with the first and the second connection zone,
- a third and a fourth pad of ductile material such as a third and a fourth indium ball, in respective contact with the third and fourth connection zones,
- connection connecting the first and second connection areas with respectively the third and fourth connection areas, the first and second connection areas being opposite the third and fourth connection areas and the connection being made by thermocompression.
- the first and the second insert will have a relatively small contact surface and adapted to fit into the plot of ductile material corresponding. This significantly reduces the temperature and pressure requirements for obtaining such an insertion. It is therefore possible to reduce the temperature and the pressure used during the thermocompression and therefore to better control the crushing of the stud of ductile material.
- Such a constraint is related to the fact that during the connection, and therefore the insertion of the inserts in the studs of ductile material, the deformation of the studs of ductile material can be in the direction of adjacent zones and cause connections, that is, short circuits between adjacent studs of ductile material.
- the present invention aims to remedy this drawback and is therefore more precisely intended to provide a two-component connection method that does not present a risk of short-circuiting between two adjacent connection areas, this even for significant connection densities, said method being simpler than those of the prior art, such as that taught by US 2010/207266, which does not present a risk of short circuit between two connection areas.
- the invention relates for this purpose to a method of electrical connection by hybridization of a first component to a second component, the first and second components respectively comprising a first and a second connection face, the first connection face comprising at least a first and a second connection area to respectively connect to at least a third and a fourth corresponding connection area of the second connection face,
- first and a second stud of metal ductile material in respective contact with the first and the second connection zone, forming a first and a second insert made of conductive material in contact with the third and fourth connection areas respectively, the first and the second insert being intended to be inserted respectively into the first and second studs of ductile material;
- the method further comprising the steps of:
- first and second hybridization barrier arranged at least partly between the first and the second insert and electrically insulated from each other, said first and second barrier of hybridization being both positioned outside the orthogonally projected surfaces on the second connecting face of the first and second pads made of ductile material when the first and the second connection zone are placed opposite the third and fourth respectively connection zone, the first and the second hybridization wall being outside respectively the fourth and the third connection zone,
- connection zone connecting the first and the second connection zone with respectively the third and the fourth insertion connection zone of the first and the second insert in respectively the first and the second stud of ductile material
- the first and second connection zones being opposite the third and fourth connection zones and the first and second hybridization barriers serving as a barrier by containing the deformation of respectively the first and the second stud of ductile material towards the fourth and the fourth respectively.
- third connection area serving as a barrier by containing the deformation of respectively the first and the second stud of ductile material towards the fourth and the fourth respectively.
- the first and the second insert are in a hollow form.
- the method further comprising the following step:
- connection areas connecting the first and second connection areas with respectively the third and fourth insertion connection regions of the first and second inserts in the first and second ductile material pads, respectively, the first and second connection areas being in contact with each other. with respect to the third and fourth connection areas and the first and second hybridization barrier barrier office by containing the deformation respectively of the first and the second stud of ductile material towards respectively the fourth and the third connection zone.
- the step of forming the first and the second insert comprises the following sub-steps:
- polishing the second face so as to remove the portion of the layer of the metallic material which is in contact with the surface of the sacrificial layer which is opposite to the second connection face and retain the parts of the layer of the metal material 320 covering the previously released parts, said retained portions thus forming the conductive elements of the connection areas,
- the first and second hybridization barriers by containing the deformation of the ductile material pads towards the other pad of ductile material, eliminate any risk of direct contact between the first and the second pad of ductile material.
- the first and second hybridization barrier being electrically insulated from each other, this insulation is used to electrically isolate the first and the second stud of ductile material electrically from one another.
- the hybridization barriers are formed at the same time as the inserts.
- the result is a simplified process vis-à-vis those of the prior art for which the hybridization barriers are formed separately inserts.
- the first and the second hybridization barrier can be formed respectively in contact with the third and the fourth zone of connection.
- the first and second hybridization barriers being formed respectively in contact with the third and the fourth contact zone, the space between the third and fourth connection areas can be minimized since it is not occupied by hybridization barriers.
- the first and second hybridization barriers may be made of a conductive material.
- the first and second hybridization barriers participate respectively in the electrical connection between the first ductile material pad and the third connection zone and between the second ductile material pad and the fourth connection pad.
- conductor and "insulator” when used above and in the rest of this document should be understood as “electrical conductor” and “electrical insulator”.
- the steps of forming the first and second insert and the first and second hybridization barrier can be carried out simultaneously, the first and the second insert and the first and second hybridization barrier being made of the same conductive material. .
- the electrical connection between the first and the second component can be obtained with a reduced number of steps.
- the formation of the first insert and the first hybridization barrier consists in the formation of a first conductive element in contact with each other.
- the third connection zone, the formation of the second insert and the second hybridization barrier consists of forming a second conductive element in contact with the fourth connection zone.
- the first and second conductive elements may each be in the form of first and second cylindrical walls of revolution and concentric, each extending substantially perpendicular to the corresponding connection area surface, the first wall being surrounded by the second wall and forming the insert corresponding to said conductive element, the surface of the second wall facing the first wall forming the hybridization barrier corresponding to said conductive element.
- steps of forming the first and second insert and the first and second hybridization barrier may comprise the following substeps:
- polishing the second face so as to remove the portion of the layer of the metallic material which is in contact with the surface of the sacrificial layer which is opposite to the second connection face and retain the parts of the layer of the metallic material covering the parts previously released, said conserved portions thereby forming the conductive elements of the connection areas,
- the first and second hybridization barrier may respectively surround the first and the second insert.
- first and the second insert it can be formed a first and a second conductive element forming respectively the first and second in sert serves,
- At least a first non-conductive element at least partially positioned between the first and the second insert may be formed, the at least one first element insulator having a first surface facing the first insert forming the first hybridization barrier and a second surface facing the second insert forming the second hybridization barrier.
- the invention also relates to a set of two components connected to one another by hybridization,
- first component has a first connection face comprising at least a first and a second connection area, each of the first and second connection areas, said first component further comprising contacting a first and a second pad of ductile material in contact respectively with the first and the second connection zone,
- the second component comprises a second connection face comprising at least a third and a fourth connection zone vis-à-vis respectively the first and the second connection zone, the second component further comprising a first and a second insert in contact with respectively the third and fourth connection zone, the first and the second insert being respectively inserted in the first and second ductile material stud of the first and the second connection zone so as to ensure a connection between the first and the second connection zone and the third and the fourth connection zone respectively,
- the second component further comprising on its second connecting face a first and second hybridization barrier arranged at least partly between the first and the second insert, the first and second hybridization wall being respectively outside the fourth and the third connection zone and acting as a barrier respectively to the first and the second stud of ductile material towards respectively the fourth and the third connection zone.
- the first insert and the first barrier being connected by a first metal base formed solely between these two last, the second insert and the second barrier being connected by a second metal base formed solely between the latter two.
- the first and second hybridization barrier and the first and the second insert may be made of a conductive material.
- the first insert and the first barrier may be provided by a first conductive element in contact with the first connection zone, the second insert and the second barrier being provided by a second conductive member in contact with the second connection zone.
- the hybridization barriers can participate in the connections between the first and the third connection zone and between the second and the fourth connection zone.
- the first and second hybridization barrier may be provided by at least one first insulating element, said at least one first insulating element having a first surface facing the first insert forming the first hybridization barrier and a second surface facing the second insert forming the second hybridization barrier.
- Such an insulating element makes it possible to obtain good electrical insulation between the third and the fourth connection zone.
- the risks of short circuit between the third and the fourth connection zone are thus particularly low.
- FIG. 1 is a schematic sectional view of a set of two components connected to each other by hybridization according to a first embodiment of the invention, the first component comprising two hybridization pads, the second component having two conductive elements forming inserts and hybridization barriers,
- FIG. 2 is a schematic perspective view showing only the second component of the assembly illustrated in FIG. 1;
- FIG. 3 is a close schematic sectional view on a connection zone of the first and second components of the assembly illustrated in FIG. 1 before the connection, FIG. 3 illustrating the design constraints of the hybridization barriers according to the invention.
- FIGS. 4A to 4F illustrate the steps of forming conductive elements of the second component of the assembly illustrated in FIG. 1,
- FIG. 5 illustrates a schematic view from above of a second component of an assembly according to this first embodiment of the invention for which twelve connections are provided
- FIG. 6 illustrates the main connection steps of the first component with the second component to form an assembly according to this first embodiment, such as that illustrated in FIG. 1,
- FIGS. 7A to 7E illustrate schematic cross-sectional views of an assembly and a top view of the second component of the same assembly respectively according to the first to a sixth embodiment of the invention
- FIG. 7A corresponding to the assembly according to the first embodiment
- Figure 7B corresponding to an assembly according to a second embodiment not covered by the invention wherein the first and second hybridization barriers are formed by an insulating conductive element
- Figure 7C corresponds to a set according to a fourth embodiment in which each of the inserts is a beveled insert
- FIG 7D corresponding to an assembly according to a fifth embodiment not covered by the invention wherein each of the connection areas comprises a first and a second conductive element cylindrical ellipsoidal section each participating in the formation of the insert and the hybridization barrier
- FIG. 7E corresponding to an assembly according to a sixth embodiment not covered by the invention wherein each of the connection areas comprises a conductive element forming the insert and a non-conducting element forming the hybridization barrier
- FIG. 8 illustrates four views from above of different shape configurations for the insert / hybridization barrier assembly compatible with the first embodiment, the view referenced a) corresponding to inserts and square section hybridization barriers, the view referenced b) corresponding to circular inserts and hybridization barriers of square section, the view referenced c) corresponding to circular inserts and hexagonal section hybridization barriers, the referenced view d) corresponds to solid circular inserts and hexagonal section hybridization barriers.
- FIG. 1 represents an assembly 1 of two connected components 100, 200 whose connection has been obtained by means of a method according to a first embodiment of the invention.
- This first component 100 may thus be, for example, an optical sensor, such as a CCD or CMOS matrix, or an imager, such as an LCD matrix, to be connected to a second component, such as an optical sensor electronics. or imager.
- an optical sensor such as a CCD or CMOS matrix
- an imager such as an LCD matrix
- the first component 100 may thus comprise a semiconductor support of a first type, such as a support in semiconductor material III-IV such as a support of the gallium nitride / corundum type, the second component comprising a semiconductor support of a second type, such as Si silicon support or Ge germanium.
- a semiconductor support of a first type such as a support in semiconductor material III-IV such as a support of the gallium nitride / corundum type
- the second component comprising a semiconductor support of a second type, such as Si silicon support or Ge germanium.
- 100, 200, such a set of two components 100, 200 comprises:
- the first component 100 having a first connection face 101 comprising at least a first and a second connection zone 110, 120, said first component 100 further comprising a first and a second plot of ductile material 111, 121 in contact respectively with the first and the second connection zone 110, 120,
- the second component 200 comprising a second connection face 201 comprising at least a third and a fourth connection zone 210, 220 vis-à-vis respectively the first and the second connection zone 110, 120, the second component 200 comprising in addition a first and a second insert 211, 221 in contact respectively with the third and the fourth connection zone 210, 220, the first and the second insert 211, 221 being respectively inserted into the first and second stud of ductile material 111, 121, the second component 200 further comprising on its second connection face a first and second hybridization barrier 212, 222 arranged at least partly between the first and the second insert 211, 221 and being electrically isolated from one another.
- the first and the second hybridization wall 212, 222 being outside respectively the fourth and the third connection zone 220, 210 and Barrier, respectively, to the first and second ductile material studs 111, 121 respectively to the fourth and third connection zones 210, 220.
- the first component 100 has on the first connection face 101 the first and the second connection zone 110, 120.
- Each of the first and the second connection zone 110, 120 is formed by a metal layer acting as contact for the
- the metal layers forming the first and the second connection zone 110, 120 are made of a material that can be wetted by the material of the first and second pads made of ductile material 111, 121. such a characteristic is not necessary when a deformation connection is sought.
- Each of the metal layers forming the first and the second connection zone 110, 120 may be made of a material selected from the group consisting of Au gold, Al aluminum, Ag silver, Ni nickel, Pt platinum, palladium Pd and their alloys.
- these same metal layers forming the first and second connection areas 110, 120 may be formed of a first metal sub-layer to contact one of the areas of the first structure 102 and a second metal sub-layer covering the first metal layer and being realized in a wettable material to the material of which are formed the pads of ductile material 111, 121.
- the wettable material has a total wettability vis-à-vis the material of studs of ductile material.
- the spreading coefficient S of the material of the pads of ductile material, when in the liquid state is strictly positive.
- the first and second connection zones 110, 120 are respectively provided with the first and second studs made of ductile material 111, 121.
- Each of the first and second studs made of ductile material 111, 121 is made of a ductile metallic material such as aluminum. 'indium.
- the material of the first and second stud of ductile material 111, 121 may be selected from the group comprising indium in, tin Sn, aluminum Al, copper Cu, zinc Zn and their alloys, such as the tin alloys SnPb lead-tin alloys and SnAgCu copper-silver-tin alloys.
- the first and the second stud of ductile material can be made of indium In, Sn tin or one of its alloys such as lead-tin alloys SnPb and copper-silver-tin alloys SnAgCu, the first and second connection zones that can be made in Au gold.
- the first and the second stud made of ductile material may be made of aluminum Al, copper Cu or zinc Zn, the first and the second connection zones being be made of Al aluminum, Cu copper or Zn zinc.
- the second component 200 has on the second connection face 201 the third and the fourth connection zone 210, 220,.
- Each of these third and fourth connection areas 210, 220 is formed by a metal layer acting as contact for the structure 201.
- the metal layers forming the third and fourth connection areas 210, 220 are made of a material wettable by the material of the first and second pads ductilelll material, 121.
- Each of the metal layers forming the third and fourth connection zone 210, 220 may be made of a material selected from the group consisting of Au gold, Al aluminum, Ag silver, Ni nickel, Pt platinum, Pd palladium and their alloys. .
- the metal layers forming the third and fourth connection areas 210, 220 may also be formed of a first metal sub-layer for contacting one of the zones of the second structure 202 and a second metal sub-layer covering the first metal layer and being made of a wettable material whose material is made the pads of ductile material 111, 121.
- the third and the fourth connection zone 210, 220 are respectively provided with a first and a second conductive element 215, 225.
- the first element 215 comprises both the first insert 211 and the first hybridization barrier 212, while the second element 225 includes both the second insert 221 and the second hybridization barrier 222.
- the first and the second conductive element 215, 225 are each in the form of a first and second cylindrical walls of revolution and concentric and which extend perpendicular to the surface of the corresponding connection area 210, 220.
- the first and the second cylindrical wall of each of the first and second conductive elements 215, 225 have their axis of revolution perpendicular to the same surface of the corresponding connection area 210, 220.
- the first wall is internal to the second wall, that is to say, it is surrounded by the second wall.
- Each of the first and second conductive elements 215, 225 also comprises an annular base in contact with the corresponding connection zone 210, 220 and connecting the first and the second wall of said conductive element 215, 225 to each other.
- the first and second conductive elements 215, 225 are made of a metallic material selected from the group comprising copper Cu, titanium Ti, tungsten W, chromium Cr, nickel Ni, platinum Pt, palladium and their alloys, such as tungsten silicide WSi, tungsten nitride WN and titanium nitride TiN. According to an advantageous possibility of the invention, the metallic material of the first and second conductive element 215, 225 is Cu copper.
- each of the conductive elements 215, 225 may further comprise a metal coating, such as a gold layer, in order to protect the metal material of which it is made from oxidation.
- the first and second conductive elements 215, 225 are dimensioned such that:
- the first wall of the first and second conductive elements 215, 225 are disposed within a surface respectively corresponding to the orthogonally projected surface of the first and second ductile material studs 111, 121 when the first and second connection 110, 120 are placed opposite the third and the fourth connection zone 210, 220 respectively,
- the second wall of the first and second conductive elements are arranged outside a surface respectively corresponding to the orthogonally projected surface of the first and second ductile material studs 111, 121 when the first and the second connection zone 110, 120 are connected to the third and fourth connection areas 210, 220, respectively.
- first and the second conductive elements 215, 225 being formed in contact with respectively the third and the fourth connection zone 210, 220, the second wall of the first and second conductive elements 215, 225, by a such dimensioning, is outside respectively the fourth and third connection zone 220, 210.
- first and second conductive elements 215, 225 are at a distance from each other, this without it there is any electrical connection between them.
- the first and second conductive elements are electrically isolated from each other. So the first and second Hybridization barriers 212, 222 formed respectively by the second wall of the first and second conductive elements 215, 225, are also electrically insulated from each other.
- the first wall of the first and second conductive elements 215, 225 respectively form the first and the second inserts 211, 221, and the internal surface of the second wall of the first and second the second conductive element 215, 225 form respectively the first and the second hybridization barrier 212, 222.
- d10 and d25 being respectively the outer diameter of the first wall and the inside diameter of the second wall of said conductive element 215, 225 among the first and the second conductive element 215, 225, h10 the height of said first and second walls, d20 , h20 the maximum lateral dimension and the maximum height of the pad of ductile material 111, 121 corresponding to said conductive element 215, 225.
- these dimensions as regards the studs of ductile material 111, 121 correspond to the dimensions of the latter before connection of the first component 100 with the second component 200, the stud of ductile material 111, 121 being subject to deformation during the connection.
- a dimensioning is valid for a configuration in which during the assembly of the first and the second component 100, 200, the stud made of ductile material 111, 121 is placed opposite the corresponding conducting element.
- the outer diameter d 10 of the first wall and the inner diameter d 25 of the second wall of the first and second conductive elements 215, 225 can of course be chosen to compensate for any misalignment between the conductive element 215, 225 and the stud made of ductile material.
- 111, 121 corresponding, this by undersizing the outer diameter of the first wall and over-dimensioning the inner diameter of the second wall vis-à-vis the dimensions of the stud of ductile material 111, 121.
- FIGS. 4A to 4E illustrate a process for forming conductive elements 235, 245, 255, 265, on the connection zones 230, 240, 250, 260 of a second component 200 according to this first embodiment, said component which comprises two second structures 202a, 202b, each connected by means of two respective connection zones 230, 240, 250, 260.
- Such a formation method comprises the following steps:
- a sacrificial layer 310 intended to form a hard mask said sacrificial layer having a thickness greater than the desired height h10 for the first and second conductive elements 215, 225 to be formed,
- polishing as illustrated in FIG. 4E, of the layer of the metallic material 320 and of a portion of the sacrificial layer 310 so as to remove the part of the layer of the metallic material 320 covering the sacrificial layer 310 and to retain the parts of the layer of the metallic material covering the previously released portions 311, said parts of the layer of the metallic material 320 conserved thus forming the conducting elements 235, 245, 255, 265 of the connection zones 230, 240, 250, 260,
- connection zones 230, 240, 250, 260, 270, 280 organized, for example and as illustrated in FIG. 5, in the form of a matrix with optimized connection density. The dimensioning and positioning of these connection areas are then controlled at the scale of one hundred nanometers and it is possible to consider steps between areas less than 5 ⁇ .
- each of the connection areas 111 of the first component 100 may be equipped, with reference to FIG. 3, with a respective ductile material stud 111 having a diameter d20 of 3 ⁇ and a height h20 of 2.5 ⁇ .
- the control circuit may comprise on each of these connection zones 210 a conductive element 215 with a height of 2.5 ⁇ and whose outside diameters of the insert and inside of the hybridization barrier d25, d10 are respectively equal to 1.5 ⁇ and 3.5 ⁇ .
- connection method comprises the following steps:
- first and second studs made of ductile material 111, 121 in respective contact with the first and the second connection zone 110, 120,
- first and second conductive elements in contact with respectively the third and the fourth connection zone 210, 220 so as to thus form the first and second inserts 211, 221 made of conductive material, and the first and the second barrier of hybridization 212, 222 arranged at least partly between the first and the second insert and electrically insulated from each other,
- connection zone 110, 120 with respectively the third and the fourth connection zone 210, 220 by insertion of the first and second inserts 211, 221 in respectively the first and the second stud of ductile material 111 , 121, the first and second connection areas 110, 120 facing the third and fourth connection areas 210, 220 and the first and second hybridization barriers 212, 222 acting as a barrier containing the deformation respectively the first and the second stud of ductile material 111, 121 towards respectively the fourth and the third connection zone 220, 210.
- the step of providing the first and second conductive element 215, 225 may be a step of implementing the method of manufacturing the second component 200 already described.
- connection step is ideally a connection step comprising two substeps of compression, such as those described in WO2009 / 115686. Such sub-steps are, with reference to FIG. 6:
- the two insertion sub-steps can be realized. at room temperature and the final insertion step can be carried out in a low pressure environment such as primary vacuum (that is to say a pressure between 1000 and 1.10 " 3 mbar).
- the final insertion step can be performed by means of a press without alignment system.
- FIGS. 7A to 7E illustrate different embodiments of the invention which differ mainly in the shape of the first and second hybridization barriers 212, 222 and the first and second inserts 211, 221, some of these embodiments 'being not covered by the invention.
- FIG 7A illustrates an assembly 1 according to the first embodiment with above a schematic sectional view of the assembly 1 and above a top view of the second component 200.
- This figure being similar to Figures 1 to 3, we refer the reader to the description that has already been made.
- FIG. 7B illustrates an assembly 1 according to a second embodiment not covered by the invention in which the first and second hybridization barriers 212, 222 are provided by means of a non-conductive element 216, the inserts 211, 221 being provided by conductive elements 215, 225 according to the principle described in document WO2009 / 115686.
- Such an assembly 1 according to this second embodiment differs from an assembly 1 according to the first embodiment by the shape of each of the conductive elements 215, 225 providing the inserts 211, 221 and the presence of a non-conductive element 216 providing the first and the second hybridization barrier 212, 222.
- the non-conductive element 216 is a wall made of an electrically insulating material, such as for example that forming the sacrificial layer 310 during the formation of the conductive elements 215, 225, disposed between the third and the fourth connection zone 210, 220.
- the surface of the non-conductive element 216 facing the third connection zone 210 thus forms the first hybridization barrier 212 while the other surface, which makes therefore facing the fourth connection zone 220, forms the second connection barrier 222.
- the non-conductive element 216 is made of an electrically insulating material, the first and second hybridization barriers are electrically isolated from one another. There is therefore no risk of a short circuit between the first and the second pad of ductile material 111, 121 when these first and second hybridization barriers 212, 222 contain the deformation of the pads made of ductile material 111, 121.
- the first and second conductive elements 215, 225 being of the same type as the inserts described in the document WO2009 / 115686, the first and second conductive elements 215, 225 are disposed on a surface respectively corresponding to the projected surface orthogonally of the first and second plot of ductile material 111, 121 when the first and the second connection area 110, 120 are placed opposite the third and fourth connection areas 210, 220, respectively.
- the non-conductive element 216 being disposed outside the third and fourth connection zones 210, 220, is outside the orthogonally projected surface of the first and second ductile material studs 111, 121 when the first and second connection zone 110, 120 are placed opposite the third and fourth connection zones 210, 220, respectively.
- the method of forming the conductive elements 215, 225 and the non-conductive element 226 of a second component 200 according to this second embodiment of embodiment not covered by the invention differs from the method of forming the conductive elements 215, 225 according to the first embodiment in that during the step of removing the sacrificial layer 310, the deletion is only partial, a part of the sacrificial layer 310 being retained to form the non-conductive element 216.
- FIG. 7C illustrates an assembly 1 according to a third embodiment in which each of the first and second conductive elements 215, 225 has its bevelled internal portion so as to favor the insertion of each of the first and second inserts 211, 221 in the stud. of ductile material 111, 112 corresponding.
- An assembly according to this fourth embodiment differs from an assembly according to the first embodiment of the beveled shape of the inner portion of each of the first and second conductive elements 215, 225.
- each of the first and second conductive members 215, 225 has the beveled inner cylinder portion.
- the corresponding insert 211, 221 is thus also beveled according to a principle similar to that described in WO2009 / 115686 and the force required for the connection of the first and second components 100, 200 is lowered.
- FIG. 7D illustrates an assembly 1 according to a fourth embodiment of the invention not covered by the invention in which each of the third and fourth connection zones 210, 210 is provided with two conductive elements 215a, 215b, 225a, 225b.
- An assembly 1 according to this fourth embodiment differs from an assembly 1 according to the first embodiment in that there is provided a first and a second conductive element 215a, 215b in contact with the first connection zone 210 and a third and fourth conductive elements 225a, 225b in contact with the second connection zone 220, and in that the first, second, third and fourth conductive elements 215a, 215b, 225a, 225b have a cylindrical shape of elliptical section.
- the first, second, third and fourth conductive elements 215a, 215b, 225a, 225b are each in the form of an envelope cylindrical elliptical section, the axis of the foci being substantially perpendicular to a line passing through the third and fourth connection area 210, 220.
- the first and the second conductive elements 215a, 215b are arranged in central symmetry with respect to the center of the first connection zone 210. In this way, the wall of each of the first and second conductive elements proximal to the center of the first connection zone 210 forms the first insert 211, while the wall of each of the first and second conductive elements 215a, 215b distal from the center of the first connection zone 210 forms the first hybridization barrier 212.
- the third and fourth conductive elements 225a, 225b are arranged in a central symmetry with respect to the center of the second connection zone 220.
- the sizing of the first to fourth conductive elements 215a, 215b, 225a, 225b is adapted so that:
- the proximal wall portions of the first, second, third and fourth conductive members 215a, 215b, 225a, 225b are disposed within a corresponding surface for the first and second conductive members 215a, 215b at the orthogonally projected surface of the first ductile material stud 111, and for the third and fourth conductive elements 225a, 225b to the orthogonally projected surface of the second ductile material stud 121, when the first and the second connection areas 110, 120 are exposed. with respect to the third and the fourth connection zone 210, 220 respectively,
- connection 210, 220 the distal wall portions of the first, second, third and fourth conductive elements 215a, 215b, 225a, 225b are arranged outside a corresponding surface, for the first and second conductive elements 215a, 215b to the orthogonally projected surface of the first stud of ductile material 111, and for the third and fourth conductive elements 215a, 225b to the orthogonally projected surface of the second stud 121, this when the first and the second connection zone 110, 120 are placed opposite the third and the fourth zone respectively. connection 210, 220.
- connection elements 215a, 215b The method of forming connection elements 215a, 215b,
- 225a, 225b according to this fourth embodiment not covered by the invention may be a method of the same type as that described in WO 2011/115686, the shape and positioning of the inserts formed during the process document WO2011 / 115686 having just to be adapted to match those of the connecting members 215a, 215b, 225a, 225b according to this fourth embodiment.
- FIG. 7E illustrates an assembly 1 according to a fifth embodiment not covered by the invention in which the first and the second connection zone 110, 120 are respectively surrounded by a first and a second non-conductive element 216, 226 and are in contact with a first and a second conductive element 215, 225 respectively.
- An assembly according to this fifth embodiment differs from an assembly according to the first embodiment in that it comprises a first and a second non-conducting element. 216, 226 forming respectively the first and the second hybridization barrier 212, 222, the first and the second conductive element 215, 225 forming the first and the second insert 211, 221.
- the first and the second connection zone 210, 220 are respectively surrounded by the first and the second non-conductive element 216, 226.
- Each of the first and second non-conductive elements 216, 226 is formed by a wall of non-conductive material. According to an advantageous possibility of this embodiment, and when the material of the sacrificial layer 310 is insulating, each of the first and the second insulating element 216, 226 is made of the same material as that of the sacrificial layer.
- the first and the second conductive element 215, 225 are of the same type. than those of the second embodiment.
- the first and second elements are arranged on a surface respectively corresponding to the orthogonally projected surface of the first and second ductile material studs 111, 121 when the first and second connection areas 110, 120 are facing each other. screw respectively the third and fourth connection area 210, 220.
- the non-conductive elements 216, 226 being disposed outside the first and second connection zone 210, 220 are also outside the orthogonally projected surface of the first and second ductile material studs 111, 121 when the first and second second connection zone 110, 120 are placed opposite the third and the fourth connection zone 210, 220, respectively.
- the method of forming conductive elements 215, 225 and non-conductive elements 216, 226 of a second component 200 according to this fifth embodiment not covered by the invention is similar to the forming method according to the second embodiment.
- the method for forming conductive elements 215, 225 and non-conductive elements 216, 226 differs from a method for forming conductive elements 215, 225 according to the second embodiment in that during the suppression step of the sacrificial layer 310, the suppression is only partial, parts of the sacrificial layer 310 being retained to form the first and the second non-conductive element 216, 226.
- the invention is not limited to these types of shape.
- the invention covers any type of shape as long as each of the connection zones of the second component comprises:
- At least one hybridization barrier 212, 222 positioned outside the orthogonally projected surfaces on the second connecting face of the corresponding ductile material stud 111, 121 when the connection zone 210, 220 is placed opposite the corresponding connection area 110, 120 of the first component 100 the first and second barriers 212, 222, 232, 242, 252, 262 respectively surrounding the first and second inserts 211, 221, 231, 241, 251, 261, the first insert and the first barrier being connected by a first base metal formed solely between these two last, the second insert and the second barrier being connected by a second metal base formed solely between the latter two.
- FIG. 8 illustrates four examples of form inserts 211, 221 and hybridization barriers 212, 222 compatible with the invention.
- the insert 211, 221 and the hybridization barrier 212, 222 are provided by a conductive element 215, 225 in the form of a cylindrical double wall envelope of cubic section.
- the insert 211, 221 is provided by a cylindrical envelope of circular section while the hybridization barrier 212, 222is provided by a cylindrical envelope of square section, each of these envelopes being provided for a connection zone 210, 220, by a single conductive element 215.
- the insert 211, 221 is provided by a cylindrical envelope of circular section while the hybridization barrier 212, 222 is provided by a cylindrical envelope of hexagonal section, each of these envelopes being provided, for a connection zone 210, 220, by a single conductive element 215.
- the insert 211, 221 is provided by a solid cylinder of circular section while the hybridization barrier 212, 222 is provided by a cylindrical envelope of hexagonal section, each of this cylinder and this envelope being provided, for a given connection area 210, 220, by a single conductive element 215.
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Wire Bonding (AREA)
- Combinations Of Printed Boards (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1601237A FR3055166B1 (fr) | 2016-08-18 | 2016-08-18 | Procede de connection intercomposants a densite optimisee |
PCT/FR2017/052247 WO2018033689A1 (fr) | 2016-08-18 | 2017-08-18 | Procédé de connection intercomposants à densité optimisée |
Publications (1)
Publication Number | Publication Date |
---|---|
EP3501042A1 true EP3501042A1 (fr) | 2019-06-26 |
Family
ID=57539297
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP17764883.9A Withdrawn EP3501042A1 (fr) | 2016-08-18 | 2017-08-18 | Procédé de connection intercomposants à densité optimisée |
Country Status (5)
Country | Link |
---|---|
US (1) | US20210280628A1 (zh) |
EP (1) | EP3501042A1 (zh) |
CN (1) | CN109791920A (zh) |
FR (1) | FR3055166B1 (zh) |
WO (1) | WO2018033689A1 (zh) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP3604792B1 (en) | 2018-08-03 | 2021-11-10 | GE Renewable Technologies | Pre-formed plug with inter-blade profiles for hydraulic turbines |
FR3091411B1 (fr) * | 2018-12-28 | 2021-01-29 | Commissariat Energie Atomique | Procédés de fabrication optimisés d’une structure destinée à être assemblée par hybridation et d’un dispositif comprenant une telle structure |
FR3113982A1 (fr) | 2020-09-10 | 2022-03-11 | Commissariat à l'Energie Atomique et aux Energies Alternatives | procédé d’assemblage par hybridation de deux composants microélectroniques |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06164185A (ja) * | 1992-11-20 | 1994-06-10 | Tatsuta Electric Wire & Cable Co Ltd | ハイブリッドic |
JP2005197488A (ja) * | 2004-01-08 | 2005-07-21 | Sony Corp | 突起電極及びボンディングキャピラリ並びに半導体チップ |
JP2006100552A (ja) * | 2004-09-29 | 2006-04-13 | Rohm Co Ltd | 配線基板および半導体装置 |
FR2876243B1 (fr) * | 2004-10-04 | 2007-01-26 | Commissariat Energie Atomique | Composant a protuberances conductrices ductiles enterrees et procede de connexion electrique entre ce composant et un composant muni de pointes conductrices dures |
JP5076482B2 (ja) * | 2006-01-20 | 2012-11-21 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
US8218918B2 (en) | 2007-03-26 | 2012-07-10 | Trex Enterprises Corp | Optical fiber switch with movable lens |
KR20090038624A (ko) * | 2007-10-16 | 2009-04-21 | 주식회사 동부하이텍 | 배리어 금속막 형성 방법 |
FR2928033B1 (fr) * | 2008-02-22 | 2010-07-30 | Commissariat Energie Atomique | Composant de connexion muni d'inserts creux. |
TWI455263B (zh) * | 2009-02-16 | 2014-10-01 | Ind Tech Res Inst | 晶片封裝結構及晶片封裝方法 |
JP5786273B2 (ja) * | 2009-12-28 | 2015-09-30 | オムロン株式会社 | 赤外線センサ及び赤外線センサモジュール |
US8546921B2 (en) * | 2010-08-24 | 2013-10-01 | Qualcomm Incorporated | Hybrid multilayer substrate |
FR2977370B1 (fr) * | 2011-06-30 | 2013-11-22 | Commissariat Energie Atomique | Composant de connexion muni d'inserts creux |
DE102011081641B4 (de) * | 2011-08-26 | 2014-11-20 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Sensor und Verfahren zum Herstellen eines Sensors |
US9004942B2 (en) * | 2011-10-17 | 2015-04-14 | Amphenol Corporation | Electrical connector with hybrid shield |
DE102012216618A1 (de) * | 2012-09-18 | 2014-03-20 | Robert Bosch Gmbh | Anordnung von mindestens zwei Wafern zum Detektieren von elektromagnetischer Strahlung und Verfahren zum Herstellen der Anordnung |
US9437565B2 (en) * | 2014-12-30 | 2016-09-06 | Advanced Seminconductor Engineering, Inc. | Semiconductor substrate and semiconductor package structure having the same |
US9540228B2 (en) * | 2015-01-29 | 2017-01-10 | Invensense, Inc. | MEMS-CMOS device that minimizes outgassing and methods of manufacture |
-
2016
- 2016-08-18 FR FR1601237A patent/FR3055166B1/fr not_active Expired - Fee Related
-
2017
- 2017-08-18 EP EP17764883.9A patent/EP3501042A1/fr not_active Withdrawn
- 2017-08-18 WO PCT/FR2017/052247 patent/WO2018033689A1/fr unknown
- 2017-08-18 CN CN201780058209.5A patent/CN109791920A/zh active Pending
- 2017-08-18 US US16/325,095 patent/US20210280628A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
WO2018033689A1 (fr) | 2018-02-22 |
FR3055166A1 (fr) | 2018-02-23 |
US20210280628A1 (en) | 2021-09-09 |
CN109791920A (zh) | 2019-05-21 |
FR3055166B1 (fr) | 2020-12-25 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP2175485B1 (fr) | Connexion par emboitement de deux inserts soudés et sa méthode de fabrication | |
EP2255383B1 (fr) | Composant de connexion muni d'inserts creux et son procede de realisation | |
EP3667728B1 (fr) | Procédé de réalisation d'un dispositif à diodes photo-émettrices et/ou photo-réceptrices et avec une grille de collimation auto-alignée | |
EP2727144B1 (fr) | Procédé d'hybridation d'un composant muni d'inserts creux | |
FR2913145A1 (fr) | Assemblage de deux parties de circuit electronique integre | |
EP2287904B1 (fr) | Procédé d'assemblage de deux composants électroniques | |
EP2816597A2 (fr) | Procédé de réalisation d'un dispositif microélectronique mécaniquement autonome | |
FR2903811A1 (fr) | Dispositif electronique comprenant des composants electroniques relies a un substrat et mutuellement connectes et procede de fabrication d'un tel dispositif | |
EP3501042A1 (fr) | Procédé de connection intercomposants à densité optimisée | |
FR2980036A1 (fr) | Procede de realisation d'une structure integree tridimensionnelle et structure correspondante | |
EP3109900B1 (fr) | Procede de fabrication d'une pluralite de dipoles en forme d'ilots ayant des electrodes auto-alignees | |
EP3675187B1 (fr) | Procédés de fabrication optimisés d'une structure destinée à être assemblée par hybridation et d'un dispositif comprenant une telle structure | |
FR2922682A1 (fr) | Procede de fabrication d'un micromodule de capture d'images | |
EP3031775B1 (fr) | Procede de realisation d'une connexion electrique dans un via borgne | |
FR2864342A1 (fr) | Procede d'interconnexion de composants electroniques sans apport de brasure et dispositif electronique obtenu par un tel procede | |
EP1350418A1 (fr) | Procede de realisation d'interconnexion dans un circuit imprime multicouches | |
FR2972569A1 (fr) | Composant de connexion muni d'inserts creux | |
EP3886159A1 (fr) | Puce d'interconnexion | |
EP4435835A1 (fr) | Procédé de fabrication d'une pluralité de composants électroniques | |
FR3140985A1 (fr) | Dispositif electronique de type sip et procede de realisation d’un tel dispositif | |
FR2983845A1 (fr) | Procede de realisation d'une microstructure comportant deux substrats relies mecaniquement | |
FR3018151A1 (fr) | Procede de realisation d'un niveau d'interconnexion electrique | |
FR2978610A1 (fr) | Procede de realisation d'une liaison electriquement conductrice traversante et dispositif integre correspondant | |
CH704884A1 (fr) | Substrat destiné à recevoir des contacts électriques. | |
FR2904472A1 (fr) | Procede de fabrication d'un circuit integre encapsule et circuit integre encapsule associe |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: UNKNOWN |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE INTERNATIONAL PUBLICATION HAS BEEN MADE |
|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: REQUEST FOR EXAMINATION WAS MADE |
|
17P | Request for examination filed |
Effective date: 20190228 |
|
AK | Designated contracting states |
Kind code of ref document: A1 Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR |
|
AX | Request for extension of the european patent |
Extension state: BA ME |
|
DAV | Request for validation of the european patent (deleted) | ||
DAX | Request for extension of the european patent (deleted) | ||
RIC1 | Information provided on ipc code assigned before grant |
Ipc: H01L 23/485 20060101AFI20200220BHEP Ipc: H01L 25/00 20060101ALN20200220BHEP Ipc: H01L 21/60 20060101ALI20200220BHEP |
|
RIC1 | Information provided on ipc code assigned before grant |
Ipc: H01L 23/485 20060101AFI20200227BHEP Ipc: H01L 21/60 20060101ALI20200227BHEP Ipc: H01L 25/00 20060101ALN20200227BHEP |
|
RIC1 | Information provided on ipc code assigned before grant |
Ipc: H01L 25/00 20060101ALN20200330BHEP Ipc: H01L 23/485 20060101AFI20200330BHEP Ipc: H01L 21/60 20060101ALI20200330BHEP |
|
RIC1 | Information provided on ipc code assigned before grant |
Ipc: H01L 21/60 20060101ALI20200505BHEP Ipc: H01L 23/485 20060101AFI20200505BHEP Ipc: H01L 25/00 20060101ALN20200505BHEP |
|
RIC1 | Information provided on ipc code assigned before grant |
Ipc: H01L 25/00 20060101ALN20200515BHEP Ipc: H01L 21/60 20060101ALI20200515BHEP Ipc: H01L 23/485 20060101AFI20200515BHEP |
|
RIC1 | Information provided on ipc code assigned before grant |
Ipc: H01L 23/485 20060101AFI20200529BHEP Ipc: H01L 25/00 20060101ALN20200529BHEP Ipc: H01L 21/60 20060101ALI20200529BHEP |
|
GRAP | Despatch of communication of intention to grant a patent |
Free format text: ORIGINAL CODE: EPIDOSNIGR1 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: GRANT OF PATENT IS INTENDED |
|
RIC1 | Information provided on ipc code assigned before grant |
Ipc: H01L 25/00 20060101ALN20200616BHEP Ipc: H01L 21/60 20060101ALI20200616BHEP Ipc: H01L 23/485 20060101AFI20200616BHEP |
|
INTG | Intention to grant announced |
Effective date: 20200716 |
|
GRAJ | Information related to disapproval of communication of intention to grant by the applicant or resumption of examination proceedings by the epo deleted |
Free format text: ORIGINAL CODE: EPIDOSDIGR1 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: REQUEST FOR EXAMINATION WAS MADE |
|
INTC | Intention to grant announced (deleted) | ||
GRAP | Despatch of communication of intention to grant a patent |
Free format text: ORIGINAL CODE: EPIDOSNIGR1 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: GRANT OF PATENT IS INTENDED |
|
RIC1 | Information provided on ipc code assigned before grant |
Ipc: H01L 23/485 20060101AFI20201217BHEP Ipc: H01L 25/00 20060101ALN20201217BHEP Ipc: H01L 21/60 20060101ALI20201217BHEP |
|
INTG | Intention to grant announced |
Effective date: 20210118 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN |
|
18D | Application deemed to be withdrawn |
Effective date: 20210529 |