EP3275010A1 - Verfahren zur herstellung von bauelementen aufweisend eine schottky-diode mittels drucktechnik - Google Patents

Verfahren zur herstellung von bauelementen aufweisend eine schottky-diode mittels drucktechnik

Info

Publication number
EP3275010A1
EP3275010A1 EP16711621.9A EP16711621A EP3275010A1 EP 3275010 A1 EP3275010 A1 EP 3275010A1 EP 16711621 A EP16711621 A EP 16711621A EP 3275010 A1 EP3275010 A1 EP 3275010A1
Authority
EP
European Patent Office
Prior art keywords
electrode
cone
semiconductor material
tip
hnd
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
EP16711621.9A
Other languages
German (de)
English (en)
French (fr)
Inventor
Niels BENSON
Roland Schmechel
Marc Hoffmann
Thomas Kaiser
Daniel Erni
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Universitaet Duisburg Essen
Original Assignee
Universitaet Duisburg Essen
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Universitaet Duisburg Essen filed Critical Universitaet Duisburg Essen
Publication of EP3275010A1 publication Critical patent/EP3275010A1/de
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02623—Liquid deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0642—Isolation within the component, i.e. internal isolation
    • H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H01L29/6609—Diodes
    • H01L29/66143—Schottky diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H01L29/66196—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices with an active layer made of a group 13/15 material
    • H01L29/66204—Diodes
    • H01L29/66212—Schottky diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861—Diodes
    • H01L29/872—Schottky diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds

Definitions

  • a method for the production of devices comprising a Schottky diode by means
  • the invention relates to a method for the production of components comprising a Schottky diode by means of printing technology.
  • Thinfilm Organic and Inorganic Large Area Electronic (TOLAE) techniques can be used to fabricate circuits, but these structures are often inadequate in their high-frequency characteristics, making frequent use at high frequencies impossible. This is e.g. Due to the fact that the process temperatures must be kept relatively low, e.g. to allow mechanically flexible substrates, and thus the structural / electronic quality of the semiconductor thin films is poor compared to classic semiconductor substrates / materials with high crystallinity.
  • TOLAE Thinfilm Organic and Inorganic Large Area Electronic
  • the object is achieved by a method according to claim 1. Further advantageous embodiments are in particular subject of the dependent claims. Furthermore, the object is achieved by components according to claim 3, which were prepared by one of the methods.
  • FIG. 1 shows a schematic section through exemplary components according to embodiments of the invention
  • FIG. 2 shows a possible electrical equivalent circuit diagram corresponding to the schematic section according to FIG. 1,
  • FIG. 3 shows a possible electrical equivalent circuit diagram corresponding to a mu-cone according to embodiments of the invention
  • FIG. 4 shows an exemplary overview representation of various working steps in accordance with embodiments of the invention.
  • components comprising a Schottky diode are produced by means of printing technology.
  • a substrate S is used.
  • the substrate S may optionally be given a primer layer in a step 50, depending on the properties with regard to an adhesion promotion to an electrode Ei to be applied.
  • Exemplary techniques are known in the art and may include, for example, lamination of a heat stable polymer substrate.
  • step 50 may also serve to apply a polymeric substrate as a discrete substrate which, after processing in accordance with the present invention, may be withdrawn from the carrier substrate S, e.g. to enable mechanically flexible circuits.
  • the electrode Ei can be applied by known techniques. Exemplary techniques are, for example, printing and / or PVD (Physical Vapor Deposition).
  • the electrode E-i can be formed by means of masking M or subsequently by lithography technique.
  • the resulting semi-finished product can now be further processed.
  • a semiconductor material nanoparticle dispersion HND is applied to the first electrode E-i and deposited.
  • doctoring techniques, screen printing methods, inkjet printing, spin coating, and the like can be used, or the dispersion is poured.
  • a mu-cone Ci is formed from the semiconductor material-nanoparticle dispersion HND.
  • the height and density of a mu-cone or a plurality of mu-cones can be obtained, for example, from the thickness of the thin film from the semiconductor material-nanoparticle dispersion HND, the energy / power density of the (pulsed) Laser light L, any pulse frequency of the laser light L, the scanning speed of the laser light L, the oxide content in the semiconductor material nanoparticle dispersion HND, or via the surface energy of the electrode Ei are set.
  • the electrode E- ⁇ is designed so that it holds a laser processing stand.
  • the strength and contact time of the laser light L is of corresponding importance.
  • material selection melting point
  • design of the electrode thickness, area, thermal capacity
  • Exemplary electrode materials include titanium but also gold, silver, copper or aluminum.
  • mu-cones Ci, C 2 ,... C n in parallel and / or sequentially by means of one or more laser light sources L from the same deposited semiconductor material nanoparticle dispersion HND can be produced.
  • another semiconductor material nanoparticle dispersion HND can be applied, from which in turn mu-Konen C n + i, C n + 2, ⁇ C n + m can be formed.
  • the previous thin film obtained from the semiconductor material nanoparticle dispersion HND which was not used for the formation of mu Konen Ci, C 2 , ... C n , depending on the application on the substrate S / the electrode Ei remain or removed.
  • one or more mu-cones C 1, C 2 , ... C n , C n + i, C n + 2, ⁇ •• C n + m are formed, each having a bottom and a top, the bottom of a mu-cone Ci, C 2 , ... C n , C n + i, C n + 2, ⁇ C n + m is connected to the first electrode Ei.
  • the polymer matrix P may comprise at least one material from the group of acrylic esters, polyurethanes, silicones or epoxy resins, such as polyimides, polycarbonates, and / or polyacrylates.
  • the polymer matrix P can be crosslinked or uncrosslinked. If networking is e.g. For better support, better stability, and / or better electrical properties (e.g., insulating properties), etc., the polymer matrix may be crosslinked by activation (e.g., by UV light or laser light L), or else be induced to crosslink.
  • activation e.g., by UV light or laser light L
  • etching process such as Reactive Ion Etching (RIE) can be optionally provided with the addition of suitable process gases such as oxygen and / or CF 4 and / or SF 6, for example.
  • second electrode E 2 are applied so that the tip of the mu-cone Ci and the mu-cones Ci, C 2 , ... C n , C n + i, C n + 2, ⁇ Cn + m with the second electrode E 2 is connected.
  • a plurality of electrodes may of course be included here as well as with respect to the first electrode Ei.
  • mu-cones formed from a first semiconductor material nanoparticle dispersion HND may be connected to another electrode than mu-cones formed from another semiconductor material-nanoparticle dispersion HND.
  • the second electrode can be made of a wide variety of materials. The methods for applying the second electrode can be correspondingly different.
  • the second electrode E 2 may also be applied by PVD method and / or printing as previously described in step 75.
  • the bandwidth of possible materials is considerably larger.
  • electrically conductive polymers such as, for example, poly-3,4-ethylenedioxythiophene, doped polyacetylene, spiro and also graphene or fullerenes can be used.
  • the Schottky barrier between the second electrode E2 and the mu-cone Ci or the mu-Konen Ci C 2 , ... C n , C n + i, C n + 2 , ⁇ .
  • ⁇ Cn + m can be influenced in a targeted way. This can be achieved, for example, by targeted modification of the mu-cone tips (oxide / no oxide, lattice modifications, polymer functionalization).
  • a formation of oxide at the top of the mu-Konen be favored for example by a (local) heat treatment in an oxygen-rich atmosphere.
  • oxides can be formed at the tips of the mu-cones solely because, for example, nanoparticles are already (partially) oxidized before the laser exposure in step 200.
  • oxides can be removed by treatment with HF (hydrofluoric acid) or the like.
  • Lattice defects at the top of the mu-cones can be introduced, for example, by means of sputter etching (ion etching).
  • components comprising a Schottky diode can thus be produced.
  • the components have at least one mu-cone Ci; C 2 having a bottom and a tip, wherein the mu-cone Ci; C 2 semiconductor material.
  • the mu-cone Ci; C 2 is embedded in an electrically insulating polymer matrix P, wherein the bottom of the mu Cone Ci; C 2 with a first electrode Ei on the side of a substrate and the tip of the mu-cone Ci; C 2 is connected to a second electrode E 2 .
  • either the first electrode Ei or the second electrode E 2 with the mu-cone Ci; C 2 forms a Schottky contact SC and the respective other electrode E 2 ; Egg forms a substantially ohmic contact OC.
  • FIG. 1 An electrical equivalent circuit diagram equivalent thereto is shown in FIG.
  • FIGS. 1, 2 and 3 it is assumed that the tip of the mu-cone Ci; C 2 in each case with the second electrode E 2 forms a Schottky contact SC, while the bottom of the cone mu Ci; C 2 with the first electrode Ei forms a substantially ohmic contact OC.
  • the electrical equivalent circuit of a single mu-cone according to embodiments of the invention is shown in FIG.
  • the invention enables the semiconductor material in the semiconductor material nanoparticle dispersion HND to be any kind of doping, i. p-doped, n-doped or undoped.
  • the semiconductor material in the semiconductor material nanoparticle dispersion HND may comprise Si, Se, Ge or an Ill-V semiconductor, for example InP, GaAs,.
  • Flexible substrates S may be, for example, polymer film, flexible printed circuit boards, paper-like materials as well as fabric-like supports.
  • inflexible materials can easily be used as substrates S, such as wafers.
  • Schottky diodes with typical diode characteristics not only at 20 MHz and more, but also in the GHz range (> 1 GHz, in particular> 2 GHz, and preferably> 10 GHz) can be cost-effectively realized by means of low-cost technology.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Electrodes Of Semiconductors (AREA)
EP16711621.9A 2015-03-23 2016-03-23 Verfahren zur herstellung von bauelementen aufweisend eine schottky-diode mittels drucktechnik Ceased EP3275010A1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102015205230.3A DE102015205230B4 (de) 2015-03-23 2015-03-23 Verfahren zur Herstellung von Bauelementen aufweisend eine Schottky-Diode mittels Drucktechnik und Bauelement
PCT/EP2016/056315 WO2016150988A1 (de) 2015-03-23 2016-03-23 Verfahren zur herstellung von bauelementen aufweisend eine schottky-diode mittels drucktechnik

Publications (1)

Publication Number Publication Date
EP3275010A1 true EP3275010A1 (de) 2018-01-31

Family

ID=55589865

Family Applications (1)

Application Number Title Priority Date Filing Date
EP16711621.9A Ceased EP3275010A1 (de) 2015-03-23 2016-03-23 Verfahren zur herstellung von bauelementen aufweisend eine schottky-diode mittels drucktechnik

Country Status (5)

Country Link
US (1) US10411142B2 (pt-PT)
EP (1) EP3275010A1 (pt-PT)
CN (1) CN107438893B (pt-PT)
DE (1) DE102015205230B4 (pt-PT)
WO (1) WO2016150988A1 (pt-PT)

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8071168B2 (en) * 2002-08-26 2011-12-06 Nanoink, Inc. Micrometric direct-write methods for patterning conductive material and applications to flat panel display repair
JP4293586B2 (ja) * 2002-08-30 2009-07-08 浜松ホトニクス株式会社 ナノ粒子の製造方法及び製造装置
US20070128905A1 (en) * 2003-06-12 2007-06-07 Stuart Speakman Transparent conducting structures and methods of production thereof
US20060207647A1 (en) * 2005-03-16 2006-09-21 General Electric Company High efficiency inorganic nanorod-enhanced photovoltaic devices
US8314327B2 (en) * 2005-11-06 2012-11-20 Banpil Photonics, Inc. Photovoltaic cells based on nano or micro-scale structures
US7528017B2 (en) * 2005-12-07 2009-05-05 Kovio, Inc. Method of manufacturing complementary diodes
US8624108B1 (en) * 2006-11-01 2014-01-07 Banpil Photonics, Inc. Photovoltaic cells based on nano or micro-scale structures
JP2008127214A (ja) * 2006-11-16 2008-06-05 Honda Motor Co Ltd 炭化ケイ素ナノ構造体およびその製造方法
US10231344B2 (en) * 2007-05-18 2019-03-12 Applied Nanotech Holdings, Inc. Metallic ink
AU2008296763A1 (en) * 2007-08-28 2009-03-12 California Institute Of Technology Polymer-embedded semiconductor rod arrays
US20100275982A1 (en) * 2007-09-04 2010-11-04 Malcolm Abbott Group iv nanoparticle junctions and devices therefrom
BRPI0722353A2 (pt) * 2007-12-28 2014-03-18 Univ Aix Marseille Ii Nanocompósitos híbridos
CN101465383B (zh) * 2008-12-30 2011-08-03 中国科学院上海微系统与信息技术研究所 电阻转换存储器的制造方法
TWI424160B (zh) * 2009-06-17 2014-01-21 Univ Nat Chiao Tung 結合矽奈米線閘極二極體之感測元件、製造方法及其檢測系統
WO2011078780A1 (en) * 2009-12-22 2011-06-30 Qunano Ab Method for manufacturing a nanowire structure
CN102903849B (zh) * 2011-07-29 2015-07-01 清华大学 肖特基二极管及其制备方法
DE102011122091A1 (de) * 2011-12-22 2013-06-27 Diotec Semiconductor Ag Schottky-Halbleiterprozess
US20130189831A1 (en) * 2012-01-19 2013-07-25 Weidong Li Silicon/germanium nanoparticle inks and methods of forming inks with desired printing properties
JP5914060B2 (ja) * 2012-03-09 2016-05-11 三菱電機株式会社 炭化珪素半導体装置の製造方法
US9012883B2 (en) * 2012-12-21 2015-04-21 Sol Voltaics Ab Recessed contact to semiconductor nanowires
JP2016516211A (ja) * 2013-02-18 2016-06-02 オルボテック リミテッド ツーステップの直接描画レーザ・メタライゼーション
JP5760060B2 (ja) * 2013-09-27 2015-08-05 株式会社茨城技研 金属皮膜形成方法並びに金属皮膜形成製品の製造方法及び製造装置
US9778400B2 (en) * 2015-06-18 2017-10-03 Purdue Research Foundation System and method for manipulation of particles

Also Published As

Publication number Publication date
DE102015205230B4 (de) 2023-01-19
US10411142B2 (en) 2019-09-10
DE102015205230A1 (de) 2016-09-29
CN107438893A (zh) 2017-12-05
WO2016150988A1 (de) 2016-09-29
US20180114867A1 (en) 2018-04-26
CN107438893B (zh) 2020-11-27

Similar Documents

Publication Publication Date Title
EP1963227B1 (de) Mikromechanisches bauelement und herstellungsverfahren
DE202008017782U1 (de) Silizium-Solarzelle mit einem rückgeätzten hochdotierten Oberflächenschichtbereich
DE112010003143T5 (de) Halbleitervorrichtung, Verfahren zum Herstellen einer Halbleitervorrichtung, und Anzeigevorrichtung
EP3970210A1 (de) Verfahren zur herstellung eines ein trägersubstrat aufweisenden displays, ein nach diesem verfahren hergestelltes trägersubstrat sowie ein für ein flexibles display bestimmtes deckglas
DE2723944A1 (de) Anordnung aus einer strukturierten schicht und einem muster festgelegter dicke und verfahren zu ihrer herstellung
DE102009056530A1 (de) Nanodrahtstruktur mit freiliegenden, regelmäßig angeordneten Nanodrahtenden und Verfahren zur Herstellung einer solchen Struktur
DE102007003450A1 (de) Halbleiterbauelement mit verschiedenen Kondensatoren und Herstellungsverfahren
DE102009041546A1 (de) Verfahren zur Herstellung von Solarzellen mit selektivem Emitter
DE102007038744A1 (de) Verfahren zur Herstellung eines Halbleiter-Bauelements, Halbleiter-Bauelement sowie Zwischenprodukt bei der Herstellung desselben
DE102004060738B4 (de) Verfahren zum strukturierten Aufbringen von Molekülen auf eine Leiterbahn
DE112016000050B4 (de) Verfahren zur Herstellung eines Splitgate-Leistungsbauelements
DE102007035068A1 (de) Verfahren zum Fertigen einer Silizium-Solarzelle mit einem selektiven Emitter sowie entsprechende Solarzelle
DE4418430C1 (de) Verfahren zur Herstellung eines Siliziumkondensators
DE102015205230B4 (de) Verfahren zur Herstellung von Bauelementen aufweisend eine Schottky-Diode mittels Drucktechnik und Bauelement
DE102013113917B4 (de) Verfahren zum Fertigen eines Schichtstapels, elektronisches Bauelement und Schichtstapel
DE102015006465B4 (de) Nanoröhrenstruktur-basierter metall-damaszener-prozess
DE102008029107B4 (de) Verfahren zur Herstellung einer Metallstruktur auf einer Oberfläche eines Halbleitersubstrates
EP3084808B1 (de) Verfahren zum ausbilden eines metallkontakts auf einer oberfläche eines halbleiters und vorrichtung mit einem metallkontakt
DE102008048498A1 (de) Verfahren zum Herstellen eines Halbleiterbauelementes, insbesondere einer Solarzelle, auf Basis einer Siliziumdünnschicht
DE102007062750A1 (de) Verfahren zum Fertigen einer Silizium-Solarzelle mit einem rückgeätzten Emitter sowie entsprechende Solarzelle
EP2647061A2 (de) Verfahren zur herstellung eines solarmoduls und ein solarmodul
DE102010041900A1 (de) Verfahren zum Herstellen eines mikromechanischen Bauelements und entsprechendes mikromechanisches Bauelement
DE102016013178A1 (de) Widerstandsbehaftete RAM-Zelle mit konzentriertem elektrischen Feld
DE102004052445A1 (de) Nanostrukturträger, Verfahren zu dessen Herstellung sowie dessen Verwendung
DE102008026636B4 (de) Schaltungsträger, Integrierter Schaltkreis mit einem Schaltungsträger und Herstellungsverfahren

Legal Events

Date Code Title Description
STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE INTERNATIONAL PUBLICATION HAS BEEN MADE

PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: REQUEST FOR EXAMINATION WAS MADE

17P Request for examination filed

Effective date: 20170919

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

AX Request for extension of the european patent

Extension state: BA ME

RIN1 Information on inventor provided before grant (corrected)

Inventor name: HOFFMANN, MARC

Inventor name: ERNI, DANIEL

Inventor name: BENSON, NIELS

Inventor name: SCHMECHEL, ROLAND

Inventor name: KAISER, THOMAS

DAV Request for validation of the european patent (deleted)
DAX Request for extension of the european patent (deleted)
STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: EXAMINATION IS IN PROGRESS

17Q First examination report despatched

Effective date: 20181212

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: EXAMINATION IS IN PROGRESS

REG Reference to a national code

Ref country code: DE

Ref legal event code: R003

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE APPLICATION HAS BEEN REFUSED

18R Application refused

Effective date: 20201005