EP2787799A1 - Carte à composant incorporé et son procédé de fabrication, et conditionnement avec carte à composant incorporé - Google Patents

Carte à composant incorporé et son procédé de fabrication, et conditionnement avec carte à composant incorporé Download PDF

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Publication number
EP2787799A1
EP2787799A1 EP12854222.2A EP12854222A EP2787799A1 EP 2787799 A1 EP2787799 A1 EP 2787799A1 EP 12854222 A EP12854222 A EP 12854222A EP 2787799 A1 EP2787799 A1 EP 2787799A1
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EP
European Patent Office
Prior art keywords
board
component built
heat
electronic component
thermal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP12854222.2A
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German (de)
English (en)
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EP2787799A4 (fr
EP2787799B1 (fr
Inventor
Kazuhisa Itoi
Masahiro Okamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujikura Ltd
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Fujikura Ltd
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Publication of EP2787799A1 publication Critical patent/EP2787799A1/fr
Publication of EP2787799A4 publication Critical patent/EP2787799A4/fr
Application granted granted Critical
Publication of EP2787799B1 publication Critical patent/EP2787799B1/fr
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
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    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4857Multilayer substrates
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    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367Cooling facilitated by shape of device
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    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5389Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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    • H01L2224/81907Intermediate bonding, i.e. intermediate bonding step for temporarily bonding the semiconductor or solid-state body, followed by at least a further bonding step
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    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83192Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
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    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12042LASER
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    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15153Shape the die mounting substrate comprising a recess for hosting the device
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/0969Apertured conductors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10674Flip chip
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0058Laminating printed circuit boards onto other substrates, e.g. metallic substrates
    • H05K3/0061Laminating printed circuit boards onto other substrates, e.g. metallic substrates onto a metallic substrate, e.g. a heat sink
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4602Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49126Assembling bases

Definitions

  • This invention relates to a component built-in board having an electronic component built in thereto, and a method of manufacturing the same, and to a component built-in board mounting body.
  • a conventional component built-in board is configured to transmit heat generated by the electronic component to a heat sink (heat radiator) disposed in a layer above the wiring board via an insulating layer excelling in heat conductivity and a thermal via contacting a back surface (surface on an opposite side to a mounting surface) of the electronic component, and thereby radiate the heat generated by the electronic component (Patent Document 1).
  • Patent Document 1 Japanese Unexamined Patent Application Publication No. 2008-305937 A
  • connection between the back surface of the electronic component and the heat radiator is made via a thermal via formed by a heat-conducting resin composition.
  • heat conductivity of a conductive paste is lower than heat conductivity of copper, hence there is a problem that heat radiation characteristics are worse than when copper is connected.
  • the back surface of the electronic component is brought into direct contact with a heat-conducting member such as the heat radiator.
  • a heat-conducting member such as the heat radiator.
  • This invention has an object of overcoming the above-mentioned problems due to the conventional technology to provide a component built-in board in which close attachment between the electronic component and a heat-conducting layer can be secured and heat radiation characteristics can be improved, and a method of manufacturing the component built-in board, and to provide a component built-in board mounting body.
  • a component built-in board comprises stacked therein a plurality of printed wiring bases having a wiring pattern and a via formed on/in a resin base thereof, and comprises an electronic component built in thereto, wherein at least a portion of the plurality of printed wiring bases include a thermal wiring in the wiring pattern and include a thermal via in the via, at least one of the plurality of printed wiring bases has formed therein an opening where the electronic component is built, and has formed therein a heat-conducting layer configured from a metallic member and closely attached to a surface on an opposite side to an electrode formation surface of the electronic component built in to the opening, and the electronic component is fixed in the opening by an adhesive layer stacked on the heat-conducting layer, via a hole formed in a region facing onto the opening of the heat-conducting layer.
  • the surface on the opposite side to the electrode formation surface of the electronic component built in to the component built-in board is closely attached to the heat-conducting layer configured from the metallic member having a heat conductivity higher than that of a conductive paste in the opening, and is fixed in the opening by the adhesive layer stacked on the heat-conducting layer, via the hole formed in the region facing onto the opening of the heat-conducting layer, hence close attachment between the electronic component and the heat-conducting layer can be secured and heat radiation characteristics can be improved.
  • the hole is formed discretely in the region.
  • the heat-conducting layer is connected via the thermal via and the thermal wiring to a bump formed in a surface layer of the component built-in board.
  • a method of manufacturing a component built-in board according to the present invention, the component built-in board comprising stacked therein a plurality of printed wiring bases that have a wiring pattern and a via formed on/in a resin base thereof, and the component built-in board comprising an electronic component built in thereto comprises the steps of: forming the wiring pattern including a thermal wiring and the via including a thermal via in a plurality of the resin bases, forming in at least one of the plurality of resin bases an opening where the electronic component is built in, and forming a heat-conducting layer that is configured from a metallic member, includes a hole in a region facing onto the opening, and is closely attached to a surface on an opposite side to an electrode formation surface of the electronic component built in to the opening, thereby forming the plurality of printed wiring bases; and collectively stacking the plurality of printed wiring bases by thermal compression bonding such that the surface on the opposite side to the electrode formation surface of the electronic component is fixed in the opening by an adhesive layer stacked on the heat-conducting layer
  • the surface on the opposite side to the electrode formation surface of the electronic component built in to the component built-in board is closely attached to the heat-conducting layer configured from the metallic member having a heat conductivity higher than that of a conductive paste in the opening; and is fixed in the opening by the adhesive layer stacked on the heat-conducting layer, via the hole formed in the region facing onto the opening of the heat-conducting layer, hence working effects similar to those described above can be displayed.
  • the hole is formed discretely in the region.
  • Another embodiment of the present invention further comprises the step of forming in a surface layer of the component built-in board a bump connected to the heat-conducting layer via the thermal via and the thermal wiring.
  • a component built-in board mounting body comprising a component built-in board mounted on a mounting board, the component built-in board comprising stacked therein a plurality of printed wiring bases that have a wiring pattern and a via formed on/in a resin base thereof, and the component built-in board comprising an electronic component built in thereto, wherein at least a portion of the plurality of printed wiring bases include a thermal wiring in the wiring pattern and include a thermal via in the via, at least one of the plurality of printed wiring bases has formed therein an opening where the electronic component is built, and has formed therein a heat-conducting layer configured from a metallic member and closely attached to a surface on an opposite side to an electrode formation surface of the electronic component built in to the opening, the electronic component is fixed in the opening by an adhesive layer stacked on the heat-conducting layer, via a hole formed in a region facing onto the opening of the heat-conducting layer, and the component built-in board is configured to be mounted on the mounting board via a bump formed
  • the surface on the opposite side to the electrode formation surface of the electronic component built in to the component built-in board is connected to the mounting board via the heat-conducting layer, the thermal via, the thermal wiring, and the bump formed in the surface layer of the component built-in board. Therefore, heat of the electronic component is transmitted along the heat-conducting layer, the thermal via, the thermal wiring, and the bump that act as a heat radiation path, to be radiated efficiently and reliably to the mounting board.
  • the mounting board has a sufficiently broad area compared to the electronic component or the component built-in board, hence is better as a heat radiation medium than a conventional kind of heat radiator, and does not need to be provided with a heat radiator. As a result, miniaturization is possible and flexibility of layout of the electronic component can be increased, and furthermore, improvement of heat radiation characteristics of the built in electronic component can be achieved.
  • the hole is formed discretely in the region.
  • FIG. 1 is a cross-sectional view showing a structure of a component built-in board mounting body according to a first embodiment of the present invention.
  • a component built-in board mounting body 100 according to the first embodiment is configured from a component built-in board 1 and a mounting board 2 on whose mounting surface 2a this component built-in board 1 is mounted.
  • the component built-in board 1 comprises a structure in which a second printed wiring base 20, a third printed wiring base 30, a fourth printed wiring base 40, and a cover lay film 3 substituting for a first printed wiring base are stacked collectively by thermal compression bonding. Moreover, the component built-in board 1 comprises an electronic component 90 which is built in to an opening 29 formed in a second resin base 21 of the second printed wiring base 20, in a state of being sandwiched by the third printed wiring base 30 and the cover lay film 3. Furthermore, the component built-in board 1 comprises a bump 49 formed on a mounting surface 2a side of the fourth printed wiring base 40.
  • the third and fourth printed wiring bases 30 and 40 respectively comprise: third and fourth resin bases 31 and 41; and signal-dedicated wiring lines 32 and 42, and thermal wiring lines 33 and 43 formed on at least one surface of these third and fourth resin bases 31 and 41.
  • the third and fourth printed wiring bases 30 and 40 respectively comprise thermal vias 34 and 44, and signal-dedicated vias 35 and 45 that are formed by filling inside via holes formed in the third and fourth resin bases 31 and 41.
  • the second printed wiring base 20 comprises: a thermal wiring line 23 formed on one surface of the second resin base 21; a conductor layer 8 having a hole formed on another surface of the second resin base 21; and a thermal via 24 that is formed inside a via hole formed in the second resin base 21 such that both surfaces of the second resin base 21 are electrically continuous.
  • a thermal wiring line 23 formed on one surface of the second resin base 21 a conductor layer 8 having a hole formed on another surface of the second resin base 21; and a thermal via 24 that is formed inside a via hole formed in the second resin base 21 such that both surfaces of the second resin base 21 are electrically continuous.
  • employable as these second through fourth printed wiring bases 20 to 40 are, for example, a single-sided copper clad laminated board (single-sided CCL) or a double-sided copper clad laminated board (double-sided CCL), and so on.
  • the second printed wiring base 20 is formed based on a double-sided CCL, and the third and fourth printed wiring bases 30 and 40 are formed based on a single-sided CCL. Therefore, the conductor layer 8 and the thermal wiring line 23 of the second printed wiring base 20 are formed on both surfaces of the second resin base 21, and the thermal via 24 provides interlayer connection between the conductor layer 8 and the thermal wiring line 23 of both these surfaces.
  • the thermal via 24 is configured from a structure in which, for example, a plating is applied inside a through-hole formed from a thermal wiring line 23 side without penetrating the conductor layer 8, and is formed by, for example, a copper plating.
  • a plating is applied inside a through-hole formed from a thermal wiring line 23 side without penetrating the conductor layer 8, and is formed by, for example, a copper plating.
  • the conductor layer 8, along with a plated layer 23a formed thereon, configure a heat-conducting layer 23A that conducts heat from the electronic component 90.
  • the second through fourth resin bases 21 to 41 and the cover lay film 3 are each configured by, for example, a resin film having a thickness of about 25 ⁇ m.
  • a resin film configured from the likes of a polyimide, polyolefin, or liquid crystal polymer, or a resin film configured from a thermosetting epoxy resin, and so on.
  • the electronic component 90 is the likes of a semiconductor component such as an IC chip, for example, or a passive component, and the electronic component 90 shown in FIG. 1 indicates a WLP (Wafer Level Package) that has been rewired.
  • WLP Wafer Level Package
  • the signal-dedicated wiring lines 32 and 42, and the thermal wiring lines 23, 33, and 43 are configured by, for example, pattern-forming a conductive material such as copper foil having a thickness of about 12 ⁇ m.
  • the signal-dedicated vias 35 and 45, and the thermal vias 34 and 44 are configured from a conductive paste respectively filled into the via holes, and the thermal via 24 is formed by plating as described above.
  • the thermal wiring lines and thermal vias, excluding a portion thereof, are formed to be disposed on an outer peripheral side of the electronic component 90.
  • the conductive paste includes, for example, at least one kind of metallic particle of low electrical resistance selected from the likes of nickel, gold, silver, copper, aluminum, and iron, and at least one kind of metallic particle of low melting point selected from the likes of tin, bismuth, indium, and lead, and is configured from a paste that has mixed therein a binder component whose main component is an epoxy, an acrylic, a urethane, and so on.
  • the conductive paste configured in this way has low heat conductivity of, for example, 5 to 13.5 W/(m ⁇ K), and enables the metal of low melting point contained therein to melt and form an alloy at a temperature of 200°C or less, specifically the likes of copper or silver comprise characteristics allowing an intermetallic compound to be formed.
  • the conductive paste may also be conf igured by a nanopaste in which, for example, a filler of the likes of gold, silver, copper, or nickel with a nanolevel particle diameter is mixed into a binder component of the above-described kind.
  • the conductive paste may also be configured by a paste having metallic particles of the above-described nickel, and so on, mixed into a binder component of the above-described kind.
  • the conductive paste is characterized in that electrical connection is performed by contact between fellow metallic particles.
  • Employable as a method of filling the conductive paste into the via holes is, for example, a printing method, a spin coating method, a spray coating method, a dispensing method, a laminating method, a method combining use of these methods, and so on.
  • the bump 49 is configured from the likes of solder, and is formed at a portion above the signal-dedicated wiring line 42 and the thermal wiring line 43 formed on the mounting surface 2a side of the fourth resin base 41 of the fourth printed wiring base 40 not covered by a solder resist 48.
  • the component built-in board 1 is mounted on the mounting surface 2a of the mounting board 2 via these bumps 49.
  • the second through fourth printed wiring bases 20 to 40 and the cover lay film 3 are stacked via an adhesive layer 9.
  • the adhesive layer 9 is configured from, for example, the likes of an epoxy system or acrylic system adhesive material, or the likes of an organic system adhesive material including a volatile component.
  • the electronic component 90 disposed in the opening 29 of the second printed wiring base 20 has a back surface 91a thereof on an opposite side to the electrode formation surface 91b thereof closely attached to the conductor layer 8 of the heat-conducting layer 23A.
  • the back surface 91a is adhered by the adhesive layer 9 of the cover lay film 3, via a hole 23B formed in a region facing onto the opening 29 of the heat-conducting layer 23A.
  • the electronic component 90 is fixed in the opening 29 in a state where the back surface 91a and the conductor layer 8 have been closely attached.
  • the conductor layer 8 is configured from a copper foil of pure copper
  • the pure copper has an extremely high heat conductivity of 403 W/(m ⁇ K) at 0°C and 395 W/(m ⁇ K) at 100°C, hence closely attaching the conductor layer 8 to the back surface 91a is extremely effective in improving heat radiation characteristics.
  • the conductor layer 8 and the back surface 91a of the electronic component 90 cannot be directly adhered, hence some kind of adhesive medium becomes required between these conductor layer 8 and back surface 91a of the electronic component 90 and heat conducting characteristics are inferior compared to when the electronic component 90 is closely attached to the conductor layer 8 having a hole.
  • the component built-in board mounting body 100 configured in this way leads to a structure in which the electronic component 90 is disposed between the heat-conducting layer 23A and the mounting board 2. Moreover, heat of the electronic component 90 built in to the component built-in board 1 follows the following heat radiation path to be transmitted to the mounting board 2. That is, heat of the electronic component 90 is transmitted from the back surface 91a of the electronic component 90 to the heat-conducting layer 23A of the second printed wiring base 20.
  • Heat transmitted to the heat-conducting layer 23A passes through the thermal via 24 formed on the outer peripheral side of the electronic component 90 to be transmitted to the thermal via 34 and the thermal wiring line 33 of the third printed wiring base 30, and is further transmitted to the thermal via 44 and the thermal wiring line 43 of the fourth printed wiring base 40 to be transmitted to the bump 49.
  • Heat transmitted to the bump 49 in this way is transmitted via this bump 49 to the mounting board 2 which has an area larger than that of the component built-in board 1, to be radiatede from the mounting board 2.
  • FIGS. 2 to 5 are flowcharts each showing manufacturing steps of the component built-in board mounting body.
  • FIGS. 6 to 9 are cross-sectional views each showing the component built-in board mounting body on a manufacturing step basis. Note that details of manufacturing steps are shown for the third and fourth printed wiring bases 30 and 40 in FIGS. 2 and 6 , for the second printed wiring base 20 in FIGS. 3 and 7 , for the electronic component in FIGS. 4 and 8 , and for the component built-in board mounting body in FIGS. 5 and 9 .
  • the manufacturing steps of the third and fourth printed wiring bases 30 and 40 will be described. Note that these can be manufactured by similar steps, hence although here, the manufacturing steps of the fourth printed wiring base 40 will be described representatively with reference to FIG. 2 , the same applies also to the third printed wiring base 30.
  • a single-sided copper clad laminated board (single-sided CCL) in which the conductor layer 8 is formed on one surface of the fourth resin base 41, is prepared (step S100).
  • an etching resist is formed on the conductor layer 8 by photolithography, and then etching is performed to form a wiring pattern of the signal-dedicated wiring line 42, the thermal wiring line 43, and so on, as shown in FIG. 6 (b) (step S102).
  • the single-sided CCL used instep S100 is, for example, configured from a structure in which the fourth resin base 41 having a thickness of about 25 ⁇ m is affixed to the conductor layer 8 configured from a copper foil having a thickness of about 12 ⁇ m.
  • this single-sided CCL is, for example, a single-sided CCL produced by applying a varnish of polyimide to the copper foil and hardening the varnish, by a casting method.
  • the casting method is a publicly known method of forming a flat film or sheet by extruding resin melted by an extruder from a linear slit provided in a flat die, and rapidly cooling the melted film by a cooled roller, and winding the film while rolling the film. This method is highly reliable and frequently used.
  • the single-sided CCL are the likes of a single-sided CCL in which a seed layer is formed on a polyimide film by sputtering and the conductor layer 8 is formed by growing copper by plating, or a single-sided CCL produced by attaching a rolled or electrolytic copper foil and a polyimide film by an adhesive material.
  • the fourth resin base 41 is not necessarily required to be configured from a polyimide, and may be configured from a plastic film of a liquid crystal polymer, or the like.
  • the etching in step S102 may employ the likes of an etchant whose main component is ferric chloride or an etchant whose main component is cupric chloride.
  • a surface on an opposite side to a signal-dedicated wiring line 42 and thermal wiring line 43 formation surface side of the fourth resin base 41 has an adhesive material 9a and a mask material 7 attached thereto by heat pressing (step S104).
  • the adhesive material 9a attached in step S104 is, for example, an epoxy system thermosetting film having a thickness of about 25 ⁇ m.
  • the heat pressing includes employing a vacuum laminator to press and attach the adhesive material 9a and mask material 7 to the fourth resin base 41 in a reduced pressure atmosphere, at a temperature less than or equal to a curing temperature of the adhesive material 9a, by a pressure of 0.3 MPa.
  • an inter-layer adhesive material employed in the adhesive layer 9 or the adhesive material 9a may be not only an epoxy system thermosetting resin, but also the likes of an acrylic system adhesive material or a thermoplastic adhesive material typified by a thermoplastic polyimide, or the like. Moreover, the inter-layer adhesive material is not necessarily required to be in a film state, and may have resin coated in a varnish state.
  • Employable as the mask material are various kinds of films attachable or detachable by UV irradiation, in addition to the above-mentioned resin film or a plastic film of the likes of PET and PEN.
  • the via hole 6 formed in step S106 has a diameter ⁇ of about 100 ⁇ m, and is formed in a certain place using a UV laser.
  • the via hole 6 may otherwise be formed by the likes of a carbon dioxide laser or an excimer laser, or may be formed by the likes of drill processing or chemical etching.
  • the plasma desmear processing can be performed by a mixed gas of CF 4 and O 2 (tetrafluoromethane + oxygen), but may also employ another inert gas such as Ar (argon), and may be conf igured as wet desmear processing employing a chemical, rather than so-called dry processing.
  • the conductive paste is filled into the formed via hole 6 by, for example, screen printing to form the various kinds of vias of the signal-dedicated via 45 and the thermal via 44 (step S108), and the mask material 7 is detached, thereby forming the fourth printed wiring base 40 that includes the fourth resin base 41 provided with the adhesive layer 9.
  • the thermal via 44 may be configured formed by a plating rather than the conductive paste, in order to achieve improvement in heat conductivity. Such a processing is performed to form and prepare the third printed wiring base 30 or additional printed wiring bases in the case of further multiple layers.
  • a double-sided copper clad laminated board (double-sided CCL) in which the conductor layer 8 is formed (in a solid state) along an entire surface on both surfaces of the second resin base 21, is prepared (step S110), and as shown in FIG. 7 (b) , the via hole 6 is formed at a certain place (step S112), and plasma desmear processing is performed.
  • panel plate processing is performed on all surfaces of the second resin base 21 (steep S114), to form a plated layer 23a on the conductor layer 8 and in the via hole 6.
  • the plated layer 23a in the via hole 6 is a plated via employed later as the thermal via 24 and provides electrical continuity between the conductive layers 8 of both surfaces of the second resin base 21.
  • etching, and so on is performed on both surfaces of the second resin base 21 to form a wiring pattern of the likes of the heat-conducting layer 23A configured from the conductor layer 8 and the plated layer 23a, or the thermal wiring line 23 and thermal via 24, and to form in the heat-conducting layer 23A the hole 23B for adhering the electronic component 90 (step S116).
  • a plurality of the holes 23B formed in the heat-conducting layer 23A in this step S116 are pattern formed in a rectangular shape and a mesh shape in a range which is narrower than a region that will be the opening 29 and is narrower than the area of the electronic component 90.
  • the holes 23B are arranged discretely and the adhesive material that has worked into the hole 23B and the back surface 91a of the electronic component 90 are adhered, it is possible to prevent moisture collecting between the back surface 91a of the electronic component 90 and the heat-conducting layer 23A that have a weak force of attachment and to prevent the moisture evaporating by the likes of heat application due to reflow and so on during mounting or heat generation of the electronic component chip, and to thereby prevent a gap occurring between these back surface 91a of the electronic component 90 and the heat-conducting layer 23A and reliability of the component built-in board getting lowered.
  • the holes 23B may be configured formed in a circular shape and a mesh shape as shown in FIG.
  • the holes 23B may be formed in various kinds of patterns such as to leave an area where the back surface 91a of the electronic component 90 and the heat-conducting layer 23A are closely attached, such as a pattern where each of a plurality of the holes 23B has a different size or a grid-like pattern, and so on.
  • the second resin base 21 at a portion thereof where the electronic component 90 is to be built in is removed by a UV laser, or the like, and the opening 29 is formed (step S118), thereby forming the second printed wiring base 20.
  • the electronic component 90 built in to the opening 29 of the second printed wiring base 20 formed in this way is manufactured, for example, as follows. The manufacturing steps of the electronic component 90 will be described with reference to FIG. 4 .
  • a pre-dicing wafer 92 having formed therein an inorganic insulating layer of the likes of silicon oxide or silicon nitride, is prepared (step S120).
  • a conductor circuit (not illustrated) or the rewiring electrode 91 covering the pad 91c is formed above the pad 91c of the electronic component 90 and above the inorganic insulating layer on a surface of the prepared wafer 92 by, for example, a semi-additive method (step S122).
  • a contact hole is formed by, for example, spin-coating a liquid-form photosensitive polyimide precursor and performing photolithography, and then the insulating layer 91d is formed by calcination (step S124). Finally, testing is performed by probing, and as shown in FIG. 8(d) , the electronic component 90 is produced by separating into an individual piece by thinning and dicing (step S126).
  • the photosensitive resin does not necessarily need to be coated by spin coating, and may be coated by curtain coating or screen printing, or by spray coating, and so on.
  • the electronic component 90 produced in this way may also be provided with various functions of an inductor, a capacitor, a resistance, and so on, as well as an ordinary conductive circuit.
  • the rewiring electrode 91 of the electronic component 90 and the signal-dedicated via 35 of the third printed wiring base 30 are aligned by an electronic component mounting device, and the electronic component 90 is provisionally adhered to the third printed wiring base 30 in a state where the adhesive layer 9 of the third printed wiring base 30 and the conductive paste of the signal-dedicated via 35 are uncured.
  • each of the printed wiring bases 20 to 40, the electronic component 90, and the cover lay film 3 on which the adhesive layer 9 is formed are positioned and stacked (step S130).
  • a vacuum press is employed to collectively stack by thermal compression bonding by applying heat and pressure in a reduced pressure atmosphere of 1 kPa or less (step S132), and first, the component built-in board 1 of the kind shown in FIG. 1 is manufactured.
  • curing and alloying of the conductive paste filled into the via hole 6 is performed simultaneously to curing of each of the inter-layer adhesive layers 9 or each of the resin bases 21 and 31, and so on. Therefore, an alloy layer of an intermetallic compound is formed between the conductive paste and the wiring lines and so on contacting the conductive paste.
  • step S134 the fourth resin base 41 on the signal-dedicated wiring line 42 and thermal wiring line 43 side of the fourth printed wiring base 40 in the component built-in board 1 has the solder resist 48 pattern-formed thereon (step S134).
  • step S136 the bump 49 is formed on each of the wiring lines 42 and 43 by solder or the like
  • step S138 the component built-in board 1 is mounted on the mounting surface 2a of the mounting board 2 (step S138), thereby manufacturing the component built-in board mounting body 100 according to the first embodiment of the kind shown in FIG. 1 .
  • FIG. 13 is a cross-sectional view showing a structure of a component built-in board mounting body according to a second embodiment of the present invention.
  • a component built-in board mounting body 100A according to the second embodiment differs from the component built-in board mounting body 100 according to the first embodiment in having a first printed wiring base 10 stacked in place of the cover lay film 3 and in having heat of the electronic component 90 radiated not only from the mounting board 2 but also from a first printed wiring base 10 side.
  • the first printed wiring base 10 basically can be manufactured by steps similar to those for the fourth printed wiring base 40 described using FIGS. 2 and 6 , and is configured from a structure in which the conductor layer 8 having a solid pattern is formed on one surface of the first resin base 11. Different from the fourth printed wiring base 40 is the fact that the conductor layer 8 of the single-sided CCL is utilized unchanged without forming the wiring pattern in step S102, and a stacked form has front and back reversed.
  • the first printed wiring base 10 configured in this way has formed therein a plurality of thermal vias 14 connected to the conductor layer 8, and is stacked in a state where each of the thermal vias 14 is connected to the heat-conducting layer 23A of the second printed wiring base 20.
  • a heat radiation-dedicated fin 80 which is separately formed and is configured from a member of high heat conductivity is connected in close attachment along an entire surface on the conductor layer 8.
  • heat generated by the electronic component 90 passes through the heat-conducting layer 23A to be radiated from the mounting board 2, and passes through the thermal via 14 and the conductor layer 8 to be radiated also from the heat radiation-dedicated fin 80. As a result, heat radiation characteristics can be further improved.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
EP12854222.2A 2011-11-30 2012-11-14 Carte à composant incorporé et son procédé de fabrication, et conditionnement avec carte à composant incorporé Active EP2787799B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2011262217A JP5167516B1 (ja) 2011-11-30 2011-11-30 部品内蔵基板及びその製造方法並びに部品内蔵基板実装体
PCT/JP2012/079463 WO2013080790A1 (fr) 2011-11-30 2012-11-14 Carte à composant incorporé et son procédé de fabrication, et conditionnement avec carte à composant incorporé

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EP2787799A1 true EP2787799A1 (fr) 2014-10-08
EP2787799A4 EP2787799A4 (fr) 2015-07-29
EP2787799B1 EP2787799B1 (fr) 2020-02-12

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US (1) US9591767B2 (fr)
EP (1) EP2787799B1 (fr)
JP (1) JP5167516B1 (fr)
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JP6582669B2 (ja) * 2015-07-22 2019-10-02 Tdk株式会社 薄膜キャパシタ及び半導体装置
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JP6770331B2 (ja) * 2016-05-02 2020-10-14 ローム株式会社 電子部品およびその製造方法
JP6662716B2 (ja) * 2016-06-08 2020-03-11 新光電気工業株式会社 光センサ、光センサの製造方法
US10057989B1 (en) * 2017-04-10 2018-08-21 Tactotek Oy Multilayer structure and related method of manufacture for electronics
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EP3917291A3 (fr) 2020-05-27 2022-02-09 Hamilton Sundstrand Corporation Systèmes de régulation thermique d'une unité de commande de générateur
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Publication number Publication date
WO2013080790A1 (fr) 2013-06-06
DK2787799T3 (da) 2020-05-11
US9591767B2 (en) 2017-03-07
JP5167516B1 (ja) 2013-03-21
US20140268574A1 (en) 2014-09-18
EP2787799A4 (fr) 2015-07-29
JP2013115345A (ja) 2013-06-10
EP2787799B1 (fr) 2020-02-12

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