Classifications

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  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
  • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
  • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
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  • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
  • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
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  • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
  • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
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  • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
  • H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
  • H01L24/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
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  • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
  • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
  • H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
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  • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
  • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
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  • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
  • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
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  • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
  • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
  • H01L33/52—Encapsulations
  • H01L33/56—Materials, e.g. epoxy or silicone resin
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  • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
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  • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
  • H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
  • H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
  • H01L2224/241—Disposition
  • H01L2224/24135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
  • H01L2224/24137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
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  • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
  • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
  • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
  • H01L2224/321—Disposition
  • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
  • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
  • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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  • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
  • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
  • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
  • H01L2224/321—Disposition
  • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
  • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
  • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
• • H—ELECTRICITY
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  • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
  • H01L2224/732—Location after the connecting process
  • H01L2224/73251—Location after the connecting process on different surfaces
  • H01L2224/73267—Layer and HDI connectors
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  • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
  • H01L2224/92—Specific sequence of method steps
  • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
  • H01L2224/9222—Sequential connecting processes
  • H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
  • H01L2224/92244—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a build-up interconnect
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  • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
  • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
  • H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
• • H—ELECTRICITY
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  • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
  • H01L2924/01—Chemical elements
  • H01L2924/01005—Boron [B]
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  • H01L2924/01—Chemical elements
  • H01L2924/01023—Vanadium [V]
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  • H01L2924/01—Chemical elements
  • H01L2924/01082—Lead [Pb]
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  • H01L2924/10—Details of semiconductor or other solid state devices to be connected
  • H01L2924/11—Device type
  • H01L2924/12—Passive devices, e.g. 2 terminal devices
  • H01L2924/1204—Optical Diode
  • H01L2924/12041—LED
• • H—ELECTRICITY
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  • H01L2924/10—Details of semiconductor or other solid state devices to be connected
  • H01L2924/11—Device type
  • H01L2924/12—Passive devices, e.g. 2 terminal devices
  • H01L2924/1204—Optical Diode
  • H01L2924/12042—LASER
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  • H01L2933/0008—Processes
  • H01L2933/0033—Processes relating to semiconductor body packages
  • H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
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  • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
  • H01L2933/0091—Scattering means in or on the semiconductor body or semiconductor body package
• • H—ELECTRICITY
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  • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
  • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
  • H01L33/50—Wavelength conversion elements
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  • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
  • H01L33/58—Optical field-shaping elements
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  • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
  • H01L33/58—Optical field-shaping elements
  • H01L33/60—Reflective elements

Definitions

• An object to be solved is to provide a method for
• a carrier which has an upper side and one of the upper side of the carrier
• the carrier may be a printed circuit board or a metallic one
• Carrier frame (leadframe) act. It is also conceivable that the carrier is flexible and, for example, as a film
• the carrier can be connected to an electric
• the carrier may have electrical conductor tracks and contact surfaces on the top and / or bottom side.
• a surface is formed in each case, which is formed by a part of the outer surface of the carrier.
• the area at the bottom is the part of the Outside surfaces of the carrier, which faces a contact carrier - for example, a circuit board - in the mounted state of the wearer.
• the surface on the underside of the carrier is a mounting surface that may serve to mount the later semiconductor device on the contact carrier.
• the carrier has at least one contact surface arranged on the upper side of the carrier.
• a next step b) at least one optoelectronic component is applied to the upper side of the carrier, wherein the optoelectronic component has at least one contact surface facing away from the carrier.
• Contact surface is used for electrical contacting of the optoelectronic component and is formed with an electrically conductive material, such as a metal.
• an electrically conductive material such as a metal.
• the optoelectronic component is bonded, soldered or electrically conductively bonded to a contact surface of the carrier with an outer surface remote from the contact surface.
• the optoelectronic component may in particular be a radiation-receiving end or a
• the semiconductor chip is a luminescence diode chip, that is to say a light-emitting diode chip or a laser diode chip.
• an electrically insulating Material applied to the contact surface and the pad.
• neither a gap nor an interruption forms between the electrically insulating material on the one hand and the contact surface and the connection surface on the other hand.
• the electrically insulating material covers the pad and / or the
• the electrically insulating material may also cover side surfaces of the contact and the pad.
• the electrically insulating material is free from
• Foreign particles of a filler In this context, "free of foreign particles of a filler" means that the foreign particles of the filler are not deliberately introduced from the outside into the electrically insulating material. It is at most possible that, for example, as a result of production, residues of the foreign particles of the filler are still present in the electrically insulating material. Preferably, however, the concentration of the foreign particles is in such a low concentration in the electrically insulating
• an electrically insulating layer is exposed to exposed areas of the electrically insulating layer
• the electrically insulating layer preferably covers the electrically insulating material and the optoelectronic component in a form-fitting manner at these locations.
• Example are also exposed parts of the carrier at his Top partially or completely covered by the electrically insulating layer.
• the electrically insulating layer has foreign particles of the filler of a predeterminable concentration. This means that the foreign particles of the filler from the outside into the
• Foreign particles of the filler is preferably the
• Openings are produced in the electrically insulating material.
• the openings each extend in the vertical direction completely through the electrically insulating
• Very direction in this context means a direction perpendicular to the lateral direction.
• the openings have at least one side surface. The at least one
• Connecting surface electrically conductively connects electrically conductively connects. That is to say that the electrically conductive material electrically conductively connects the optoelectronic component to the connection surface of the carrier and in this case runs at least in places between the optoelectronic component and the connection surface on an outer side of the electrically insulating layer facing away from the carrier.
• the electrically conductive material may in places directly on an outer surface of the
• Example is the electrically conductive material with a
• an electrically conductive connection between the optoelectronic component and the connection surface of the carrier is completely formed by the electrically conductive material.
• the openings are completely filled with the electrically conductive material.
• a carrier which has an upper side, an underside of the upper side of the carrier and at least one contact surface arranged on the upper side of the carrier.
• a carrier is provided which has an upper side, an underside of the upper side of the carrier and at least one contact surface arranged on the upper side of the carrier.
• at least one optoelectronic component is applied to the upper side of the carrier, wherein the optoelectronic
• Component has at least one contact surface facing away from the carrier.
• an electrically insulating material is applied to the contact surface and the
• an electrically insulating layer is applied to exposed areas of the electrically insulating material, the optoelectronic component and the carrier, wherein the electrically insulating layer
• Material connects the contact surface with the pad electrically conductive.
• the optoelectronic semiconductor component is based on the finding that, when exposing the electrical contacts of the optoelectronic component to an electrically insulating layer which has foreign particles of a filler of a predeterminable concentration, residues of the foreign particles still remain after removal of the electrically insulating layer at contact surfaces of the contacts of the filler can remain. The remaining on the contact surfaces remnants of the foreign particles of the filler can lead to a reduction in electrical contactability of the optoelectronic device. Furthermore, the contact surfaces of the optoelectronic component can be damaged by the remaining foreign particles of the filler. In order to provide a method for producing an optoelectronic semiconductor component, in which damage to the electrical contacts of the later optoelectronic
• Component can be avoided and at the same time the electrical contactability is improved, makes the method described here, inter alia, of the idea of applying an electrically insulating material to the electrical contacts of the optoelectronic device, the electrically insulating material free from
• the electrically insulating layer comprises the foreign particles of the filler of the predetermined concentration.
• the electrically insulating material which is free of the foreign particles of the filler, is disposed between the electrical contacts and the electrically insulating layer. That means that the
• Optoelectronic device only in direct contact with the electrically insulating material.
• the electrically insulating material serves as a spacer between the foreign particles and the electrical contacts.
• the electrically insulating material and the electrically insulating layer have the same material.
• the electrically insulating layer and the electrically insulating material are formed with the identical material except for the foreign particles of the filler.
• Insulating layer of the electrically insulating material in the lateral direction avoided because adjacent to the foreign particles of the filler adjacent boundary surfaces of the electrically insulating layer and the electrically
• the electrically insulating layer is in the region above the contact surface
• the insulating layer completely exposes all exposed locations of the electrically insulating material and the optoelectronic device. For example, all exposed locations on the top of the carrier are also completely covered by the electrically insulating layer.
• the openings then extend in the vertical direction both through the electrically insulating layer and through the electrically insulating material continuously and continuously. Side surfaces of the openings are then formed both by the electrically insulating material and by the electrically insulating layer.
• the electrically insulating layer contains at least one
• Luminescence conversion material is used for at least partial conversion of primarily within the optoelectronic
• Component generated electromagnetic radiation in electromagnetic radiation of different wavelengths are Component generated electromagnetic radiation in electromagnetic radiation of different wavelengths.
• the electrically insulating material is applied at least in places to a radiation passage area of the optoelectronic component, wherein the electrically insulating material is permeable to radiation.
• the electrically insulating material is applied at least in places to a radiation passage area of the optoelectronic component, wherein the electrically insulating material is permeable to radiation.
• Optoelectronic device coupled or from the optoelectronic device through the
• Random-transmissive means, in particular, that the electrically insulating material is at least 80%, preferably more than 90% permeable to electromagnetic radiation.
• the electrically insulating layer directly adjoins the electrically insulating material. This may mean that the electrically insulating layer is the electrically insulating material and / or the optoelectronic component edge
• At least one conversion layer is then applied to an outer surface of the electrically insulating material facing away from the optoelectronic component and before step d).
• Conversion layer in the vertical direction at least
• Component and the conversion layer on an imaginary plane perpendicular to the vertical direction at least
• the conversion layer serves for the at least partial conversion of electromagnetic radiation generated primarily within the optoelectronic component into radiation of a different wavelength.
• the electrically insulating layer is radiation-reflecting or radiation-absorbing, and the electrically insulating layer is exposed to the optoelectronic areas
• Radiation-reflecting means in particular that the electrically insulating layer is at least 80%, preferably more than 90%, reflective for electromagnetic radiation impinging on it. For example, for an external observer, the electrically insulating layer appears white.
• radiation-reflecting particles which are formed, for example, with at least one of the materials ⁇ 1 ⁇ 2, BaSOzi, or Al x Oy or contain one of the materials mentioned, are introduced into the electrically insulating layer. For example are the radiation-reflecting particles in one
• Optoelectronic component facing away from the outer surface of the conversion layer is neither covered by the electrically insulating layer, nor the conversion layer in
• Material residues of the electrically insulating layer may be located on the outer surface of the conversion layer, which cover the outer surface, however, at most 10%, preferably at most 5%.
• the conversion layer is in the region above the contact surface
• the opening extends continuously and contiguously through both in the vertical direction
• the Conversion layer and by the electrically insulating material are completely through the Conversion layer and the electrically insulating material formed.
• the conversion layer terminates flush with the electrically insulating layer in a vertical direction. That is, neither a gap nor an interruption is formed between the conversion layer and the electrically insulating layer in the lateral direction.
• the conversion layer and the electrically insulating layer together form a continuous and continuous plane.
• the conversion element is visible from the outside and appears, for example, colored for an external viewer.
• At least one electronic component is arranged at the top side of the carrier on the carrier in the lateral direction at a distance from the optoelectronic component, after the arrangement of the electronic component on the carrier
• the electrically insulating layer is applied.
• the electronic component is contacted in the same way as the optoelectronic component. That is, the electronic component is then also contacted via an opening formed in the electrically insulating material and / or the electrically insulating layer, in which at least in places an electrically conductive material is arranged.
• this contains or is
• the electronic component a protection circuit against electrostatic damage (also ESD protection circuit).
• the electronic component is completely and positively covered by the electrically insulating material, with the exception of a possible contact opening. If, likewise, the electrically insulating material is positively covered by the electrically insulating layer, for example the electronic component for an external observer can be completely covered and / or covered by the electrically insulating layer.
• the optoelectronic device for example, the optoelectronic
• this comprises
• Optoelectronic semiconductor device has a carrier which has an upper side, an underside of the upper side of the carrier opposite, as well as at least one arranged on the upper surface pad.
• this comprises
• Optoelectronic semiconductor device at least one arranged on the upper side of the carrier optoelectronic
• Component which faces away from the carrier at least one
• the optoelectronic semiconductor component comprises an electrical
• the electrically insulating material is free of foreign particles of a filler.
• this comprises
• Optoelectronic semiconductor device an electrically insulating layer, which in the lateral direction directly adjacent to the electrically insulating material, wherein the
• electrically insulating layer comprises foreign particles of the filler of a predeterminable concentration.
• this comprises
• Material opening in the lateral direction bounded by at least one side surface of the material opening.
• the side surface may be completely formed by the electrically insulating layer.
• the contact surface in the region of the material opening is at least locally free of the electrically insulating material. This means that the contact surface and the material opening in the vertical direction at least partially overlap with each other.
• At least one conversion layer is on one of the optoelectronic component applied remote outer surface of the electrically insulating material, wherein the electrically insulating layer
• the electrically insulating layer completely surrounds both the conversion layer and the optoelectronic component in the lateral direction.
• the electrically insulating layer covers side surfaces of the conversion layer and exposed portions of the
• Optoelectronic device and the carrier completely and positively.
• this comprises an electrical
• Carrier side facing away from the electrically insulating layer and at least in places in the openings is arranged and connects the contact surface with the pad electrically conductively.
• FIGS. 1A to 5C show individual production steps for
• FIG. 6 shows a schematic side view
• Figure 1A shows steps a) and b) of one here
• the carrier 1 is formed with a ceramic material. Electrical conductor tracks 121 and 123 of the carrier 1 form in places the surfaces on the upper side 12 and the lower side 11 of the carrier 1. On one of the underside 11 of the carrier 1 facing away from the outer surface of the conductor 121 is initially an electrical
• Contact layer 122 is an optoelectronic component 2 applied.
• the optoelectronic component 2 has a contact surface 22 facing away from the carrier 1.
• Optoelectronic component 2 may be a
• Component 9 has a contact surface 91 facing away from the carrier 1.
• both the electronic component 9 and the optoelectronic component 2 can be electrically contacted by means of a via via the electrical conductor 123.
• a plated through hole extends from the upper side 12 of the carrier 1 in the direction of the underside 11 of the carrier
• FIG. 1B shows the carrier 1 and the electronic component 9 along a lateral direction L2.
• Directions LI and L2 span an imaginary plane which is parallel to a main extension plane of the carrier 1.
• the lateral directions LI and L2 run perpendicular to each other within the plane.
• FIG. 1B shows that on the side facing away from the carrier 1
• connection surface 13 is applied, wherein in vertical
• FIG. 2A shows, in a next step c), the carrier 1, again along the lateral direction L2, in which all exposed points of the connection surface 13, the
• radiation-transparent, electrically insulating material 3 is applied.
• the application can be done by dispensing, jetting or potting.
• the electrically insulating material 3 is free of foreign particles 42 of a filler 41.
• the electrically insulating material 3 is formed with a silicone.
• the carrier 1 is along the lateral one
• FIG. 3A shows that, in a next step, an outer surface 32 of the electrically insulating material 3 facing away from the optoelectronic component 2 has a
• Step d) an electrically insulating layer 4 is completely applied to all exposed areas of the electrically insulating material 3, the optoelectronic component 2 as well as to a surface on the upper side 12 of the carrier 1.
• the electrically insulating layer 4 covers said locations in a form-fitting manner.
• Insulating layer has foreign particles 42 of filler 41 on.
• the electrically insulating layer is formed with a matrix material, such as, for example, a silicone, an epoxide or a mixture of silicone and epoxy, into which the filler 41 is introduced in a predeterminable concentration.
• a matrix material such as, for example, a silicone, an epoxide or a mixture of silicone and epoxy
• the filler 41 is a radiation-reflecting material, wherein the
• Foreign particles 42 are radiation-reflecting particles, which may be formed in particular with T1O2. With others,
• Optoelectronic component 2 facing away from outer surface 62 of the conversion layer 6 free from the electrically insulating layer 4th
• FIG. 4B shows a composite, shown in FIG. 4A, consisting of the carrier 1, the optoelectronic component 2, the electronic component 9 and also the electric one
• connection surface 13 is completely positively covered by the electrically insulating material 3, whereby also in this case all exposed parts of the electrically insulating material 3 are positively covered by the electrically insulating layer 4.
• FIG. 5A shows further steps e) and f), in which first in the vertical direction V both above the Contact surface 22 of the optoelectronic component 2 as well as over the contact surface 91 of the electronic component 9, the electrically insulating material 3 and the electrically insulating layer 4 are removed. Through the openings 5, the contact surfaces 22 and 91 at least in places free from the electrically insulating layer 4 and the electrically insulating material 3. In the next step f) is electrically conductive material 8 in the openings. 5
• the electrically conductive material 8 in places on a side facing away from the carrier 1 outer surface of the electrically
• FIG. 5B along the lateral direction L2, the optoelectronic illustrated in FIG. 5A is shown
• Semiconductor device 100 shown. It can be seen that also in the vertical direction V over the pad 13 through the electrically insulating layer 4 and the
• FIG. 5C shows the semiconductor component 100 shown in FIGS. 5A and 5B in a schematic plan view. It can be seen that the electrically conductive material 8 both the contact surface 91 of the electronic component 9 and the contact surface 22 of the Optoelectronic component 2 is electrically contacted in each case with the connection surface 13 and extends continuously in the lateral direction L2 between the connection surface 13 and the two contact surfaces 22 and 91.
• FIG. 6 in a lateral sectional view along the lateral direction L2, the one described here is shown
• the optoelectronic semiconductor component 100 has the carrier 1 with the upper side 12 and the underside 11 opposite the upper side 12. Furthermore, the optoelectronic semiconductor component 100 has the connection surface 13 arranged on the upper side 12. On the side facing away from the carrier 1 outer surface of
• the contact layer 122 is applied.
• the optoelectronic component 2 is applied.
• the optoelectronic component 2 has a contact surface 22 facing away from the carrier 1.
• the electrically insulating material 3 is applied and covers the
• Component 2 facing away from outer surface 32 of the electric
• the conversion layer 6 is applied.
• the contact surface 22 of the electrically insulating material 3 is at least partially exposed. Further, in vertical
• a layer opening 52 is introduced into the conversion layer 6, in the vertical Direction V is coincident with the material opening 51.
• a continuous and continuous opening 5 is formed.
• the electrically conductive material is 3.
• the electrically insulating layer 4 is radiation-reflecting or

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• 2010
  • 2010-09-07 DE DE102010044560A patent/DE102010044560A1/de not_active Withdrawn
• 2011
  • 2011-08-29 JP JP2013527542A patent/JP5639271B2/ja not_active Expired - Fee Related
  • 2011-08-29 EP EP11754342.1A patent/EP2614538A1/de not_active Withdrawn
  • 2011-08-29 CN CN201180043207.1A patent/CN103098248B/zh not_active Expired - Fee Related
  • 2011-08-29 WO PCT/EP2011/064836 patent/WO2012031932A1/de active Application Filing
  • 2011-08-29 US US13/820,773 patent/US9224931B2/en not_active Expired - Fee Related
  • 2011-08-29 KR KR1020137008785A patent/KR101457827B1/ko active IP Right Grant

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