EP2008287B1 - Electrical ptc thermistor component, and method for the production thereof - Google Patents
Electrical ptc thermistor component, and method for the production thereof Download PDFInfo
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- EP2008287B1 EP2008287B1 EP07722254.5A EP07722254A EP2008287B1 EP 2008287 B1 EP2008287 B1 EP 2008287B1 EP 07722254 A EP07722254 A EP 07722254A EP 2008287 B1 EP2008287 B1 EP 2008287B1
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- 238000000034 method Methods 0.000 title claims description 20
- 238000004519 manufacturing process Methods 0.000 title claims description 6
- 230000004888 barrier function Effects 0.000 claims description 18
- 239000000758 substrate Substances 0.000 claims description 14
- 238000007598 dipping method Methods 0.000 claims description 12
- 238000004544 sputter deposition Methods 0.000 claims description 6
- 239000000919 ceramic Substances 0.000 claims description 5
- 239000000463 material Substances 0.000 claims description 5
- 229910010293 ceramic material Inorganic materials 0.000 claims description 3
- 230000002093 peripheral effect Effects 0.000 claims 5
- 238000005299 abrasion Methods 0.000 claims 1
- 239000010410 layer Substances 0.000 description 74
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 14
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 6
- 229910052759 nickel Inorganic materials 0.000 description 6
- 229910052709 silver Inorganic materials 0.000 description 6
- 239000004332 silver Substances 0.000 description 6
- 239000011651 chromium Substances 0.000 description 4
- 238000007747 plating Methods 0.000 description 3
- 238000007650 screen-printing Methods 0.000 description 3
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- 239000012190 activator Substances 0.000 description 2
- 229910052804 chromium Inorganic materials 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 239000000843 powder Substances 0.000 description 2
- 238000005201 scrubbing Methods 0.000 description 2
- 238000005245 sintering Methods 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- 229920001817 Agar Polymers 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 239000012790 adhesive layer Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000007717 exclusion Effects 0.000 description 1
- 238000010304 firing Methods 0.000 description 1
- 238000007654 immersion Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
- H01C7/02—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material having positive temperature coefficient
- H01C7/022—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material having positive temperature coefficient mainly consisting of non-metallic substances
- H01C7/023—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material having positive temperature coefficient mainly consisting of non-metallic substances containing oxides or oxidic compounds, e.g. ferrites
- H01C7/025—Perovskites, e.g. titanates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C1/00—Details
- H01C1/14—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors
- H01C1/1406—Terminals or electrodes formed on resistive elements having positive temperature coefficient
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C1/00—Details
- H01C1/14—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors
- H01C1/148—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors the terminals embracing or surrounding the resistive element
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/28—Apparatus or processes specially adapted for manufacturing resistors adapted for applying terminals
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49082—Resistor making
- Y10T29/49085—Thermally variable
Definitions
- Ceramic components and methods for their preparation are for. B. from the publications DE 4029681 A1 . DE 10218154 A1 . DE 4207915 A1 . DE 100 53 769 A1 and JP 01 128 501 A known.
- An object to be solved is to specify a PTC thermistor component which has particularly low tolerance errors with regard to electrical properties. Another object to be solved is to provide a method for producing such a device.
- the component comprises a first and a second conductive layer, which are preferably arranged on an end face of the base body.
- the lateral surface of the main body is free of the first conductive layer.
- the second conductive layer forms a cap which covers the front side of the base body across edges, this layer lying partially on the lateral surface of the base body.
- a first and a second conductive layer are provided on each end face.
- the component preferably has a mirror symmetry.
- the first conductive layer is limited to the respective end face of the base body.
- the first conductive layer is not edge-spanning unlike the second conductive layer.
- the first layer contacts the main body.
- An end-side region of the second conductive layer is arranged on the first conductive layer, and a further region of the second conductive layer contacts the lateral surface of the main body.
- the first conductive layer is preferably a barrier-degrading barrier layer.
- the second conductive layer unlike the first conductive layer, is not provided as a barrier layer, but as a solder for z. B. provided with a circuit board, suitable for surface mounting electrical connection of the device.
- the component is therefore preferably surface mountable.
- the base body is preferably rectangular in cross-section, or its lateral surface has at least one flat side surface.
- Both first and second conductive layers may comprise multiple sublayers of different materials.
- the sub-layer of the respective conductive layer facing the base body is preferably an adhesion-promoting layer.
- the first conductive layer according to the invention comprises several sub-layers of different materials on z.
- the second conductive layer may, for. B. have a silver-containing lower sub-layer, a nickel-containing middle sub-layer and a solderable, especially tin-containing upper sub-layer.
- the lower silver layer can be activated with a Pd activator before nickel plating.
- the lowermost sub-layer of the first conductive layer is preferably sputtered on and possibly galvanically reinforced.
- Further partial layers of the first conductive layer may, for. B. be applied chemically or electroplated.
- the partial layers of the first conductive layer can also be produced in each case by screen printing with subsequent baking.
- the second conductive layer preferably comprises at least one applied by a dipping process layer, for. B. on a silver-containing layer. This is preferably the lowest layer of the second conductive layer. As mentioned above, at least one further layer can be applied to the lowermost layer, which can also be produced chemically or galvanically in a dipping process by screen printing.
- the large-area substrate is preferably produced by pressing a ceramic-containing material with predetermined properties and subsequent sintering.
- 50% of the ceramic material ML151 and 50% of the ceramic material ML251 dry or wet homogenized the mixture is preferably pressed on a uniaxial dry press and sintered.
- the substrate is lapped in a variant, preferably after sintering, preferably to a prescribed thickness, kept in a solution containing sulfuric acid for a predetermined period of time to improve the adhesion of the sputtered layer, and then washed.
- the main surfaces of the substrate are metallized.
- a preferably chromium-containing layer is first applied by sputtering.
- the Cr layer may, for. B. be produced in a thickness of 0.1 to 1.0 microns.
- a nickel-containing layer z. B. preferably applied with a thickness of 0.1 to 1.0 microns by sputtering and galvanically or chemically reinforced to a thickness that preferably exceeds 1 micron and z. B. 2 to 10 microns.
- the substrate is preferably sawn to form isolated device regions.
- edges between end faces and lateral surface of the body are rounded or at least flattened by scrubbing with the addition of water and SiC powder.
- the conductive caps are applied in a dipping process, wherein each base body is immersed in a metal-containing, preferably silver-containing paste, which preferably after immersion under air atmosphere and at a temperature by Max. 900 ° C is baked.
- the metal layer produced in this case is preferably to produce a uniform layer thickness z.
- the conductive caps are activated after polishing preferably in the order given with Pd activator, nickel-plated and tin-plated.
- the nickel plating is preferably carried out chemically, d. H. de-energized.
- the tinning is preferably carried out galvanically. In principle, the Pd activation can be dispensed with if the nickel plating is carried out galvanically.
- the barrier layer is already produced before and not after the separation of the component regions in a dipping process has the advantage that the geometric dimensions determining the electrical properties of the component and thus also the manufacturing tolerances with regard to the electrical properties of the components can be kept low , although the conductive caps are directly on the body, but they have essentially no effect on the electrical resistance of the device.
- FIG. 1 shows a large-area substrate 10 with a coated on its two major surfaces barrier layer 21, 22.
- the substrate 10 has not yet isolated device areas 101 - 106 on. With dashed lines sawing lines, ie boundaries between different component areas are indicated.
- Each component region comprises a main body 1 and barrier layers 21, 22 arranged on its end faces.
- the large-area substrate 10 is formed as a rod which is sawn perpendicular to its longitudinal direction.
- the large-area substrate 10 can also have component regions arranged as a two-dimensional matrix. It is sawed in transverse directions.
- FIGS. 2 and 3 For example, a discrete device region 101 is shown before or after scrubbing.
- the immersed component area with silver-containing caps 31, 32, which cover its frontal ends across edges, is in FIG. 4 shown.
- To the front side facing edge portions of the side surfaces of the body are covered by the caps 31, 32nd
- the barrier layer 21, 22 has a lower partial layer 211, 221 (eg Cr layer) applied by sputtering and possibly galvanically reinforced, if appropriate a chemically applied middle partial layer (eg Ni layer not shown in the figure) ) and an electrodeposited upper sub-layer 212, 222 (eg, Ni layer).
- a lower partial layer 211, 221 eg Cr layer
- a middle partial layer eg Ni layer not shown in the figure
- electrodeposited upper sub-layer 212, 222 eg, Ni layer
- a tin-containing solderable layer 41, 42 is arranged on the silver-containing cap 31, 32 produced by dipping.
- the downwardly facing portions of the caps 31, 32 form surface mounting suitable contacts of the device (SMD contacts).
- the specified component and method is not limited to the embodiments shown in the figures and in particular the illustrated shape of the base body and number and material of partial layers. All layers applied by sputtering can also be produced in a dipping process or a screen printing process followed by firing.
Description
Keramische Bauelemente sowie Verfahren zu deren Herstellung sind z. B. aus den Druckschriften
Eine zu lösende Aufgabe besteht darin, ein Kaltleiter-Bauelement anzugeben, das bezüglich elektrischer Eigenschaften besonders geringe Toleranzfehler aufweist. Eine weitere zu lösende Aufgabe besteht darin, ein Verfahren zur Herstellung eines solchen Bauelements anzugeben.An object to be solved is to specify a PTC thermistor component which has particularly low tolerance errors with regard to electrical properties. Another object to be solved is to provide a method for producing such a device.
Die Erfindung wird durch die Merkmale der unabhängigen Ansprüche definiert.The invention is defined by the features of the independent claims.
Es wird ein elektrisches Kaltleiter-Bauelement mit einem Grundkörper z. B. aus PTC-Keramik angegeben. PTC steht für Positive Temperature Coefficient. Das Bauelement umfasst eine erste und eine zweite leitfähige Schicht, die vorzugsweise auf einer Stirnseite des Grundkörpers angeordnet sind. Die Mantelfläche des Grundkörpers ist frei von der ersten leitfähigen Schicht. Die zweite leitfähige Schicht bildet eine Kappe, die die Stirnseite des Grundkörpers kantenübergreifend bedeckt, wobei diese Schicht teilweise auf der Mantelfläche des Grundkörpers liegt.It is an electrical PTC device with a base z. B. from PTC ceramic specified. PTC stands for Positive Temperature Coefficient. The component comprises a first and a second conductive layer, which are preferably arranged on an end face of the base body. The lateral surface of the main body is free of the first conductive layer. The second conductive layer forms a cap which covers the front side of the base body across edges, this layer lying partially on the lateral surface of the base body.
In einer bevorzugten Variante sind auf jeder Stirnseite jeweils eine erste und eine zweite leitfähige Schicht vorgesehen. Das Bauelement weist vorzugsweise eine Spiegelsymmetrie auf.In a preferred variant, in each case a first and a second conductive layer are provided on each end face. The component preferably has a mirror symmetry.
Die erste leitfähige Schicht ist auf die jeweilige Stirnseite des Grundkörpers beschränkt. Die erste leitfähige Schicht ist im Gegensatz zu der zweiten leitfähigen Schicht nicht kantenübergreifend. Die erste Schicht kontaktiert den Grundkörper. Ein stirnseitiger Bereich der zweiten leitfähigen Schicht ist auf der ersten leitfähigen Schicht angeordnet und ein weiterer Bereich der zweiten leitfähigen Schicht kontaktiert die Mantelfläche des Grundkörpers.The first conductive layer is limited to the respective end face of the base body. The first conductive layer is not edge-spanning unlike the second conductive layer. The first layer contacts the main body. An end-side region of the second conductive layer is arranged on the first conductive layer, and a further region of the second conductive layer contacts the lateral surface of the main body.
Die erste leitfähige Schicht ist vorzugsweise eine Sperrschicht abbauende Barriereschicht. Die zweite leitfähige Schicht ist im Gegensatz zur ersten leitfähigen Schicht nicht als eine Barriereschicht vorgesehen, sondern als ein zum Verlöten z. B. mit einer Leiterplatte vorgesehener, zur Oberflächenmontage geeigneter elektrischer Anschluss des Bauelements.The first conductive layer is preferably a barrier-degrading barrier layer. The second conductive layer, unlike the first conductive layer, is not provided as a barrier layer, but as a solder for z. B. provided with a circuit board, suitable for surface mounting electrical connection of the device.
Das Bauelement ist also vorzugsweise oberflächenmontierbar. Der Grundkörper ist dabei vorzugsweise im Querschnitt rechteckig, oder seine Mantelfläche weist zumindest eine ebene Seitenfläche auf.The component is therefore preferably surface mountable. The base body is preferably rectangular in cross-section, or its lateral surface has at least one flat side surface.
Sowohl erste als auch zweite leitfähige Schicht kann mehrere Teilschichten aus verschiedenen Materialien aufweisen. Die untere, d. h. zum Grundkörper gewandte Teilschicht der jeweiligen leitfähigen Schicht ist vorzugsweise eine haftungsvermittelnde Schicht. Die erste leitfähige Schicht weist erfindungsgemäß mehrere Teilschichten aus verschiedenen Materialien auf z. B. eine chromhaltige Teilschicht als Haftschicht, auf die vorzugsweise eine nickelhaltige Teilschicht aufgetragen ist.Both first and second conductive layers may comprise multiple sublayers of different materials. The lower, d. H. The sub-layer of the respective conductive layer facing the base body is preferably an adhesion-promoting layer. The first conductive layer according to the invention comprises several sub-layers of different materials on z. B. a chromium-containing sub-layer as an adhesive layer on which preferably a nickel-containing sub-layer is applied.
Die zweite leitfähige Schicht kann z. B. eine silberhaltige untere Teilschicht, eine nickelhaltige mittlere Teilschicht und eine lötbare, insbesondere zinnhaltige obere Teilschicht aufweisen. Die untere Silberschicht kann vor der Vernickelung mit einem Pd-Aktivator aktiviert werden.The second conductive layer may, for. B. have a silver-containing lower sub-layer, a nickel-containing middle sub-layer and a solderable, especially tin-containing upper sub-layer. The lower silver layer can be activated with a Pd activator before nickel plating.
Die unterste Teilschicht der ersten leitfähigen Schicht ist vorzugsweise aufgesputtert und ggf. galvanisch verstärkt. Weitere Teilschichten der ersten leitfähigen Schicht können z. B. chemisch oder galvanisch aufgetragen werden. Die Teilschichten der ersten leitfähigen Schicht können aber auch jeweils durch Siebdruck mit anschließendem Einbrennen erzeugt werden.The lowermost sub-layer of the first conductive layer is preferably sputtered on and possibly galvanically reinforced. Further partial layers of the first conductive layer may, for. B. be applied chemically or electroplated. However, the partial layers of the first conductive layer can also be produced in each case by screen printing with subsequent baking.
Die zweite leitfähige Schicht weist vorzugsweise zumindest eine durch ein Tauchverfahren aufgetragene Schicht, z. B. eine silberhaltige Schicht auf. Dies ist vorzugsweise die unterste Schicht der zweiten leitfähigen Schicht. Auf die unterste Schicht kann wie vorstehend erwähnt mindestens eine weitere Schicht aufgetragen werden, die auch in einem Tauchverfahren, durch einen Siebdruck, chemisch oder galvanisch erzeugt werden kann.The second conductive layer preferably comprises at least one applied by a dipping process layer, for. B. on a silver-containing layer. This is preferably the lowest layer of the second conductive layer. As mentioned above, at least one further layer can be applied to the lowermost layer, which can also be produced chemically or galvanically in a dipping process by screen printing.
Ferner wird ein Verfahren zur Herstellung eines Kaltleiter-Bauelements angegeben, mit den Schritten:
- A) An Hauptflächen eines großflächigen Substrats, umfassend als Bauelementbereiche vorgesehene Bereiche, wird eine Barriereschicht (erste leitfähige Schicht) durch Sputtern aufgetragen;
- B) Das Substrat wird gemäß den Bauelementbereichen vereinzelt, wobei jeder vereinzelte Bauelementbereich einen Grundkörper umfasst, auf dessen beiden Stirnseiten die Barriereschicht angeordnet ist;
- C) An den vereinzelten Bauelementbereichen werden stirnseitig angeordnete leitfähige Kappen (zweite leitfähige Schicht) in einem Tauchverfahren erzeugt.
- A) On major surfaces of a large-area substrate comprising regions provided as device regions, a barrier layer (first conductive layer) is applied by sputtering;
- B) The substrate is singulated in accordance with the component regions, each individual component region comprising a base body on whose two end faces the barrier layer is arranged;
- C) Conductive caps (second conductive layer) arranged on the front side are produced on the separated component regions in a dipping process.
Das großflächige Substrat wird vorzugsweise durch Pressen eines keramikhaltigen Materials mit vorgegebenen Eigenschaften und anschließendes Sintern erzeugt. In einer Variante wird 50% des Keramikmaterials ML151 und 50% des Keramikmaterials ML251 trocken oder nass homogenisiert, das Gemisch vorzugsweise auf einer uniaxialen Trockenpresse gepresst und gesintert. Das Substrat wird - in einer Variante erst nach dem Sintern - vorzugsweise auf eine vorgeschriebene Dicke geläppt, in einem vorgegebenen Zeitraum in einer Schwefelsäure enthaltenden Lösung gehalten zur Verbesserung der Haftfestigkeit der Sputterschicht und danach gewaschen.The large-area substrate is preferably produced by pressing a ceramic-containing material with predetermined properties and subsequent sintering. In a variant, 50% of the ceramic material ML151 and 50% of the ceramic material ML251 dry or wet homogenized, the mixture is preferably pressed on a uniaxial dry press and sintered. The substrate is lapped in a variant, preferably after sintering, preferably to a prescribed thickness, kept in a solution containing sulfuric acid for a predetermined period of time to improve the adhesion of the sputtered layer, and then washed.
Zur Erzeugung der Barriereschicht werden die Hauptflächen des Substrats metallisiert. In einer bevorzugten Variante wird zunächst eine vorzugsweise chromhaltige Schicht durch Sputtern aufgetragen. Die Cr-Schicht kann z. B. in einer Dicke von 0,1 bis 1,0 µm erzeugt werden. Danach wird eine nickelhaltige Schicht z. B. mit einer Dicke von 0,1 bis 1,0 µm vorzugsweise auch durch Sputtern aufgetragen und galvanisch oder chemisch bis zu einer Dicke verstärkt, die vorzugsweise 1 µm übersteigt und z. B. 2 bis 10 µm beträgt. Nach der Metallisierung wird das Substrat zur Bildung von vereinzelten Bauelementbereichen vorzugsweise zersägt.To produce the barrier layer, the main surfaces of the substrate are metallized. In a preferred variant, a preferably chromium-containing layer is first applied by sputtering. The Cr layer may, for. B. be produced in a thickness of 0.1 to 1.0 microns. Thereafter, a nickel-containing layer z. B. preferably applied with a thickness of 0.1 to 1.0 microns by sputtering and galvanically or chemically reinforced to a thickness that preferably exceeds 1 micron and z. B. 2 to 10 microns. After metallization, the substrate is preferably sawn to form isolated device regions.
Vor der Auftragung von Kappen werden die Kanten zwischen Stirnseiten und Mantelfläche des Grundkörpers durch Scheuern unter Zugabe von Wasser und SiC-Pulver abgerundet oder zumindest abgeflacht.Before the application of caps, the edges between end faces and lateral surface of the body are rounded or at least flattened by scrubbing with the addition of water and SiC powder.
Die leitfähigen Kappen werden in einem Tauchverfahren aufgetragen, wobei jeder Grundkörper in eine metallhaltige, vorzugsweise silberhaltige Paste getaucht wird, die nach dem Tauchen vorzugsweise unter Luftatmosphäre und bei einer Temperatur von max. 900°C eingebrannt wird. Die dabei erzeugte Metallschicht wird zur Erzeugung einer gleichmäßigen Schichtdicke vorzugsweise z. B. auch unter Zugabe von Wasser und SiC-Pulver gescheuert und/oder poliert.The conductive caps are applied in a dipping process, wherein each base body is immersed in a metal-containing, preferably silver-containing paste, which preferably after immersion under air atmosphere and at a temperature by Max. 900 ° C is baked. The metal layer produced in this case is preferably to produce a uniform layer thickness z. B. scrubbed and / or polished with the addition of water and SiC powder.
Die leitfähigen Kappen werden nach dem Polieren vorzugsweise in der angegebenen Reihenfolge mit Pd-Aktivator aktiviert, vernickelt und verzinnt. Die Vernickelung erfolgt vorzugsweise chemisch, d. h. stromlos. Die Verzinnung erfolgt vorzugsweise galvanisch. Auf die Pd-Aktivierung kann im Prinzip verzichtet werden, wenn die Vernickelung galvanisch erfolgt.The conductive caps are activated after polishing preferably in the order given with Pd activator, nickel-plated and tin-plated. The nickel plating is preferably carried out chemically, d. H. de-energized. The tinning is preferably carried out galvanically. In principle, the Pd activation can be dispensed with if the nickel plating is carried out galvanically.
In dem beschriebenen Verfahren werden Kaltleiter-Bauelemente erzeugt, die nun gemessen, bewertet und unter Ausschluss von ausschüssigen Bauteilen gegurtet werden.In the method described PTC thermistor components are generated, which are now measured, evaluated and strapped to the exclusion of ausschüssigen components.
Dass die Barriereschicht bereits vor und nicht erst nach der Vereinzelung der Bauelementbereiche in einem Tauchverfahren erzeugt wird, hat den Vorteil, dass die - die elektrischen Eigenschaften des Bauelements bestimmenden - geometrischen Abmessungen und damit auch die Fertigungstoleranzen bezüglich der elektrischen Eigenschaften der Bauelemente gering gehalten werden können. Die leitfähigen Kappen liegen zwar direkt am Grundkörper auf, aber sie haben im Wesentlichen keinen Einfluss auf den elektrischen Widerstand des Bauelements.The fact that the barrier layer is already produced before and not after the separation of the component regions in a dipping process has the advantage that the geometric dimensions determining the electrical properties of the component and thus also the manufacturing tolerances with regard to the electrical properties of the components can be kept low , Although the conductive caps are directly on the body, but they have essentially no effect on the electrical resistance of the device.
Die Verfahrensschritte zur Herstellung des angegebenen Bauelements werden nun anhand von schematischen und nicht maßstabsgetreuen Figuren erläutert. Es zeigen:
-
ein großflächiges Substrat mit der aufgetragenen Barriereschicht und noch nicht vereinzelten Bauelementbereichen;Figur 1 -
einen vereinzelten Bauelementbereich;Figur 2 -
Figur 3 den vereinzelten Bauelementbereich mit abgerundeten Kanten vor dem Tauchverfahren; -
den vereinzelten Bauelementbereich nach dem Tauchverfahren;Figur 4 -
Figur 5 ein fertig gestelltes Bauelement.
-
FIG. 1 a large-area substrate with the applied barrier layer and not yet isolated component areas; -
FIG. 2 an isolated component area; -
FIG. 3 the isolated component area with rounded edges before the dipping process; -
FIG. 4 the isolated component area after the dipping process; -
FIG. 5 a finished component.
Jeder Bauelementbereich umfasst einen Grundkörper 1 und auf seinen Stirnseiten angeordnete Barriereschichten 21, 22.Each component region comprises a
In
In
In
Auf der durch Tauchen erzeugten silberhaltigen Kappe 31, 32 ist eine zinnhaltige lötbare Schicht 41, 42 angeordnet. Die nach unten gewandten Bereiche der Kappen 31, 32 bilden zur Oberflächenmontage geeignete Kontakte des Bauelements (SMD-Kontakte).On the silver-containing
Das angegebene Bauelement und Verfahren ist auf die in den Figuren gezeigten Ausführungen und insbesondere die dargestellte Form des Grundkörpers sowie Anzahl und Material von Teilschichten nicht beschränkt. Alle durch Sputtern aufgetragenen Schichten können auch in einem Tauchverfahren oder einem Siebdruckverfahren mit anschließendem Einbrennen erzeugt werden.The specified component and method is not limited to the embodiments shown in the figures and in particular the illustrated shape of the base body and number and material of partial layers. All layers applied by sputtering can also be produced in a dipping process or a screen printing process followed by firing.
- 11
- Grundkörperbody
- 1010
- großflächiges Keramiksubstratlarge ceramic substrate
- 21, 2221, 22
- Barriereschichtbarrier layer
- 211, 221211, 221
-
durch Sputtern aufgetragene Teilschicht der Barriereschicht 21, 22Sputtered partial layer of the
21, 22barrier layer - 212, 222212, 222
-
galvanisch aufgetragene Teilschicht der Barriereschicht 21, 22electroplated partial layer of the
21, 22barrier layer - 31, 3231, 32
- leitfähige Kappeconductive cap
- 41, 4241, 42
- lötfähige Schichtsolderable layer
Claims (11)
- Electrical PTC thermistor component- with a main body (1), which has end faces lying opposite one another and a peripheral surface,- with a first conductive layer and a second conductive layer, which are respectively arranged on an end face of the main body (1),- wherein the peripheral surface of the main body (1) is free from the first conductive layer, and- wherein the second conductive layer forms a cap (31, 32), which covers one end face of the main body (1) while reaching over the edges,- wherein the first conductive layer has a number of sub-layers of different materials.
- Component according to Claim 1,- wherein the main body (1) contains a ceramic material,- wherein the first conductive layer is a barrier layer (21, 22) breaking down a depletion layer.
- Component according to Claim 1 or 2,- wherein the second conductive layer has a solderable surface.
- Component according to one of Claims 1 to 3,
which is surface-mountable. - Component according to one of Claims 1 to 4,- wherein the first conductive layer has a sputtered-on sub-layer (211, 221) and a galvanically applied sub-layer (212, 222).
- Component according to one of Claims 1 to 5,- wherein the second conductive layer has at least one layer applied by a dipping process.
- Component according to one of Claims 1 to 6,
wherein the edges between the end faces and the peripheral surface of the main body are bevelled or rounded. - Method for producing a PTC thermistor component, comprising the steps that:A) a conductive barrier layer (21, 22) is produced by sputtering on main surfaces of a substrate (10), containing PTC ceramic and comprising regions (101 - 106) intended as component regions;B) the substrate (10) is divided up into the component regions, wherein each divided-up component region comprises a main body (1), on the two end faces of which the barrier layer (21, 22) is arranged, wherein the peripheral surfaces of the main bodies (1) are free from the barrier layer (21, 22);C) conductive caps (31, 32), arranged on the end faces, are produced on the divided-up component regions, wherein they are applied by a dipping process and subsequently burned in.
- Method according to Claim 8,
wherein the barrier layer (21, 22) is galvanically reinforced. - Method according to Claim 8 or 9,
wherein the conductive caps (31, 32) are tin-plated after the dipping process. - Method according to one of Claims 8 to 10,
wherein, before the application of caps, the edges between the end faces and the peripheral surface of the main body are rounded by abrasion.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102006017796A DE102006017796A1 (en) | 2006-04-18 | 2006-04-18 | Electric PTC thermistor component |
PCT/DE2007/000696 WO2007118472A1 (en) | 2006-04-18 | 2007-04-18 | Electrical ptc thermistor component, and method for the production thereof |
Publications (2)
Publication Number | Publication Date |
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EP2008287A1 EP2008287A1 (en) | 2008-12-31 |
EP2008287B1 true EP2008287B1 (en) | 2017-02-15 |
Family
ID=38249244
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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EP07722254.5A Active EP2008287B1 (en) | 2006-04-18 | 2007-04-18 | Electrical ptc thermistor component, and method for the production thereof |
Country Status (5)
Country | Link |
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US (1) | US8154379B2 (en) |
EP (1) | EP2008287B1 (en) |
JP (2) | JP5038395B2 (en) |
DE (1) | DE102006017796A1 (en) |
WO (1) | WO2007118472A1 (en) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101099356B1 (en) * | 2008-01-29 | 2011-12-26 | 가부시키가이샤 무라타 세이사쿠쇼 | chip-type semiconductor ceramic electronic component |
JP2013153129A (en) | 2011-09-29 | 2013-08-08 | Rohm Co Ltd | Chip resistor and electronic equipment having resistor network |
JP6134507B2 (en) | 2011-12-28 | 2017-05-24 | ローム株式会社 | Chip resistor and manufacturing method thereof |
JP6107062B2 (en) * | 2012-11-06 | 2017-04-05 | Tdk株式会社 | Chip thermistor |
JP6227877B2 (en) * | 2013-02-26 | 2017-11-08 | ローム株式会社 | Chip resistor and manufacturing method of chip resistor |
JP7268393B2 (en) * | 2019-02-22 | 2023-05-08 | 三菱マテリアル株式会社 | Thermistor manufacturing method |
DE102019122611A1 (en) * | 2019-08-22 | 2021-02-25 | Endress+Hauser SE+Co. KG | SMD-solderable component and method for producing an SMD-solderable component |
Family Cites Families (38)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1415409A1 (en) * | 1958-04-30 | 1970-12-17 | Siemens Ag | Resistance with a positive temperature coefficient of the resistance value |
DE1415406B1 (en) | 1958-04-30 | 1970-08-20 | Siemens Ag | Ceramic resistor with a high positive temperature coefficient of its total resistance value |
JPH01128501A (en) * | 1987-11-13 | 1989-05-22 | Murata Mfg Co Ltd | Chip type positive temperature coefficient thermistor |
DE3930000A1 (en) * | 1988-09-08 | 1990-03-15 | Murata Manufacturing Co | VARISTOR IN LAYER DESIGN |
GB2242066B (en) * | 1990-03-16 | 1994-04-27 | Ecco Ltd | Varistor structures |
JPH04118901A (en) * | 1990-09-10 | 1992-04-20 | Komatsu Ltd | Positive temperature coefficient thermistor and its manufacture |
DE4029681A1 (en) | 1990-09-19 | 1992-04-02 | Siemens Ag | Metal electrode face type ceramic component - has end caps in contact with outer electrode having gaps in top and bottom surfaces |
JP3169181B2 (en) * | 1990-11-22 | 2001-05-21 | 株式会社村田製作所 | Chip type positive temperature coefficient thermistor |
JP2833242B2 (en) | 1991-03-12 | 1998-12-09 | 株式会社村田製作所 | NTC thermistor element |
GB9113888D0 (en) * | 1991-06-27 | 1991-08-14 | Raychem Sa Nv | Circuit protection devices |
JPH0529115A (en) * | 1991-07-23 | 1993-02-05 | Murata Mfg Co Ltd | Manufacture of chip type semiconductor part |
JP3031025B2 (en) * | 1991-12-22 | 2000-04-10 | 株式会社村田製作所 | Manufacturing method of chip-type ceramic electronic component |
JPH05308003A (en) | 1992-03-30 | 1993-11-19 | Taiyo Yuden Co Ltd | Method of manufacturing chip type thermistor |
JPH05343201A (en) * | 1992-06-11 | 1993-12-24 | Tdk Corp | Ptc thermistor |
US5750264A (en) * | 1994-10-19 | 1998-05-12 | Matsushita Electric Industrial Co., Inc. | Electronic component and method for fabricating the same |
JPH07254534A (en) * | 1995-01-11 | 1995-10-03 | Murata Mfg Co Ltd | External electrode forming method for electronic component |
JPH08250307A (en) * | 1995-03-15 | 1996-09-27 | Murata Mfg Co Ltd | Chip thermistor |
JPH0955303A (en) * | 1995-08-11 | 1997-02-25 | Mitsui Mining & Smelting Co Ltd | Chip type thin film thermistor element and production thereof |
JPH09129417A (en) | 1995-10-30 | 1997-05-16 | Murata Mfg Co Ltd | Forming method of varistor outer electrode |
JPH09205005A (en) * | 1996-01-24 | 1997-08-05 | Matsushita Electric Ind Co Ltd | Electronic component and manufacture thereof |
JP3039403B2 (en) * | 1996-12-06 | 2000-05-08 | 株式会社村田製作所 | Multilayer ceramic capacitors |
JP3028069B2 (en) * | 1997-03-10 | 2000-04-04 | 株式会社村田製作所 | Manufacturing method of thermistor |
DE19736855A1 (en) | 1997-08-23 | 1999-02-25 | Philips Patentverwaltung | Circuit arrangement with an SMD component, in particular temperature sensor and method for producing a temperature sensor |
US6358436B2 (en) * | 1999-07-23 | 2002-03-19 | Ngk Insulators, Ltd. | Inorganic-metal composite body exhibiting reliable PTC behavior |
JP2001052901A (en) * | 1999-08-05 | 2001-02-23 | Tdk Corp | Chip organic positive temperature coefficient thermistor and manufacturing method therefor |
DE19946199B4 (en) * | 1999-09-27 | 2005-01-20 | Epcos Ag | Electrical component with variable electrical resistance |
JP2001126946A (en) | 1999-10-28 | 2001-05-11 | Murata Mfg Co Ltd | Laminated ceramic electronic component and method for manufacturing the same |
JP2001143905A (en) * | 1999-11-17 | 2001-05-25 | Murata Mfg Co Ltd | Method of manufacturing chip type thermistor |
DE10018377C1 (en) | 2000-04-13 | 2001-12-06 | Epcos Ag | Ceramic multilayered component used as a PTC resistance element comprises a stack of PTC ceramic layers with tungsten electrodes on both sides connected to a monolithic body |
DE10026260B4 (en) * | 2000-05-26 | 2004-03-25 | Epcos Ag | Ceramic component and its use and method for the galvanic generation of contact layers on a ceramic base body |
KR100476158B1 (en) * | 2000-12-11 | 2005-03-15 | 주식회사 아모텍 | Method of Fabricating Ceramic Chip Device Having Glass Coating Film |
JP2002203703A (en) * | 2000-12-27 | 2002-07-19 | Murata Mfg Co Ltd | Chip type positive temperature coefficient thermistor |
JP2003297603A (en) * | 2001-06-01 | 2003-10-17 | Murata Mfg Co Ltd | Chip-type thermistor and mounting structure thereof |
JP2003151805A (en) * | 2001-11-15 | 2003-05-23 | Murata Mfg Co Ltd | Chip element component and its manufacturing method |
JP3744439B2 (en) | 2002-02-27 | 2006-02-08 | 株式会社村田製作所 | Conductive paste and multilayer ceramic electronic components |
JP4200765B2 (en) | 2002-02-28 | 2008-12-24 | 株式会社村田製作所 | Manufacturing method of multilayer ceramic electronic component |
DE10218154A1 (en) | 2002-04-23 | 2003-11-13 | Epcos Ag | PTC component and method for its production |
JP4211510B2 (en) * | 2002-08-13 | 2009-01-21 | 株式会社村田製作所 | Manufacturing method of laminated PTC thermistor |
-
2006
- 2006-04-18 DE DE102006017796A patent/DE102006017796A1/en not_active Ceased
-
2007
- 2007-04-18 US US12/297,579 patent/US8154379B2/en active Active
- 2007-04-18 EP EP07722254.5A patent/EP2008287B1/en active Active
- 2007-04-18 WO PCT/DE2007/000696 patent/WO2007118472A1/en active Application Filing
- 2007-04-18 JP JP2009505718A patent/JP5038395B2/en active Active
-
2012
- 2012-07-05 JP JP2012151930A patent/JP5603904B2/en active Active
Non-Patent Citations (1)
Title |
---|
None * |
Also Published As
Publication number | Publication date |
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US20090167481A1 (en) | 2009-07-02 |
JP2009534814A (en) | 2009-09-24 |
JP2012212931A (en) | 2012-11-01 |
DE102006017796A1 (en) | 2007-10-25 |
EP2008287A1 (en) | 2008-12-31 |
JP5603904B2 (en) | 2014-10-08 |
US8154379B2 (en) | 2012-04-10 |
WO2007118472A1 (en) | 2007-10-25 |
JP5038395B2 (en) | 2012-10-03 |
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