JPH01128501A - Chip type positive temperature coefficient thermistor - Google Patents
Chip type positive temperature coefficient thermistorInfo
- Publication number
- JPH01128501A JPH01128501A JP28768687A JP28768687A JPH01128501A JP H01128501 A JPH01128501 A JP H01128501A JP 28768687 A JP28768687 A JP 28768687A JP 28768687 A JP28768687 A JP 28768687A JP H01128501 A JPH01128501 A JP H01128501A
- Authority
- JP
- Japan
- Prior art keywords
- element body
- solder
- electrode
- layer electrode
- chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims abstract description 38
- 229910000679 solder Inorganic materials 0.000 claims abstract description 30
- 229910052759 nickel Inorganic materials 0.000 claims abstract description 19
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 abstract description 22
- 229910052709 silver Inorganic materials 0.000 abstract description 22
- 239000004332 silver Substances 0.000 abstract description 22
- 230000005012 migration Effects 0.000 abstract description 8
- 238000013508 migration Methods 0.000 abstract description 8
- 238000010438 heat treatment Methods 0.000 abstract description 7
- 239000000843 powder Substances 0.000 abstract description 7
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 abstract description 5
- 230000003647 oxidation Effects 0.000 abstract description 3
- 238000007254 oxidation reaction Methods 0.000 abstract description 3
- 239000000919 ceramic Substances 0.000 abstract description 2
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 239000010935 stainless steel Substances 0.000 abstract description 2
- 229910001220 stainless steel Inorganic materials 0.000 abstract description 2
- 238000002386 leaching Methods 0.000 abstract 1
- 230000008018 melting Effects 0.000 abstract 1
- 238000002844 melting Methods 0.000 abstract 1
- 238000005488 sandblasting Methods 0.000 abstract 1
- 239000000463 material Substances 0.000 description 5
- 230000003628 erosive effect Effects 0.000 description 4
- OKKJLVBELUTLKV-UHFFFAOYSA-N Methanol Chemical compound OC OKKJLVBELUTLKV-UHFFFAOYSA-N 0.000 description 3
- 150000001805 chlorine compounds Chemical class 0.000 description 3
- 230000004907 flux Effects 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 150000003568 thioethers Chemical class 0.000 description 3
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- MCMNRKCIXSYSNV-UHFFFAOYSA-N Zirconium dioxide Chemical compound O=[Zr]=O MCMNRKCIXSYSNV-UHFFFAOYSA-N 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- RSWGJHLUYNHPMX-UHFFFAOYSA-N Abietic-Saeure Natural products C12CCC(C(C)C)=CC2=CCC2C1(C)CCCC2(C)C(O)=O RSWGJHLUYNHPMX-UHFFFAOYSA-N 0.000 description 1
- 229910001316 Ag alloy Inorganic materials 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 241001272720 Medialuna californiensis Species 0.000 description 1
- KHPCPRHQVVSZAH-HUOMCSJISA-N Rosin Natural products O(C/C=C/c1ccccc1)[C@H]1[C@H](O)[C@@H](O)[C@@H](O)[C@@H](CO)O1 KHPCPRHQVVSZAH-HUOMCSJISA-N 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000008653 root damage Effects 0.000 description 1
- KHPCPRHQVVSZAH-UHFFFAOYSA-N trans-cinnamyl beta-D-glucopyranoside Natural products OC1C(O)C(O)C(CO)OC1OCC=CC1=CC=CC=C1 KHPCPRHQVVSZAH-UHFFFAOYSA-N 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C1/00—Details
- H01C1/14—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors
- H01C1/1406—Terminals or electrodes formed on resistive elements having positive temperature coefficient
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Thermistors And Varistors (AREA)
Abstract
Description
【発明の詳細な説明】 （産業上の利用分野） 本発明は、チップ型正特性サーミスタに関する。[Detailed description of the invention] (Industrial application field) The present invention relates to a chip type positive temperature coefficient thermistor.
（従来の技術）
この種のチップ型正特性サーミスタとしては、第７図（
ａ）（ｂ）（ｃ）の各横断面図に示すようなものがある
。第７図（ａ）のものは、素体２の両側部のそれぞれに
銀（Ａｇ）とガリウム（Ｇａ）との合金からなる下層側
の電極４と銀からなる上層側の電極６との２層構造の電
極８を形成されてなるチップ型正特性サーミスタである
。第７図（ｂ）および（Ｃ）のものは、素体２の両側部
のそれぞれにニッケルからなる下層側電極１０と銀から
なる上層側電極１２との２層構造の電極１４を形成され
てなるチップ型正特性サーミスタである。この場合、第
７図（ｂ）のものは、その下層側電極ｌＯが素体２の両
端面１６にのみ形成され、上層側電極１２が素体２の両
端面１６にある下層側電極１０の上に形成されるととも
にその側周面１８にまで延びて形成されており、第７図
（Ｃ）のものは、下層側電極ｌＯと上層側電極１２とが
それぞれ素体２の両端面１６からその側周面１８にまで
延びて形成されるとともに、下層側電極！０の方が上層
側電極１２よりもその側周面Ｉ８に対して長く延びて形
成されている。(Prior art) This type of chip type positive temperature coefficient thermistor is shown in Fig. 7 (
There are some types as shown in the cross-sectional views a), (b), and (c). The one shown in FIG. 7(a) has two electrodes 4 on the lower layer side made of an alloy of silver (Ag) and gallium (Ga) and an upper layer side electrode 6 made of silver on each side of the element body 2. This is a chip type positive temperature coefficient thermistor formed with an electrode 8 having a layered structure. In the case of FIGS. 7(b) and (C), electrodes 14 having a two-layer structure including a lower layer electrode 10 made of nickel and an upper layer electrode 12 made of silver are formed on each side of the element body 2. This is a chip type positive temperature coefficient thermistor. In this case, in the case shown in FIG. 7(b), the lower layer electrode lO is formed only on both end surfaces 16 of the element body 2, and the upper layer electrode 12 is formed on the lower layer side electrode 10 on both end surfaces 16 of the element body 2. In the case shown in FIG. 7(C), the lower layer electrode 10 and the upper layer electrode 12 are formed on both end surfaces 16 of the element body 2. It is formed to extend to the side peripheral surface 18, and the lower layer side electrode! 0 is formed to extend longer than the upper layer side electrode 12 with respect to the side circumferential surface I8.
このような各従来例のチップ型正特性サーミスタにあっ
ては、下層側電極４、ｌＯと素体２とのオーミック接触
を得るためにその下層側電極４゜１０をオーミック性を
有するニッケルなどで措成しているが、半田付き性に劣
るので、半田付き性を良くするためにその下層側電極４
．１０の上に銀を主成分とした上層側電極６，１２を設
けた２層構造にしていた。In each of these conventional chip-type positive temperature coefficient thermistors, the lower electrode 4° 10 is made of nickel or the like having ohmic properties in order to obtain ohmic contact between the lower electrode 4 and the element body 2. However, the solderability is poor, so in order to improve the solderability, the lower electrode 4
．． It had a two-layer structure in which upper electrodes 6 and 12 mainly made of silver were provided on top of the electrode 10.
（発明が解決しようとする問題点）
ところで、このようなチップ型正特性サーミスタでは、
次・に述べるような問題点があった。(Problems to be solved by the invention) By the way, in such a chip type positive temperature coefficient thermistor,
There were problems as described below.
第１には、表面に露出する上層側電極６．１２の材料で
ある銀が周囲の環境の影響を受は易く酸化物、塩化物、
硫化物等を形成して半田付き性が悪化してそれを回路基
板に半田付は実装することがむつかしくなるという問題
がある。First, silver, which is the material of the upper layer electrode 6.12 exposed on the surface, is easily affected by the surrounding environment and contains oxides, chlorides, etc.
There is a problem in that sulfides and the like are formed and the solderability deteriorates, making it difficult to solder and mount it on a circuit board.
第２に、上層側電極６．１２の表面が清浄であれば半田
付き性が悪化することはないが、それを回路基板に半田
付は実装するときに上層側電極６゜１２を構成する銀が
溶融半田中に拡散するという、いわゆる半田食われが発
生するとい−う問題がある。Second, if the surface of the upper electrode 6.12 is clean, the solderability will not deteriorate; There is a problem in that so-called solder erosion occurs, in which solder particles diffuse into the molten solder.
第３に第７図（ａ）とか第７図（ｂ）のようなものでは
、素体２の両側部において互いに対向する雨上層側１！
極６，１２の銀が高湿の雰囲気中で直流電圧を印加され
続けた場合では、いわゆる銀マイグレーションを呈して
しまって最悪の場合では山上層側電極６．１２どうしが
電気的に短絡してしまうという問題がある。Thirdly, in the case shown in FIGS. 7(a) and 7(b), the rain upper layer sides 1! which face each other on both sides of the element body 2!
If a DC voltage is continuously applied to the silver electrodes 6 and 12 in a high-humidity atmosphere, so-called silver migration will occur, and in the worst case, the upper layer side electrodes 6 and 12 will be electrically shorted. There is a problem with putting it away.
第４に上層側電極６．１２の材料に銀を使用しているが
、銀のコストが高くつくという問題がある。Fourthly, although silver is used as the material for the upper electrode 6.12, there is a problem in that the cost of silver is high.
本発明は、上記各問題点に鑑みてなされたものであって
、下層側電極の材料として従来通りニッケルを用いるが
、表面に露出する上層側電極の材料としては銀の代わり
に半田を用いることで、周囲の環境により半田付き性が
悪化したり、根負われが生じたり、銀マイグレーション
を呈したり、コスト的に不利になったりしないようなチ
ップ型正特性サーミスタを提供することを目的としてい
る。The present invention has been made in view of the above-mentioned problems, and uses nickel as the material of the lower layer electrode as before, but uses solder instead of silver as the material of the upper layer electrode exposed on the surface. The purpose of the present invention is to provide a chip type positive temperature coefficient thermistor that does not deteriorate solderability, suffer from root damage, exhibit silver migration, or be disadvantageous in terms of cost due to the surrounding environment. .
（問題点を解決するための手段）
本発明は前記目的を達成するために、素体の両側部のそ
れぞれに設けられる電極を、ニッケルの下層側電極と半
田の上層側電極との少なくとも２層構造にしたことを特
徴としている。(Means for Solving the Problems) In order to achieve the above object, the present invention provides electrodes provided on both sides of the element body with at least two layers of a lower layer electrode of nickel and an upper layer electrode of solder. It is characterized by its structure.
（作用）
下層側電極をニッケルで構成しているから、素体との間
のオーミック接触を得ることができる一方、上層側電極
を半１月で構成しているから、銀のようにその表面に酸
化物、塩化物、硫化物が形成され易いとうことがなくな
るとともに、銀のような半田食われも、銀マイグレーシ
ョンも生じることがなく、かつ、半田であるからコスト
的に有利である。(Function) Since the lower layer electrode is made of nickel, it is possible to obtain ohmic contact with the element body, while since the upper layer electrode is made of half-moon, its surface is similar to that of silver. This eliminates the tendency for oxides, chlorides, and sulfides to be formed on the metal, and also prevents solder erosion and silver migration unlike silver, and since it is solder, it is advantageous in terms of cost.
（実施例）
以下、本発明の実施例を図面を参照して詳細に説明する
。第１図は本発明の実施例に係るチップ型正特性サーミ
スタの横断面図である。２０は素体である。この素体２
０の両側部のそれぞれには、その両端面２１から側周面
２３にまで延びて形成された、２層構造の電極２２が形
成されている。(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings. FIG. 1 is a cross-sectional view of a chip type positive temperature coefficient thermistor according to an embodiment of the present invention. 20 is an elemental body. This body 2
A two-layer structure electrode 22 is formed on each side of the electrode 0, extending from both end surfaces 21 to the side circumferential surface 23.
この電極２２は素体２０側の下層側電極２４と、表面側
の上層側電極２６とで構成されている。下層側電極２４
はニッケルで構成され、上層側電極２６は半田で構成さ
れている。This electrode 22 is composed of a lower layer electrode 24 on the side of the element body 20 and an upper layer side electrode 26 on the front side. Lower layer side electrode 24
is made of nickel, and the upper layer side electrode 26 is made of solder.
このような構成を有する本発明のチップ型正特性サーミ
スタの製造要領について第２図〜第５図を参照して説明
する。まず、第２図の一部破断斜視図に示すように、磁
器半導体の長手角板状の素体２８の全面に下層側電極と
なるニッケル膜３０を形成する。ニッケル膜を形成した
素体２８を第３図に示すように、ステンレス製の容器３
２の中に収納し、この容器３２内にアルミナ粒粉３４を
入れ、そのアルミナ粒粉３４中にその素体２８が埋まる
ようにする。The manufacturing procedure of the chip-type positive temperature coefficient thermistor of the present invention having such a configuration will be explained with reference to FIGS. 2 to 5. First, as shown in the partially cutaway perspective view of FIG. 2, a nickel film 30, which will become a lower layer electrode, is formed on the entire surface of a longitudinal rectangular plate-shaped element body 28 of the ceramic semiconductor. As shown in FIG. 3, the element body 28 on which the nickel film has been formed is placed in a stainless steel container 3.
Alumina powder 34 is placed in this container 32 so that the element body 28 is buried in the alumina powder 34.
この状態で素体２８の全面を覆っているニッケル膜３０
がオーミック性を有するように３００°Ｃ〜５００℃の
高温の熱処理を施す。この場合、その熱処理温度が３０
０℃以下であると、オーミック性接触が不十分となり、
また５００℃以上であれば、ニッケル膜３０の酸化が進
行して後工程での半田付き性が悪化する。また、アルミ
ナ粒粉３４を用いないで直接、その素体２８が空気に触
れる状態で高温熱処理した場合では、ニッケル膜３０表
面の酸化が進行して上記と同様に後工程での半田付き性
が悪化する。この場合、アルミナ粒粉３４の代わりにジ
ルコニア粒粉のように化学的作用が無いか、あるいは化
学的作用の小さな粒粉を用いてもよい。The nickel film 30 covering the entire surface of the element body 28 in this state
Heat treatment is performed at a high temperature of 300° C. to 500° C. so that the material has ohmic properties. In this case, the heat treatment temperature is 30
If the temperature is below 0°C, ohmic contact will be insufficient,
Further, if the temperature is 500° C. or higher, oxidation of the nickel film 30 progresses, resulting in poor solderability in subsequent steps. In addition, if the alumina powder 34 is not used and the element body 28 is directly exposed to air and subjected to high-temperature heat treatment, the oxidation of the surface of the nickel film 30 progresses, resulting in poor solderability in the post-process as described above. Getting worse. In this case, instead of the alumina powder 34, a powder having no chemical action or a small chemical action, such as zirconia powder, may be used.
上記熱処理の後は、その素体２８を容器３２から引き上
げ、次いで、第４図に示すように、常体２８の両面の中
央部のニッケル膜３０をサンドブラスト法等によりその
長手方向に沿って一部除去する。ニッケル膜３０を除去
された箇所は、素体２８面が露出している。After the heat treatment, the element body 28 is pulled up from the container 32, and then, as shown in FIG. remove part. At the locations where the nickel film 30 has been removed, the surface of the element body 28 is exposed.
このようにして、ニッケル膜３０を一部除去された素体
２８を、第５図に示すように、切断線３６に沿ってチッ
プ形状に切断する。この切断により多数のチップ切断片
３８・・・が得られる。そして、各チップ切断片３８・
・・を２５０℃の高温で溶融状態にある半田中に浸漬さ
せて、そのニッケル膜３０部分に上層側電極を構成する
半田を被覆させる。The element body 28 from which the nickel film 30 has been partially removed is cut into chip shapes along cutting lines 36, as shown in FIG. By this cutting, a large number of chip cut pieces 38... are obtained. Then, each chip cut piece 38.
... is immersed in solder in a molten state at a high temperature of 250° C., and the nickel film 30 portion is coated with the solder constituting the upper layer electrode.
この場合の半田のフラックスとしてはガンマラックスＳ
を用いている。このようにして、ニッケル膜３０に半田
を被覆した素体２８をトリクレンで洗浄し、次いで湯洗
いする。In this case, the solder flux is Gammalux S
is used. In this way, the element body 28, in which the nickel film 30 is coated with solder, is cleaned with Triclean and then with hot water.
なお、上記工程においては、第４図のような素体２８を
チップ形状に切断した後で、半田被覆させたが、その切
断前に半田被覆させてからチップ形状に切断してもよい
。In the above process, the element body 28 as shown in FIG. 4 was cut into chip shapes and then coated with solder, but the element body 28 may be coated with solder before cutting and then cut into chip shapes.
上記各工程により、第１図に示されるような本発明のチ
ップ型正特性サーミスタが得られる。Through each of the above steps, a chip type positive temperature coefficient thermistor of the present invention as shown in FIG. 1 is obtained.
次に、第１図における本発明品と第７図における従来品
との比較試験について以下、説明する。Next, a comparison test between the product of the present invention shown in FIG. 1 and the conventional product shown in FIG. 7 will be described below.
■半田付き性：
従来品と本発明品とを８０℃の恒温槽中に収納して２４
０時間放置した後、それらをロジン系フラックスのメタ
ノール溶液に浸漬塗布し、２３０℃の溶融半田（錫：鉛
＝８０： ４０の割合で構成されたもの。）中に２秒間
浸漬した。その結果、それらの半田の被覆面積をしらべ
てみたところ、従来品では７０〜８０％であったのに対
して、本発明品では８５〜９５％であった。このことは
、本発明品の方が従来品よりも半田付き性が優れている
ことを示している。■Solderability: The conventional product and the inventive product were stored in a thermostat at 80°C for 24 hours.
After being left to stand for 0 hours, they were dip-coated in a methanol solution of rosin-based flux, and immersed in 230° C. molten solder (consisting of a tin:lead ratio of 80:40) for 2 seconds. As a result, when we examined the solder coverage area of these products, it was 70 to 80% for the conventional product, while it was 85 to 95% for the product of the present invention. This indicates that the product of the present invention has better solderability than the conventional product.
また、上記のように恒温槽中での８０℃放置をしないで
従来品と本発明品との半田の付着具合をしらべてみたと
ころ、次のようであった。すなわ□ち、第６図は従来品
のチップ型正特性サーミスタと本発明品のチップ型正特
性サーミスタとの回路基板におけるリフロー半田付けに
よる半田付き性を示すものである。第６図（ａ）は従来
品の場合の半田付き性を示すもので、回路基板４０の上
に載置された従来品４２では半田４４がそれの両側部４
６の下方で付着しているだけであるのに対し、第６図（
ｂ）の本発明品４８では半田４４がそれの両側部５０の
全体にも付着しており、本発明品の方がその半田付き性
は良好であった。Furthermore, when we examined the solder adhesion between the conventional product and the product of the present invention without leaving them in a thermostatic oven at 80°C as described above, the results were as follows. That is, FIG. 6 shows the solderability of a conventional chip-type positive temperature coefficient thermistor and a chip-type positive temperature coefficient thermistor of the present invention by reflow soldering on a circuit board. FIG. 6(a) shows the solderability of the conventional product. In the conventional product 42 placed on the circuit board 40, the solder 44 is attached to both sides of the product 42.
6 (Fig. 6).
In the product 48 of the present invention (b), the solder 44 was also adhered to the entire both sides 50, and the solderability of the product of the present invention was better.
■半田食われ性：
従来品と本発明品とを２５０℃の噴流半田（錫：鉛＝６
０：４０）中に１０秒間浸漬した。この場合、フラック
スは上記■の場合と同じである。■Solder erosion resistance: The conventional product and the product of the present invention were subjected to jet soldering (tin: lead = 6) at 250°C.
0:40) for 10 seconds. In this case, the flux is the same as in the case (2) above.
その結果、従来品では銀が半田に半分以上の面積におい
て食われてしまって消失していたが、本発明品では半田
食われは認められなかった。As a result, in the conventional product, more than half of the area of the silver was eaten away by solder and disappeared, but in the product of the present invention, no solder erosion was observed.
■マイグレーション：
従来品と本発明品とを共に４０℃、９０〜９５％１１
Ｈの環境下において各５０個に３０００時間、直流３ｖ
の連続印加をしたところ、従来品では７箇に銀マイグレ
ーションが認められたが、本発明品ではマイグレーショ
ンの跡は認められなかった。■Migration: Both the conventional product and the inventive product at 40℃, 90-95%11
50 pieces each for 3000 hours under H environment, DC 3V
When continuously applied, silver migration was observed in 7 locations in the conventional product, but no trace of migration was observed in the product of the present invention.
■コスト：
従来品では銀を用いているから高価であるが、本発明品
では銀を用いていないから安価になる。■Cost: Conventional products are expensive because they use silver, but the products of the present invention are inexpensive because they do not use silver.
（効果）
以上説明したことから明らかなように本発明によれば、
素体の両側部のそれぞれに設けられる２層構造の電極の
内、下層側電極をニッケルで構成したから、素体との間
のオーミック接触を得ることができる一方、上層側電極
を半田で構成したから、銀のようにその表面に酸化物、
塩化物、硫化物が形成され易いとうことがなくなって半
田付き性が良好になるとともに、銀のような半田食われ
も、銀マイグレーションも生じず、しがも半田であるか
らコスト的に有利なチップ型正特性サーミスタを提供す
ることができる。(Effects) As is clear from the above explanation, according to the present invention,
Of the two-layered electrodes provided on each side of the element, the lower electrode is made of nickel, allowing ohmic contact with the element, while the upper electrode is made of solder. Therefore, like silver, there are oxides on its surface,
It eliminates the tendency for chlorides and sulfides to form, resulting in better solderability. It also does not suffer from solder corrosion or silver migration unlike silver, and is advantageous in terms of cost because it is still a solder. A chip type positive temperature coefficient thermistor can be provided.
第１図ないし第６図は本発明に係り、第１図は本発明の
一実施例のチップ型正特性サーミスタの横断面図、第２
図ないし第５図は第１図のチップ型正特性サーミスタの
製造要領の説明に供する各工程図、第６図は従来品と本
発明品との半田付き性を比較を示すもので、第６図（ａ
）は従来品の場合、第６図（ｂ）は本発明品の場合をそ
れぞれ示す図である。
第７図（ａ）（ｂ）（ｃ）は各従来例のチップ型正特性
サーミスタの横断面図である。
２０・・・素体、２２・・・電極、２４・・・下層側電
極、２６・・・上層側電極。1 to 6 relate to the present invention; FIG. 1 is a cross-sectional view of a chip type positive temperature coefficient thermistor according to an embodiment of the present invention;
5 to 5 are process diagrams for explaining the manufacturing procedure of the chip-type positive temperature coefficient thermistor shown in FIG. 1, and FIG. Figure (a
) shows the case of the conventional product, and FIG. 6(b) shows the case of the product of the present invention. FIGS. 7(a), 7(b), and 7(c) are cross-sectional views of each conventional chip type positive temperature coefficient thermistor. 20...Element body, 22...Electrode, 24...Lower layer side electrode, 26...Upper layer side electrode.
Claims (1)
プ型正特性サーミスタであって、前記電極がニッケルの
下層側電極と半田の上層側電極との少なくとも２層構造
にされていることを特徴とするチップ型正特性サーミス
タ。(1) A chip-type positive temperature coefficient thermistor having electrodes provided on each side of an element body, the electrodes having at least a two-layer structure of a lower layer electrode of nickel and an upper layer electrode of solder. A chip-type positive temperature coefficient thermistor featuring:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28768687A JPH01128501A (en) | 1987-11-13 | 1987-11-13 | Chip type positive temperature coefficient thermistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28768687A JPH01128501A (en) | 1987-11-13 | 1987-11-13 | Chip type positive temperature coefficient thermistor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01128501A true JPH01128501A (en) | 1989-05-22 |
| JPH0557721B2 JPH0557721B2 (en) | 1993-08-24 |
Family
ID=17720417
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP28768687A Granted JPH01128501A (en) | 1987-11-13 | 1987-11-13 | Chip type positive temperature coefficient thermistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01128501A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04234101A (en) * | 1990-12-28 | 1992-08-21 | Mitsubishi Materials Corp | Chip type thermistor and manufacture thereof |
| WO2007118472A1 (en) * | 2006-04-18 | 2007-10-25 | Epcos Ag | Electrical ptc thermistor component, and method for the production thereof |
-
1987
- 1987-11-13 JP JP28768687A patent/JPH01128501A/en active Granted
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04234101A (en) * | 1990-12-28 | 1992-08-21 | Mitsubishi Materials Corp | Chip type thermistor and manufacture thereof |
| WO2007118472A1 (en) * | 2006-04-18 | 2007-10-25 | Epcos Ag | Electrical ptc thermistor component, and method for the production thereof |
| JP2009534814A (en) * | 2006-04-18 | 2009-09-24 | エプコス アクチエンゲゼルシャフト | Electric PTC thermistor parts and manufacturing method thereof |
| US8154379B2 (en) | 2006-04-18 | 2012-04-10 | Epcos Ag | Electrical PTC thermistor component, and method for the production thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0557721B2 (en) | 1993-08-24 |
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