JPS5885502A - Method of producing thick film varistor - Google Patents

Method of producing thick film varistor

Info

Publication number
JPS5885502A
JPS5885502A JP56184622A JP18462281A JPS5885502A JP S5885502 A JPS5885502 A JP S5885502A JP 56184622 A JP56184622 A JP 56184622A JP 18462281 A JP18462281 A JP 18462281A JP S5885502 A JPS5885502 A JP S5885502A
Authority
JP
Japan
Prior art keywords
varistor
film
thick film
glass
electrically insulating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56184622A
Other languages
Japanese (ja)
Inventor
稔 増田
高見 昭宏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP56184622A priority Critical patent/JPS5885502A/en
Publication of JPS5885502A publication Critical patent/JPS5885502A/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 本発明は電気絶縁性基板」二に設けられだZnO焼結体
粉体とこれを結合するためのカラスフリットからなるバ
リスタj俣に一対の電極を伺与した厚膜バリスタの製造
法に関するものである。
[Detailed Description of the Invention] The present invention is a thick film in which a pair of electrodes are provided on the varistor holder, which is provided on an electrically insulating substrate and is made of ZnO sintered powder and a glass frit for bonding the varistor. The present invention relates to a method for manufacturing a varistor.

その目的は、メッキ時における耐酸性に優れた厚膜バリ
スタを提供することにある。
The purpose is to provide a thick film varistor with excellent acid resistance during plating.

従来からZnO焼結体粉体とガラスフリットからなる厚
膜−・リスクが開発され、微少j°、」膜化)X19品
として実用に供さJl、できている。
A thick film made of ZnO sintered powder and glass frit has been developed and put into practical use as a microscopic film.

第1図は従来の厚j1にバリスタの基本構造の一例を小
す乎面図であり、第2図1.1−第1図のC−Q’線よ
りみた断面である1、 図において、1C1電気絶縁1’lで+l1lJ ;”
!l 1/I−を有するアルミナ基板、2aと2 b 
l、f、電11計、3V1バリスタ膜で酸化亜鉛粉粒体
とカラスから4:るものであり、4は絶縁被覆層で低融
点カラスも(〜< 1ルジス]・インク等から庁るもの
である。
Fig. 1 is a plan view of an example of the basic structure of a varistor reduced to the conventional thickness j1, and Fig. 2 is a cross section taken along line C-Q' in Fig. 1-1. 1C1 electrical insulation 1'l +l1lJ ;”
! Alumina substrates with l 1/I-, 2a and 2b
l, f, electric 11 total, 3V1 varistor film made from zinc oxide powder and glass, 4 is an insulating coating layer that also contains low melting point glass (~ < 1 Lugis), ink, etc. It is.

上記の従来における厚膜バリスタの場合、次のような欠
点かぁ−、た3、ずなわ1ハ電(1/I1部分に銀を使
用している/(め電極部分の半111イ・jけIl、′
jに銀くわれが発生ずるという問題があり、!1)にチ
ップ部品のように7E極面積の小さいものに4・・いて
C,致命的な問題であった。し/こがって、チップ部品
のJ:うに電極面積の小さいものにi=−いてe」:、
電イ参部分に半田メッキ等の処理を行って半11目・1
゛け性の特性向」−ヲ計る必要があった。そこで、従来
の厚膜バリスタに半11」メッキ等の処理を行ったが、
バリスタ膜をその側面部を含んで完全に絶縁被覆した構
造でないため、バリスタ膜が半1」1メツキ液等の強酸
性によって特性に悪影響を受けるという曲頭があった。
In the case of the conventional thick film varistor mentioned above, there are the following drawbacks: Silver is used in the 1/I1 part. Il,′
There is a problem that silver cracks occur on j. 1) For items with small 7E electrode areas, such as chip parts, 4...C was a fatal problem. J of chip parts: i = - and e' for those with small electrode area:
Processing such as solder plating on the electric contact part and half 11 stitches/1
It was necessary to measure the characteristics of ``disposability''. Therefore, we applied treatments such as half-11'' plating to conventional thick film varistors, but
Since the varistor film does not have a structure in which the side surfaces thereof are completely insulated, the characteristics of the varistor film are adversely affected by strong acids such as half-1 x 1 plating liquid.

本発明はこのような従来の厚膜バリスタのもつ欠点を解
消するものであり、電気絶縁性基板の上に直接あるいは
電極を介して、ZnO焼結体粉体粉体とガラスフリット
に増粘剤を含む溶剤を加えたペーストを塗布し、ガラス
の融点以上で焼料けてバリスタ膜を形成し、さらに電気
的絶縁性のペースト(低融点ガラス、レジストインク)
をバリスタ膜の上部および側面部に塗布し、乾燥寸たは
焼付けてバリスタ膜を側面部を含んで完全に絶縁被覆し
たことを特徴とするものである。
The present invention solves the drawbacks of the conventional thick film varistor, and applies a thickening agent to the ZnO sintered powder and glass frit directly or through an electrode on an electrically insulating substrate. A paste containing a solvent is applied and baked at a temperature higher than the melting point of the glass to form a varistor film, and an electrically insulating paste (low melting point glass, resist ink) is applied.
is applied to the upper and side surfaces of the varistor film and dried or baked to completely insulate the varistor film including the side surfaces.

以下、本発明の一実施例を第3図に」=り説明する。第
3図において、5は電気絶縁性で劇熱性を有するアルミ
ナ基板であり、この」−に銀ペースト等の印刷焼付によ
り電極6aが設けられている。
Hereinafter, one embodiment of the present invention will be explained with reference to FIG. In FIG. 3, reference numeral 5 denotes an alumina substrate which is electrically insulating and highly heat-resistant, and electrodes 6a are provided on this substrate by printing and baking silver paste or the like.

次に、この電極6a上にZnO焼結体粉体とガラスフリ
ットに増粘剤を含む溶剤を加えたペーストを塗布し、ガ
ラスのml1点以上でも?、伺けてなるバリスタ膜7を
形成し、さらにこのバリスタ膜7」−に電極6bを設け
、しかる後に・・リスタ膜7の上部および側面部を被榎
するように印刷劫、伺または印刷乾燥の方法により絶縁
被覆層8を設けて一体構造としだものである。
Next, a paste made of ZnO sintered powder, glass frit, and a solvent containing a thickener is applied onto the electrode 6a, and even if the thickness of the glass is 1 ml or more, , a varistor film 7 is formed as shown in FIG. An insulating coating layer 8 is provided by the method described above to form an integral structure.

一]−記において、絶縁被覆層8はペースi・状の低融
点ガラス、レジメトインク等の印刷焼料または印刷乾燥
により形成したものであり、絶縁被覆層8はバリスタ膜
了、バリスタ膜T十の電極6bとの密着性が良好であり
、[1つ優れた電気絶縁特性。
1]-, the insulating coating layer 8 is formed by printing or drying a paste type low melting point glass, regimen ink, etc.; It has good adhesion with the electrode 6b, and has excellent electrical insulation properties.

耐酸性を有する組成からなるようにしたものであり、過
度な膜厚に調整してバリスタ膜7をその側面部を含んで
完全に被覆するように形成されている。このように構成
した絶縁被覆層8は7ノキ時における耐酸性に優れ、バ
リスタ膜7のメッギ時における耐酸性同寸−に寄(jす
るものであり、絶縁被覆層8で被覆されていない電(ヴ
6& 、6bにバリスタ膜γの特性劣化なくメッキ処」
111により半田等のノノキを用油にし、厚膜バリスタ
の電極部分の半田付は性向−L−k ”J能にするもの
である。
The varistor film 7 is made of an acid-resistant composition, and is adjusted to an excessive thickness so as to completely cover the varistor film 7 including its side surfaces. The insulating coating layer 8 configured in this manner has excellent acid resistance at 7 hours, and has the same acid resistance as the varistor film 7 at the time of meshing. (V6&, 6b plated without degrading the characteristics of the varistor film γ.)
According to 111, solder or the like is used as a working oil, and the soldering of the electrode portion of the thick film varistor is made to have a tendency of −L−k ”J.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の厚膜バリスタの基本構造の一例を示す平
面図、第2図は第1図のc−c’線よりみた断面図、第
3図は本発明による製造法により得られた厚膜バリスタ
の一例を示す断面図である。 5・・・・・・アルミナ基板、6a、eb・・・°゛°
°電憾・・・・・・バリスタ膜、8・°°・・・絶縁被
覆層。 代理人の氏名 弁理士 中 尾 敏 カ はが1名第1
図 ↑ θ′ 第2図 第3図
Fig. 1 is a plan view showing an example of the basic structure of a conventional thick film varistor, Fig. 2 is a sectional view taken along line c-c' in Fig. 1, and Fig. 3 is a varistor obtained by the manufacturing method of the present invention. FIG. 2 is a cross-sectional view showing an example of a thick film varistor. 5...Alumina substrate, 6a, eb...°゛°
°Electrical film...Varistor film, 8.°°...Insulating coating layer. Name of agent Patent attorney Satoshi Nakao Ka Haga1 person No.1
Figure ↑ θ' Figure 2 Figure 3

Claims (1)

【特許請求の範囲】[Claims] 電気絶縁性基板の上に直接あるいは電極を介して、Zn
O焼結体粉体とガラスノリノドに増粘剤を含む溶剤を加
えたペーストをを布し、ガラスの融点以」二で焼付けて
・・リスク膜を形成し、さらに電気的絶縁性のペースト
を上記バリスタ膜の」一部および側面部に塗布し、乾燥
または焼付けて上記バリスタ膜を側面部を含んで完全に
絶縁被覆層で被覆してなる厚膜バリスタの製造法。
Zn is deposited on the electrically insulating substrate directly or through an electrode.
A paste made by adding a solvent containing a thickener to O sintered powder and glass glue is applied and baked at a temperature above the melting point of glass to form a risk film, and then an electrically insulating paste is applied as described above. 1. A method for manufacturing a thick film varistor, in which the varistor film, including the side surfaces, is completely covered with an insulating coating layer by coating a portion of the varistor film and the side surface, and drying or baking.
JP56184622A 1981-11-17 1981-11-17 Method of producing thick film varistor Pending JPS5885502A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56184622A JPS5885502A (en) 1981-11-17 1981-11-17 Method of producing thick film varistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56184622A JPS5885502A (en) 1981-11-17 1981-11-17 Method of producing thick film varistor

Publications (1)

Publication Number Publication Date
JPS5885502A true JPS5885502A (en) 1983-05-21

Family

ID=16156449

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56184622A Pending JPS5885502A (en) 1981-11-17 1981-11-17 Method of producing thick film varistor

Country Status (1)

Country Link
JP (1) JPS5885502A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005088654A1 (en) * 2004-03-15 2005-09-22 Matsushita Electric Industrial Co., Ltd. Static electricity countermeasure component
WO2005098877A1 (en) * 2004-04-02 2005-10-20 Matsushita Electric Industrial Co., Ltd. Component with countermeasure to static electricity

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005088654A1 (en) * 2004-03-15 2005-09-22 Matsushita Electric Industrial Co., Ltd. Static electricity countermeasure component
US7283032B2 (en) 2004-03-15 2007-10-16 Matsushita Electric Industrial Co., Ltd. Static electricity countermeasure component
WO2005098877A1 (en) * 2004-04-02 2005-10-20 Matsushita Electric Industrial Co., Ltd. Component with countermeasure to static electricity
US7864025B2 (en) 2004-04-02 2011-01-04 Panasonic Corporation Component with countermeasure to static electricity

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