Classifications

• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03K—PULSE TECHNIQUE
  • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
  • H03K3/01—Details
  • H03K3/012—Modifications of generator to improve response time or to decrease power consumption
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03K—PULSE TECHNIQUE
  • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
  • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
  • H03K3/023—Generators characterised by the type of circuit or by the means used for producing pulses by the use of differential amplifiers or comparators, with internal or external positive feedback
  • H03K3/0231—Astable circuits

Definitions

• the present invention relates to an oscillator arrangement, comprising a charge storage and a comparator having a first input, which is connected to the charge storage for supplying a dependent of the state of charge signal, with a second input for supplying a switching threshold and having an output with is connected to the charge storage.
• the invention relates to a method for generating a periodic signal comprising the steps of: charging a charge store with a charging current, comparing a signal dependent on the charge state of the charge store with a switching threshold by means of a comparator and discharging the charge store.
• LC oscillators there are various ways known to realize an oscillator in integrated semiconductor circuit technology. While the resonant circuit frequency is determined by an inductance and a capacitance in so-called LC oscillators, this takes place in ring oscillators by transit time effects.
• a capacitor determines the time behavior. The capacitor is alternately charged and discharged. The capacitor is normally charged until its voltage exceeds an upper threshold. When this occurs, a discharge is started and the capacitor is discharged. For example, when the capacitor drops below a lower threshold with its voltage, the entire cycle is repeated. This results in a triangular or sawtooth voltage curve.
• Such a generic oscillator arrangement is described, for example, in the document Michael P. Flynn, Sverre U. Lidholm: A 1.2- ⁇ m CMOS Current-Controlled Oscillator, IEEE Journal of Solid-State Circuits, VOL. 27, no. 7, June 1992 in FIG.
• Oscillators are needed in portable medical devices such as blood pressure or pulse monitors, devices for administering insulin, but also in automotive applications such as monitoring systems for tire inflation pressure.
• the oscillator serves to wake up the measuring system at regular intervals.
• the document US 4,714,901 relates to a temperature-compensated complementary metal-insulator-semiconductor oscillator. There, a voltage divider is shown, which is developed to generate a temperature-stable reference voltage. However, this principle is not suitable for generating extremely small BIAS currents.
• a delay-controlled relaxation oscillator is shown in document US 4,963,840. Two comparators are used to switch the charging and discharging current. Although this circuit has a reduced power consumption by the proposed switching principle, this circuit is not suitable for extremely low power consumption due to the voltage divider for generating a reference level.
• the document US 5,461,590 shows an oscillator with a constant current source which operates independently of voltage fluctuations and temperature fluctuations.
• the operation of this constant current source is explained in more detail in the document US Pat. No. 5,315,230. It is contemplated to charge a reference capacitance to generate a delay that determines the clock period of an output signal of the oscillator.
• this circuit is not suitable for further reduction of power consumption.
• the circuit in the document US 5,604,467 comprises a flip-flop with temperature-compensated current source and a voltage generator for generating a nearly constant voltage as a function of the temperature. Since large resistors are also used here to generate small BIAS currents, this principle is not suitable for particularly low current consumption of an oscillator.
• the object of the present invention is to specify an oscillator arrangement and a method for generating a periodic signal, in which the current consumption is further reduced.
• the object is achieved with respect to the device by an oscillator arrangement, which is further developed with the features of claim 1.
• the object is achieved by a method with the steps according to claim 14. Further details and embodiments of the proposed principle are the subject of the dependent claims.
• a current comparator In a current comparator, English: current mode comparator, two current-controlled branches are provided. While one of the current branches is dependent on the charge state of the charge store, preferably the voltage across the capacitor, the other current branch is dependent on a switching threshold. The switching threshold is used to switch between charging and discharging or discharging and charging of the charge storage. In the present case, one of these two current branches of the comparator serves at the same time as a charge current branch for carrying the charging current, with which the charge storage device is charged or discharged. Thus, the number of current-carrying branches is reduced. This allows a significant savings in terms of power consumption of the circuit.
• the two current branches of the comparator are preferably coupled to one another via a current mirror.
• the current mirror preferably comprises two transistors of the unipolar type, each with a controlled path.
• a connection of a controlled path of one of the transistors is preferably connected to an input for supplying the switching threshold, while a connection of another transistor of the current mirror is preferably connected to a connection for connection to the charge store.
• the output terminal of the comparator is preferably formed at a free end of a controlled path of the output-side transistor of the current mirror.
• a discharge current branch can be connected in parallel with the charge store.
• the discharge current branch is preferably switchable formed bar and includes either a switch in parallel to the charge storage or a switchable power source or current sink in parallel to the charge spreader.
• the switch is preferably activated as a function of an output signal of the comparator.
• a control unit is advantageously provided with an input which is connected to the output of the comparator and with an output which is connected to a control input for connecting and disconnecting the Entladestromzweigs.
• the control unit preferably comprises a flip-flop such as an RS flip-flop.
• a digital circuit with memory may be provided.
• control unit may preferably be driven by a voltage regulator for its power supply.
• the output of the oscillator arrangement to which a triangular or sawtooth voltage can be provided, is advantageously formed at the output of the comparator.
• a frequency divider is connected between the output of the comparator and the oscillator output.
• the frequency divider is preferably also coupled to the voltage regulator to its power supply.
• the switching threshold for the comparator is preferably provided with a reference voltage source.
• the reference voltage source is advantageously designed to provide a voltage proportional to the absolute temperature, English: PTAT, proportional to the absolute temperature.
• a further comparator is preferably provided. This has a first input, which is connected to the charge storage for supplying a state of charge-dependent signal, a second input for supplying a further switching threshold and an output, which is connected to the charge storage, wherein one of the two switching thresholds one o- bere and the other of the both switching thresholds is a lower switching threshold.
• an additional reference voltage source can be provided for providing the further switching threshold.
• the further reference voltage source is preferably designed to provide a voltage proportional to the absolute temperature.
• a common BIAS current source is provided, which is connected on the output side with the current branches of the comparator or gates.
• the reference voltage source and the optionally present further reference voltage source are advantageously supplied by the common BIAS current source with a BIAS signal. As a result, the synchronization properties of the circuit are further improved.
• FIG. 2 shows an exemplary development of the circuit of FIG. 1 on the basis of a circuit diagram
• FIG. 3 shows the construction of a current comparator using an example
• Figure 5 shows an embodiment of a voltage regulator
• FIG. 6 shows an exemplary signal curve of the capacitor voltage of a relaxation oscillator.
• FIG. 1 shows an oscillator arrangement according to the proposed principle.
• the time behavior is determined by a reference capacity as a charge storage 1.
• a first comparator 2 has a first input 3 which is connected to the charge storage device 1.
• a second input 4 of the comparator is used to supply an upper switching threshold V TH .
• the comparator 2 comprises two current branches, which are connected via a current mirror. are connected to each other.
• the current mirror comprises a first transistor 5 and a second transistor 6.
• the first transistor 5 is connected as a diode.
• the drain terminal of the input-side current mirror transistor 5 is connected to its gate terminal and via a current source 7 to a supply potential connection 8.
• the source terminal of the first transistor 5 forms the input 4.
• the output side transistor 6 of the current mirror is connected to its drain terminal, which at the same time forms the output 9 of the comparator 2, via a current source 10 to the supply potential terminal 8 connected.
• the source terminal of the output-side current mirror transistor 6 forms the input 3.
• Parallel to the charge storage 1, a discharge current branch is connected, which includes a switch 11.
• a first reference voltage source 12 comprises two transistors 13, 14 which are connected in series with respect to their controlled paths. This series circuit is connected between a current source 15, which is connected to the supply potential 8, and a reference potential terminal 16. The gate terminals of the two transistors 13, 14 of the first reference voltage source 12 are connected to each other and to the current source 15. At the connection node of the controlled paths of the transistors 13, 14, the output of the reference voltage source is formed, which is connected to the input 4 of the comparator 2.
• a second comparator 17 is constructed with a second reference voltage source 18. One of the two inputs of the second comparator 17 is also connected to the charge storage device 1. On the output side Transis- Gate of the current mirror of the second comparator 17, an output 19 of the second comparator 17 is formed.
• the current sources 7, 10 of the first comparator 2, the current source of the first reference voltage source 15, and the current sources of the second comparator 17 and the second reference voltage source 18 are driven by a common BIAS source 20.
• a control unit 21 has two inputs, which is connected to the outputs 9, 19 of the comparators 2, 17. An output of the control unit 21 is connected to a control input of the switch 11 for driving it. With regard to its power supply, the control unit 21 is connected to the supply potential connection 8 via a voltage regulator 22.
• the voltage regulator 22 sets a lower voltage with respect to the voltage VDD at the supply potential terminal 8
• the output of the control unit 21 is further connected to a frequency divider 23, at whose output the output clock signal CLK of the oscillator of Figure 1 is provided. Also, the frequency divider 23 is connected to its power supply to the output of the voltage regulator 22.
• the comparator 2 compares the current voltage drop across the charge storage device 1 with the upper switching threshold V TH , which supplies the first reference voltage source 12. As soon as the voltage across the charge storage device 1 exceeds this upper switching threshold during a charging process of the charge accumulator 1, a signal SET is output at the output 9 to the control unit 21, which then initiates the discharging process by closing the switch 11. As soon as the voltage across the charge store 1 drops below a lower switching threshold V TL as a result of the subsequent discharge of the charge store 1, which the second comparator 17 determines, the latter outputs 19 an inverted reset signal RESET to the control unit 21 from. This then opens the switch 11 again, so that a recharging of the charge storage device 1 takes place.
• Circuit comes with a typical supply current of only ten nanoamps including BIAS supply and control logic.
• the sensitivity to temperature fluctuations and variations in the supply voltage VDD is very low.
• the typical temperature coefficient achievable with the proposed principle is 300 ppm per degree Celsius.
• the proposed circuit architecture is particularly suitable for applications where power consumption is critical, for example, for so-called ultra low power applications with low power sources as explained above.
• the proposed embodiment includes a current reference with self-biased current reference, for generating a charging current proportional to the absolute temperature.
• the charge storage 1 With this power source, the charge storage 1 is charged.
• the voltage across the charge storage device 1 is compared with a respective reference voltage V TH , V TL , which is also proportional to the absolute temperature. This compensates for temperature fluctuations with first-order accuracy.
• V TH reference voltage
• V TL reference voltage
• the proposed power source additionally reduces power consumption by the consistent use of current mirrors with unity gain values.
• the proposed current source 10 preferably employs MOSFET transistors operating in either weak inversion or moderate inversion. As a result, this circuit is operable with particularly low supply voltages and consumes less power than previously proposed power sources of this type.
• the supply of the RS flip-flop in the control unit 21 for switching between charging and discharging operation of the charge storage device with reduced supply voltage further reduces the total power consumption of the device.
• Figure 2 shows a development of the circuit of Figure 1 by way of example. Insofar as these exemplary embodiments correspond to the components used and their advantageous interconnection and mode of operation, a repetition of the description at this point is avoided.
• FIG. 2 is developed to the effect that the current sources 7, 10, 15 of these functional blocks are designed as unipolar transistors whose gate terminals connected to each other and to an output of a BIAS source 20.
• the BIAS source 20 comprises a first current branch for forming a reference source 24 with two transistors connected in series, the structure and interconnection of which corresponds to the reference voltage source 12. This series connection is also connected between a current source transistor 25 and the reference potential connection 16.
• the current source transistor 25 is connected to the supply potential terminal 8 at its source terminal.
• the output tap of the reference voltage source 24 is connected to a source terminal of an output-side transistor 26 of a current mirror 26, 27.
• the transistors 26, 27 of the current mirror are connected together on the gate side.
• the input-side transistor 27 of this current mirror has a gate connected to its drain terminal.
• the source terminal of the input-side current mirror transistor 27 is connected to the reference potential terminal 16.
• diode-connected transistor 28 is connected to the drain terminal of the transistor 26, the drain terminal of the output side transistor 29 of the further current mirror connected to the drain terminal of the transistor 27.
• Supply potential terminal 8 are connected to each other in the output terminal node of the BIAS source.
• the control unit 21 is designed in FIG. 2 as an RS flip-flop 30.
• the RS flip-flop 30 has a set input S, a reset input R, an output Q and an inverting output.
• a supply voltage connection of the control unit 21, in the present case of the flip-flop 30, is connected to an output of a voltage regulator 22.
• the set input S is connected to the output 9 of the first comparator 2.
• the reset input R is connected to the output 19 of the second comparator 17.
• the output Q of the RS flip-flop 30 is connected to a gate terminal of a transistor whose controlled path is connected in parallel with the charge storage device 1 and represents the switch 11.
• the voltage regulator 22 in FIG. 2 has the structure described below with reference to FIG. 5, its BIAS current source 31 being designed as a transistor whose gate connection for the bias supply of the voltage regulator 22 is likewise connected to the output of the BIAS source 20.
• the output of the second comparator 17 is connected via an inverter to the reset input R of the flip-flop 30.
• FIG. 3 shows the principle of the current comparator 2 of FIG. 1 used according to the proposed principle.
• the equivalent equivalent circuit diagram of a comparator for two input voltages V N , V P at its inputs is shown on the right side.
• the structure and operation of the comparator 2 has already been explained in detail with reference to the first comparator 2 of Figure 1 and should therefore not be described again at this point.
• FIG. 4 shows the BIAS source 20 of FIG. 2. Since the circuits largely correspond to one another in design and mode of operation, the description should not be repeated here. As already explained, it is advantageous to use current mirrors with unit values of the components involved, as this results in a further reduction of the current Consumption is possible.
• the transistors involved are operated in either weak inversion or moderate inversion, further reducing the power consumption of the so-called self-biasing current source.
• the dimensioning can be adjusted by the transmission ratio K of the current mirror 26, 27.
• FIG. 5 shows the voltage regulator 22 of FIG. 2. It comprises an amplifier 32 with adaptive BIAS control.
• the amplifier 32 is designed as a differential amplifier.
• the BIAS is designed as a differential amplifier.
• Current source 31 of this voltage regulator is preferably supplied by the common BIAS source 20 and controls one of the inputs of the differential amplifier 32.
• the output node 33 of the voltage regulator 22 is stabilized by means of a support capacitance 34 and at the same time fed back to another of the inputs of the differential amplifier 32.
• FIG. 6 shows, by way of example, a voltage curve of a relaxation oscillator, as shown in FIG. 1 or 2 in exemplary embodiments.
• circuit may be constructed in alternative embodiments in other than the MOS circuit technology shown. LIST OF REFERENCE NUMBERS
• VDD supply voltage
• VSS Reference potential
• V TH upper switching threshold
• V TL lower switching threshold

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• Manipulation Of Pulses (AREA)
• Control Of Electrical Variables (AREA)
• Logic Circuits (AREA)

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• 2005
  • 2005-09-12 DE DE102005043376A patent/DE102005043376B4/de active Active
• 2006
  • 2006-08-31 US US11/991,990 patent/US8242852B2/en active Active
  • 2006-08-31 WO PCT/EP2006/008541 patent/WO2007031200A1/de active Application Filing
  • 2006-08-31 EP EP06777137A patent/EP1925078A1/de not_active Withdrawn

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