EP1636777A1 - Procede et circuiterie pour simuler des defauts au niveau pixel et sous-pixel apparaissant dans des affichages a adressage matriciel - Google Patents

Procede et circuiterie pour simuler des defauts au niveau pixel et sous-pixel apparaissant dans des affichages a adressage matriciel

Info

Publication number
EP1636777A1
EP1636777A1 EP04722816A EP04722816A EP1636777A1 EP 1636777 A1 EP1636777 A1 EP 1636777A1 EP 04722816 A EP04722816 A EP 04722816A EP 04722816 A EP04722816 A EP 04722816A EP 1636777 A1 EP1636777 A1 EP 1636777A1
Authority
EP
European Patent Office
Prior art keywords
pixel
signal
sub
pixel defect
synchronization signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
EP04722816A
Other languages
German (de)
English (en)
Inventor
Udo Fischbeck
Markus Friebe
Johannes Spindler
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Grundig Multimedia BV
Original Assignee
Grundig Multimedia BV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Grundig Multimedia BV filed Critical Grundig Multimedia BV
Publication of EP1636777A1 publication Critical patent/EP1636777A1/fr
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/10—Dealing with defective pixels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays

Definitions

  • the invention relates to a method and a circuit arrangement for simulating pixel and sub-pixel defects occurring in matrix-addressed displays.
  • the plasma screens are a matrix of small gas discharge areas, three of which each represent a picture element. Such a picture element is called a pixel, the three associated gas discharge areas represent the subpixels.
  • the above-mentioned LCD screens are matrix-shaped liquid crystal display devices.
  • an image point or pixel is formed by three liquid crystal cells lying next to one another, which represent the colors red, green and blue and are also referred to as subpixels.
  • the category of matrix-addressed displays also includes projection display devices that use a matrix of picture elements located in the beam path of a light source, such as, for. B. rear projection screens or video projectors.
  • the matrix of picture elements works on the reflection principle such as LCOSs (Liquid Crystal On Silicon) or DiVIDs (Digital Micromirror Device) or on the transmitted light principle such as e.g. B. LCDs (Liquid Crystal Display).
  • Display control is applied, which enables a very simple change of the error images on the one hand and a display of the error images independent of the display type.
  • Fig. 1 shows a circuit arrangement for generating pixel and / or sub-pixel defects in a control signal for a screen.
  • FIG. 2 shows a detail of the circuit arrangement according to FIG. 1
  • a video data signal 1 is fed to a video data processing unit 2.
  • an RGB signal 10 is generated from the video data signal 1 and, on the other hand, e in a horizontal synchronization signal 9 and a vertical synchronization signal 8.
  • the RGB signal 10 generated in the video data processing unit 2 is applied to a screen control circuit via a switching array 5 6 switched through, which is also supplied with the horizontal synchronization signal 9 and the vertical synchronization signal 8 from the video data processing unit 2.
  • the screen control circuit 6 in turn controls the screen 7, so that an image that corresponds to the video data signal 1 normally appears on the screen 7.
  • a programmable pixel defect simulation unit 3 is used, which is acted upon on the one hand by the horizontal synchronization signal 9 and the vertical synchronization signal 8 from the video data processing unit 2 and on the other hand has a connection to a programming device 4.
  • Pixel error data or sub-pixel error data are transferred to the programmable pixel defect simulation unit 3 via the programming device 4, these error data defining on the one hand the type of error and on the other hand the location of the error on the screen surface.
  • the programmable pixel defect simulation unit 3 From the addressed pixel error data, the programmable pixel defect simulation unit 3 on the one hand generates an R'-G ' -B ' signal 11, which represents the respective pixel or sub-pixel error, on the other hand, the programmable pixel defect simulation unit 3 generates the horizontal synchronization signal 9 and the like Vertical synchronization signal 8 and the data parts that define the location of the respective error on the screen, a switching signal 18 with which the switching array 5 is acted upon such that the R ' -G ' -B ' signal 11, which the programmable pixel defect simulation unit has also briefly applied to the inputs of the screen control circuit 6 becomes. After the time defined by the pixel error data has elapsed, the programmable pixel data simulation unit 3 switches the switching array 5 back to its initial state, so that the normal RGB signal 10 is switched through again to the screen control circuit 6.
  • Pixel defects or sub-pixel defects are defined via the programming device 4 and are then transferred in the form of binary data into a memory 12 of the programmable pixel defect simulation unit 3.
  • the binary data contained in the memory 12 contain, on the one hand, information about how the R ' -G ' -B ' signal should look in order to represent the respective pixel defects and, on the other hand, information about where the respective errors should appear on the screen.
  • the last-mentioned information that is to say that which relate to the location of the display on the screen, are count values with which a comparator 13 is applied.
  • the comparator 13 is also supplied with the counter reading of a counter 14, the counter 14 being set to a defined counter value as a function of the horizontal synchronization signal 9 or the vertical synchronization signal 8. From this defined counter value, the counter 14 counts the clock signals on the horizontal synchronization signal 9 or the vertical synchronization signal 8 synchronized clock generator 15 and offers the counter reading to the comparator 13 for comparison. If the comparator 13 determines the equality between the counter reading of the counter 14 and the count value taken over from the memory 12, the comparator 13 generates at its output a signal which is sent via the switching signal generator 17 to the switching array 5, which is already in connection with FIG 1 is described.
  • R'-G ' -B ' data 19 are already present on the pixel defect generator, from which the pixel defect generator 16 generates an R ' -G ' -B ' signal 11.
  • this R ' -G'-B' signal 1 is briefly applied to the screen control circuit 6 by means of the switching array 5, which is acted upon by the switching signal generator 17 with a switching signal 18, which generates a corresponding representation on the screen 7.
  • the arrangement shown in FIG. 2 is of course only exemplary, in particular the arrangement shown in the example according to FIG. 2 can contain a large number of comparators 13 counters 14 and switching signal generators 17 in order to also easily display pixel or sub-pixel defects that are close together can.
  • the programmable pixel defect simulation unit 3 by means of a microprocessor which simulates the functioning of the circuit parts described. However, this does not change the principle of operation.
  • the method and the arrangement for the simulation of the pixel or sub-pixel defects regardless of the type of screen used.
  • the method and arrangement can be used equally for plasma screens, LCD screens, LCOS and DMD projectors and their respective subspecies, in short all matrix-addressable display types.
  • the prerequisite here is that a screen 7 is used to display the pixel or sub-pixel defects, which itself has as few such pixel or sub-pixel defects as possible, since otherwise the image impression to be simulated would be distorted.
  • the described arrangement and the described method can also be used in connection with cathode ray picture tubes, so that it is possible to display on a cathode ray picture tube the picture impression that a plasma screen or LCD screen with pixel or sub-pixel defects would provide ,

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Transforming Electric Information Into Light Information (AREA)

Abstract

L'invention concerne un procédé servant à simuler des défauts au niveau pixel et sous-pixel apparaissant dans des affichages à adressage matriciel, ainsi qu'une circuiterie servant à exécuter ce procédé. A cet effet, on génère, à partir d'un flux de données vidéo représentant des images vidéo à représenter, un signal R-V-B (10), un signal de synchronisation horizontal (9) et un signal de synchronisation vertical (8) au moyen desquels un écran (7) est commandé par l'intermédiaire d'un circuit de commande d'écran (6). Une unité de simulation programmable (3) de défaut au niveau pixel commande le remplacement du signal R-V-B (10) par un signal R'-V'-B' (11) qui simule le défaut au niveau pixel ou sous-pixel. La substitution concernant l'instant et la durée se fait de sorte que le défaut au niveau pixel ou sous-pixel simulé par le signal R'-V'-B' (11) est représenté à un emplacement présélectionnable de l'écran (7).
EP04722816A 2003-03-29 2004-03-24 Procede et circuiterie pour simuler des defauts au niveau pixel et sous-pixel apparaissant dans des affichages a adressage matriciel Ceased EP1636777A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE2003114268 DE10314268B3 (de) 2003-03-29 2003-03-29 Verfahren und Schaltungsanordnung zur Simulation von bei matrixadressierten Displays auftretenden Pixel- und Subpixeldefekten
PCT/EP2004/003097 WO2004088621A1 (fr) 2003-03-29 2004-03-24 Procede et circuiterie pour simuler des defauts au niveau pixel et sous-pixel apparaissant dans des affichages a adressage matriciel

Publications (1)

Publication Number Publication Date
EP1636777A1 true EP1636777A1 (fr) 2006-03-22

Family

ID=32731159

Family Applications (1)

Application Number Title Priority Date Filing Date
EP04722816A Ceased EP1636777A1 (fr) 2003-03-29 2004-03-24 Procede et circuiterie pour simuler des defauts au niveau pixel et sous-pixel apparaissant dans des affichages a adressage matriciel

Country Status (5)

Country Link
EP (1) EP1636777A1 (fr)
JP (1) JP2006523854A (fr)
CN (1) CN100466031C (fr)
DE (1) DE10314268B3 (fr)
WO (1) WO2004088621A1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020208558A1 (fr) * 2019-04-09 2020-10-15 Vuereal Inc. Techniques de réparation pour dispositifs et réseaux à micro-del

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06201516A (ja) * 1992-12-25 1994-07-19 Sony Corp 液晶パネル用疑似欠陥発生装置
JPH09257639A (ja) * 1996-03-19 1997-10-03 Fujitsu Ltd 液晶パネルの欠陥画素検査方法及びその装置
US5986697A (en) * 1995-01-03 1999-11-16 Intel Corporation Method and apparatus for raster calibration

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3297950B2 (ja) * 1993-07-13 2002-07-02 シャープ株式会社 平面型表示パネル検査装置
CN1328441C (zh) * 1996-12-27 2007-07-25 株式会社瑞典 大型垃圾清移装置
IT1296643B1 (it) * 1997-12-16 1999-07-14 Cselt Centro Studi Lab Telecom Procedimento e apparecchiatura per l'introduzione di distorsioni di riferimento in segnali video.
JP4160173B2 (ja) * 1998-10-06 2008-10-01 東芝松下ディスプレイテクノロジー株式会社 平面表示装置のシミュレーション方法、シミュレーション装置、検査方法、および検査装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06201516A (ja) * 1992-12-25 1994-07-19 Sony Corp 液晶パネル用疑似欠陥発生装置
US5986697A (en) * 1995-01-03 1999-11-16 Intel Corporation Method and apparatus for raster calibration
JPH09257639A (ja) * 1996-03-19 1997-10-03 Fujitsu Ltd 液晶パネルの欠陥画素検査方法及びその装置

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of WO2004088621A1 *

Also Published As

Publication number Publication date
CN100466031C (zh) 2009-03-04
WO2004088621A1 (fr) 2004-10-14
CN1795482A (zh) 2006-06-28
DE10314268B3 (de) 2004-08-19
JP2006523854A (ja) 2006-10-19

Similar Documents

Publication Publication Date Title
DE69812696T2 (de) Verfahren und vorrichtung zum einstellen eines oder mehrerer projektoren
DE60312463T2 (de) Dynamikbereichsverbesserung einer Bildanzeigevorrichtung
EP1062652B1 (fr) Afficheur a cristaux liquides a matrice active
DE102007038881B4 (de) Projektor eines Informationsanzeigesystems in Fahrzeugen, insbesondere in Flugzeugen
DE10324652A1 (de) Multivisions-System und Verfahren zum Steuern dieses Systems
DE19746329A1 (de) Display und Verfahren zur Ansteuerung des Displays
DE69531441T2 (de) Bildanzeigegerät
DE60118135T2 (de) Bildanzeigegerät
DE112011105192B4 (de) LCD-Paneel, Herstellungsverfahren für das LCD-Paneel und Verfahren zum Betrieb desselben
EP0875017A1 (fr) Dispositif d'eclairage pour microscope
DE602004002621T2 (de) Einstellung des Entzerrungsgrades für verzerrte projezierte Bilder
EP0140071A1 (fr) Appareil pour le contrôle d'images en couleurs sur un moniteur couleurs
DE10022009A1 (de) Verfahren und Einrichtung zur Bestimmung und mindestens teilweisen Korrektur der Fehler eines Bildwiedergabesystems
DE3411015C2 (fr)
DE4230829A1 (de) Schaltung zur anzeige auf einem bildschirm
DE10314268B3 (de) Verfahren und Schaltungsanordnung zur Simulation von bei matrixadressierten Displays auftretenden Pixel- und Subpixeldefekten
DE60310506T2 (de) Projektionssystem, das SLM-Pixels benutzt, die einerseits SLM-Pixel-Bereiche umfassen, die einer Anweisung bezüglich einer Akzeptanz von defekten Pixels genügen, und die andererseits SLM-Pixel-Bereiche umfassen, die der Anweisung nicht genügen
WO2003056389A1 (fr) Systeme de projection
EP1104180B1 (fr) Procédé et dispositif pour déterminer et corriger au moins partiellement les erreurs dans un système de reproduction d'images
DE69935638T2 (de) Bildanzeigegerät
DE10004743C2 (de) Verfahren und Einrichtung zum Ansteuern eines Bildschirmgerätes für ein Eisenbahnleitsystem
EP1680929B1 (fr) Commande de stereoprojection
DE19962826C1 (de) Projektor zur Darstellung eines Szenenbildes mit kalligraphischen Lichtern
DE3927123C2 (fr)
DE19907345A1 (de) Vorrichtung zum Abbilden eines als Raster von Bildpunkten darstellbaren Bildes auf einem Schirm

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

17P Request for examination filed

Effective date: 20050923

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LI LU MC NL PL PT RO SE SI SK TR

RIN1 Information on inventor provided before grant (corrected)

Inventor name: FISCHBECK, UDO

Inventor name: SPINDLER, JOHANNES

Inventor name: FRIEBE, MARKUS

DAX Request for extension of the european patent (deleted)
17Q First examination report despatched

Effective date: 20081119

REG Reference to a national code

Ref country code: DE

Ref legal event code: R003

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE APPLICATION HAS BEEN REFUSED

18R Application refused

Effective date: 20121214