EP1476902A2 - Composant electronique dote d'une couche adhesive et procede de fabrication associe - Google Patents

Composant electronique dote d'une couche adhesive et procede de fabrication associe

Info

Publication number
EP1476902A2
EP1476902A2 EP03742489A EP03742489A EP1476902A2 EP 1476902 A2 EP1476902 A2 EP 1476902A2 EP 03742489 A EP03742489 A EP 03742489A EP 03742489 A EP03742489 A EP 03742489A EP 1476902 A2 EP1476902 A2 EP 1476902A2
Authority
EP
European Patent Office
Prior art keywords
adhesive
electronic component
nanoparticles
components
adhesive layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP03742489A
Other languages
German (de)
English (en)
Inventor
Robert Bergmann
Joachim Mahler
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Publication of EP1476902A2 publication Critical patent/EP1476902A2/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J5/00—Adhesive processes in general; Adhesive processes not provided for elsewhere, e.g. relating to primers
    • C09J5/06—Adhesive processes in general; Adhesive processes not provided for elsewhere, e.g. relating to primers involving heating of the applied adhesive
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J9/00—Adhesives characterised by their physical nature or the effects produced, e.g. glue sticks
    • C09J9/02—Electrically-conducting adhesives
    • H10W70/417—
    • H10W72/30—
    • H10W90/00—
    • H10W72/01—
    • H10W72/073—
    • H10W72/07331—
    • H10W72/075—
    • H10W72/536—
    • H10W72/5363—
    • H10W72/551—
    • H10W72/884—
    • H10W72/951—
    • H10W74/00—
    • H10W90/291—
    • H10W90/724—
    • H10W90/732—
    • H10W90/734—
    • H10W90/736—
    • H10W90/754—
    • H10W90/756—
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S977/00—Nanotechnology
    • Y10S977/70—Nanostructure
    • Y10S977/81—Of specified metal or metal alloy composition

Definitions

  • the invention relates to an electronic component with an adhesive layer and a method for its production according to the type of the independent claims.
  • Adhesive layers in electronic components are used for a wide variety of tasks.
  • Electronic components are known in which similar materials, such as semiconductor chips, are mechanically connected and stacked by means of an adhesive layer or metallic surfaces are provided with corresponding metallic flat conductors or in that individual ceramic layers are bonded to form a multi-layer ceramic substrate.
  • electronic components are known in which dissimilar materials are joined together via an adhesive layer, for example, 'a semiconductor chip with a metallic chip island, or a semiconductor die to a ceramic substrate or a metallic flat conductor with a ⁇ ceramic substrate.
  • a first aspect of the present invention relates to electronic components with electrically conductive adhesive layers and a further aspect of the invention relates to electronic components with electrically insulating adhesive layers.
  • a disadvantage of conventional adhesive layers is that, in spite of particulate fillers, they have completely isotropic properties with regard to the electrical conductivity and / or the thermal Have conductivity. Due to the isotropic electrical conductivity in an electrically conductive adhesive layer, not only are opposing metallic surfaces electrically connected to one another and short-circuited, but also electrically conductive surfaces arranged next to one another are short-circuited. The same disadvantage arises in the case of isotropically thermally conductive adhesive layers, in which the thermal energy cannot be dissipated in one direction in a targeted manner, but is instead passed on uniformly in all directions.
  • Another disadvantage of filled adhesive layers is their minimum thickness. While the adhesive base mass of an adhesive layer can be provided as thin as desired, depending on the degree of viscosity, in the case of filled adhesive layers which are intended to improve either the thermal properties or the electrical properties of the adhesive base mass, a thickness of 5 or more micrometers is required in order to provide the filler with sufficient thickness and to accommodate concentration in the adhesive base.
  • the object of the invention is to provide an electronic component with an adhesive layer and a method for producing the same, the above disadvantages being overcome and a reduction in the space requirement being possible and the reliability of the adhesive layer being improved. This object is achieved with the subject matter of the independent claims. Advantageous developments of the invention result from the features of the dependent claims.
  • the electronic component has an electrically conductive adhesive layer between metallic surfaces of components of the component.
  • the metallic surfaces are arranged opposite one another.
  • the adhesive of the electrically conductive adhesive layer has agglomerates of electrically conductive nanoparticles. These agglomerates are surrounded by an adhesive base and form electrically conductive paths in the adhesive base.
  • the opposing surfaces are electrically connected to one another via a large number of statistically distributed agglomerates of electrically conductive nanoparticles in the plastic layer.
  • agglomerates of electrically conductive nanoparticles is favored by the favorable ratio between the surface area of the nanoparticles and the volume of the nanoparticles. This property complies with the fact that the minimal dimensions of the particles in the nano range improve their mobility in the adhesive base material. In addition, their affinity for one another is greatly increased due to the larger surface-to-volume ratio for nanoparticles compared to microparticles. On the other hand, these agglomerates of nanoparticles in the adhesive base have the advantage that they can adapt to the distance between two opposite surfaces. Another advantage of such an adhesive layer with agglomerates of electrically conductive nanoparticles is the anisotropy of the electrical conductivity in adhesive layers.
  • each agglomerate is surrounded by an insulating adhesive base mass, there are isolated, electrically conductive paths at the positions of the agglomerates, which point-wise connect the mutually opposite electrically conductive surfaces. Electrically conductive surfaces that are arranged next to one another are not short-circuited to one another due to the anisotropy of the adhesive layer.
  • the adhesive layer can thus successfully short-circuit several metallic surfaces of microscopic dimensions arranged next to one another with correspondingly arranged metallic surfaces of corresponding dimensions. connect.
  • microscopic is understood to mean a dimension that can only be recognized and measured under a light microscope.
  • the electrically conductive nanoparticles have gold, silver, copper, nickel or alloys thereof. These nanoparticles made of the corresponding noble metals, or also of copper and its alloys, have the advantage that their adsorption is particularly pronounced and therefore, on the order of magnitude of nanoparticles, they tend to form agglomerates in an adhesive matrix. Furthermore, the metals gold, silver and copper have a high electrical conductivity.
  • the adhesive layer can have a thickness of less than one micron due to the electrically conductive nanoparticles. With such a thin layer of adhesive, not only is the space requirement improved, but also the space requirement is minimized because a correspondingly small meniscus can form. At the same time, the electrical conductivity of the adhesive layer is compared by a factor of over five Adhesive layers with electrically conductive microparticles improved.
  • Components with different expansion coefficients can differ from one another in their expansion coefficient by a factor of three without there being any risk of damage when the electronic component is subjected to thermal alternating stress, as long as the thickness of the adhesive layer is a multiple of the average diameter of the electrically conductive nanoparticles.
  • the nanoparticle content can be between 30 and 95% by weight. This proportion of nanoparticles corresponds to a degree of filling between approximately 4 and 70% by volume. This means that at least 30% of the volume of the adhesive layer consists of the insulating adhesive base, which ensures that the agglomerates of electrically conductive metallic nanoparticles are completely surrounded by the insulating adhesive base.
  • an anisotropically electrically conductive one is formed
  • Structure which has an insulating effect in the plane of the adhesive layer and orthogonal to the adhesive layer, that is, electrically conductive in the thickness of the adhesive layer.
  • the electrically conductive adhesive layer with electrically conductive nanoparticles is that the agglomerates of nanoparticles can be deformed in the adhesive matrix. Because of this deformability, the length of the conductive paths can adapt to the respective thickness of the adhesive layer, so that differences in distance between the opposite electrically conductive surfaces can be compensated for.
  • the surface of the semiconductor chips is electrically conductive Contact areas are highly staggered in their height or depth, so that this property of the deformability of the electrically conductive agglomerates made of nanoparticles is particularly suitable for connecting contact areas on the active top sides of the semiconductor chips to one another in an electrical component with stacked semiconductor chips.
  • the nanoparticles can have an average diameter between 10 and 200 nanometers.
  • An average diameter of 10 to 50 nanometers is particularly suitable for extremely thin adhesive layers far below one micrometer, while the upper region of 100 to 200 nanometers are intended for adhesive layer thicknesses of approximately 1 micrometer.
  • the electrically conductive adhesive layer can thus be adapted very precisely to the possible distance between the opposite and electrically connected surfaces.
  • the average diameter of the agglomerates of electrically conductive nanoparticles in the adhesive can reach the thickness of the adhesive layer. This ensures that in each area of the adhesive layer a secure connection is made via appropriate conduction paths, which are formed from deformed agglomerates of electrically conductive nanoparticles in the adhesive layer.
  • the adhesive can be an N-methyl- enriched with electrically conductive nanoparticles.
  • This starting material has the advantage that the viscosity of the polyamidoacetic acid ester dissolved in N-methyl-pyrrolidone by the The proportion of N-methyl-pyrrolidone is variable and can be adapted to the size of the nanoparticles.
  • the adhesive has catalyst materials and adhesion promoters in an adhesive base made of polyamide.
  • polyamide is not alone adhesive, so that in particular the addition of an adhesive promotes the adhesive effect of the polyamide matrix.
  • catalyst materials should help accelerate the crosslinking of the polyamide. The addition of catalyst materials and adhesion promoter in conjunction with the electrically conductive nanoparticles thus results in an adhesive which has improved adhesion and a higher crosslinking rate at a reduced crosslinking temperature.
  • At least one of the opposing metallic surfaces can be arranged on a semiconductor chip. This makes it possible to use this adhesive to connect semiconductor chips and their metallic surfaces to metallic surfaces, for example ceramic substrates, or directly to metallic chip islands of a leadframe.
  • At least one of the opposite metallic surface, between which an electrically conductive adhesive layer is to be arranged can be arranged on a ceramic substrate.
  • Electronic components in which at least one of the metallic surfaces has a ceramic substrate have the advantage over electronic components in which, for example, metallic surfaces are arranged on a glass fiber-reinforced circuit board material, that the coefficient of thermal expansion of a ceramic substrate is substantially closer to the coefficient of expansion of a semi-conductor. terchips lies.
  • the adhesive layer can be made with a thickness of less than one micrometer without delamination due to thermal stresses.
  • an adhesive layer made of agglomerates of electrically conductive nanoparticles is therefore particularly suitable for use in stacks of semiconductor chips.
  • Such an adhesive layer can also be used for stacks of ceramic layers to represent a multi-layer ceramic substrate. This means that extremely compact, space-saving electronic components can be realized by stacking similar materials and using an adhesive to form agglomerates made of electrically conductive nanoparticles.
  • a method for producing an electronic component with an electrically conductive adhesive layer between opposing metallic surfaces of components of the component has the following method steps. First, a starting solution is prepared by dissolving a polyamidoacetic acid ester in N-methyl-pyrrolidone. This starting solution is then mixed with catalyst materials and adhesion promoters to form an adhesive solution. This adhesive solution is mixed with electrically conductive nanoparticles to form an electrically conductive adhesive. The adhesive can then be applied to at least one of the upper sides of the components of the electronic component to be bonded are applied and then the components are assembled.
  • the adhesive crosslinks and mechanically connects the components, and if the components have opposite metallic surfaces, these are connected to one another by the agglomerates of electrically conductive nanoparticles that form in the adhesive.
  • This method has the advantage that an adhesive layer can be produced which has anisotropic properties with regard to the electrical conductivity.
  • the adhesive solution is mixed with electrically conductive nanoparticles, due to the high proportion of surface area of the electrically conductive nanoparticles compared to their volume, there is a high degree of affinity between the electrically conductive nanoparticles, which combine to form agglomerates, the agglomerates being surrounded on all sides by the insulating adhesive solution.
  • an adhesive layer is prepared that electrically connects opposing metallic surfaces, while adjacent metallic surfaces of the individual component remain isolated from each other.
  • a temperature for crosslinking the adhesive is above 100 ° C., so that the components are heated to such a temperature in order to achieve the crosslinking of the adhesive to form a firm bond.
  • the crosslinking time and the crosslinking temperature can be reduced by the catalyst materials contained in the adhesive solution.
  • the components that are to be electrically connected are aligned with one another with their metallic surfaces. This step is facilitated by the fact that the adhesive is only to be applied to one of the two tops of the components to be glued.
  • the agglomerates of electrically conductive nanoparticles of gold, silver, copper, nickel or alloys thereof are insulated from one another and arranged statistically distributed in the adhesive layer between the electrically connectable and aligned surfaces of the components before crosslinking.
  • a plurality of metallic surfaces of microscopic dimensions arranged side by side can be electrically connected to oppositely arranged metallic surfaces of the components as soon as the two components have been joined together. If the components consist of semiconductor chips, these can be connected to form a stack of electrically conductive semiconductor chips. Such a stack has a reduced stack height, especially since the agglomerated, electrically conductive nanoparticles, depending on the viscosity of the adhesive matrix and the average diameter of the electrically conductive nanoparticles, can form an adhesive layer which has a thickness of less than one micrometer.
  • very low electrical resistances combined with high electrical conductivities with substitution of solders are realized with the first aspect of the invention if, in the context of this first aspect of the invention, an electrically conductive adhesive with agglomerates of electrically conductive nanoparticles is used.
  • the adhesive material can be used as a buffer for different thermomechanical expansions are used. The smaller the difference in the coefficient of thermal expansion between the components of an electronic component, the more securely fastening with the aid of the adhesive according to the invention is possible. This applies particularly to chip-on-chip connections when an electrical connection between the two chips is required.
  • metallized surfaces can be covered with semiconductor chips as semiconductor chip islands on a ceramic substrate and an electrically conductive adhesive layer can be achieved at the same time.
  • Another aspect of the invention relates to an electronic component with a thermally conductive and electrically insulating adhesive layer between surfaces of components of the component.
  • the surfaces are arranged opposite each other.
  • the adhesive of this adhesive layer has agglomerates of thermally conductive, electrically insulating nanoparticles. These agglomerates are surrounded by an adhesive base in which thermally conductive paths are arranged. These thermally conductive paths form thermal connections at points for the opposing surfaces, a large number of these agglomerates being statistically distributed in the adhesive layer.
  • Such a component has the advantage that it can dissipate the heat loss of the electronic components contained in the electronic component in a direction predetermined by the adhesive layers.
  • This preferred direction of heat dissipation in an electronic component can originate from the active top side of a semiconductor chip and can be led to one of the outer sides of the electronic component via corresponding metal cooling surfaces become.
  • the semiconductor chip is attached to the metal cooling surface with the aid of an electrically conductive and thermally insulating adhesive layer.
  • a plurality of metallic surfaces of microscopic dimensions arranged side by side can be connected to oppositely arranged metallic surfaces of the components in a short-circuit-free and thermally conductive manner.
  • the electronic component has particles of silicon dioxide, aluminum nitride, boron nitride, polytetrafluoroethylene or mixtures thereof.
  • These nanoparticles have the advantage that, compared to the surrounding adhesive base, they combine to form thermally conductive agglomerates due to their high proportion of surface in relation to the particle volume.
  • silicon dioxide, aluminum nitride and boron nitride these agglomerates consist of thermally conductive ceramic particles which as the unit cell each have only two types of atom and thus have a high thermal coupling ability.
  • the improvement of thermal conductivity speed of the adhesive base material by polytetrafluoroethylene is essentially due to the crystallinity of the tetrafluoroethylene consisting of polymers.
  • the adhesive layer including its electrically insulating and thermally conductive nanoparticles, has a thickness of less than one micrometer. Such thin adhesive layers cannot be reached with microparticles that have an average diameter in the micrometer range. In addition, the ability to form agglomerates between micrometer particles is extremely low compared to nanoparticles due to the increased volume compared to the surface.
  • the buffering compensation between the components which consist of materials with different thermal expansion coefficients, is limited, so that the thermal expansion coefficients of the components can differ by up to a factor of three.
  • the smaller the difference in the thermal expansion coefficient between the components the thinner an adhesive layer made from agglomerates of thermally conductive and electrically insulating nanoparticles.
  • the proportion by weight of the electrically insulating and thermally conductive nanoparticles in the adhesive layer can be between 30 and 90% by weight. Based on the above-mentioned thermally conductive, but electrically insulating materials, which have a specific weight between 2 and 3.3, the volume fraction of thermally conductive nanoparticles is between 4 and 70 vol. %. Thus, with a nanoparticle content between 30 and 95% by weight, a non-conductive, thermally insulating volume remains in the adhesive layer from adhesive base material of 30 to 95 vol.%, which surround the individual thermally conductive paths made of agglomerates of thermally conductive and electrically insulating nanoparticles. In the case of adhesive layers less than a micrometer thick, this results in an adhesive layer with anisotropic thermal conductivity.
  • the thermally conductive and electrically insulating nanoparticles have an average diameter between 10 and 200 nanometers. Nanoparticle diameters between 10 and 50 nanometers can be used for low-viscosity adhesive bases that are equal to the viscosity of the water, while nanoparticles with an average diameter between 50 and 200 nanometers can be used successfully for thicker adhesive layers with higher viscosity.
  • the average diameter of the agglomerates is larger than the thickness of the adhesive layer. This also ensures that each of the agglomerates that form contributes to the thermal conductivity between opposite surfaces. At the same time, these agglomerates have the property that they are easily deformable and adapt to the distance between the two opposite, thermally bonded surfaces.
  • an adhesive base material has adhesive catalyst materials and adhesion promoters if a polyamide is used as the adhesive base material.
  • Polyamides do not show any adhesive properties by nature, so that only through the Adhesion promoter an adhesive can arise.
  • the catalyst materials contained in addition to the thermally conductive and electrically insulating nanoparticles serve to accelerate the crosslinking of the adhesive layer to form a polyamide and to reduce the crosslinking temperature.
  • the opposing surfaces can be arranged on semiconductor chips if the electronic component has a stack of semiconductor chips. However, at least one of the opposing surfaces can also belong to a semiconductor chip, while the other of the surfaces belongs to a ceramic substrate or a glass fiber-reinforced printed circuit board.
  • ceramic substrates can be connected to the semiconductor chip using very thin adhesive layers of less than a micrometer thickness, especially since the difference in the expansion coefficient does not exceed a factor of three.
  • it becomes problematic with printed circuit board materials since some printed circuit board materials far exceed the factor of three in the expansion coefficient. In this case there is a risk of delamination of the semiconductor chip from the printed circuit board.
  • a method for producing an electronic component with a thermally conductive adhesive layer between opposite surfaces of components of the component has the following method steps. First, one
  • This method has the advantage that electronic components are produced which have components which are thermally connected to one another but are electrically insulated from one another.
  • the thermal connection is made via thermally conductive
  • Such an anisotropy in the thermal conductivity has the advantage that the heat can be dissipated selectively in one direction from a heat-generating element in the electronic component to the outside of the electronic component and, for example, to a cooling plate without an electrical short circuit occurring.
  • the adhesive is crosslinked at temperatures above 100 ° C. This low temperature has the advantage that the individual component components are not damaged by the effects of temperature.
  • the surfaces of the components are aligned with one another before the surfaces are joined. Only after the surfaces to be thermally bonded to one another and precisely aligned can the adhesive be crosslinked at the appropriate crosslinking temperature.
  • the electrically insulating and thermally conductive nanoparticles are agglomerated even before the adhesive is crosslinked. ized so that when the surfaces to be bonded and thermally bonded are brought together, these agglomerates can become deformed and thus can create thermally conductive paths between the points to be joined. Prior to crosslinking, these agglomerates are arranged isolated from one another and distributed statistically in the plastic layer between the surfaces of the components to be thermally coupled, the thermally conductive nanoparticles essentially comprising silicon dioxide, aluminum nitride, boron nitride, polytetrafluoroethylene or mixtures thereof. This has the advantage that the agglomerates can still deform and adapt to the distance between the opposite surface. The agglomerates of thermally conductive and electrically insulating nanoparticles remain isolated from one another and thus connect several metal surfaces arranged opposite one another without forming thermal bridges to adjacent surfaces.
  • the second aspect of the invention results in very low thermal resistances, since the adhesive bonds can be carried out with very small layer thicknesses and only with a low thermal resistance.
  • the prerequisite also applies here that the components to be bonded as substrates or as semiconductor chips must not differ too much from one another in their thermal expansion coefficients.
  • the adhesive material with such a thin adhesive layer has only a reduced buffer effect for different thermomechanical expansions.
  • the adhesive according to the invention and an adhesive layer according to the invention can be used particularly advantageously in chip-on-chip applications if an electrically insulating connection between the two chips is desired and chips on semiconductor chip islands can also be used Fasten the ceramic substrate, since the differences between the coefficients of thermal expansion can be buffered by the thickness of the adhesive layer.
  • FIG. 1 shows a schematic cross section through an electronic component of a first embodiment of the invention
  • FIG. 2 shows a schematic cross section through an electronic component of a second embodiment of the invention
  • FIG. 3 shows a schematic cross section through an electronic component of a third embodiment of the invention, which has a stack of two semiconductor chips,
  • FIG. 4 shows a schematic cross section through an electronic component of a fourth embodiment of the invention, which has a stack of several semiconductor chips.
  • Figure 1 shows a schematic cross section through an electronic component 1 of a first embodiment of the invention.
  • the reference number 2 denotes an adhesive layer which connects metallic surfaces 3 of two ' components 4 of the electronic component 1 to one another.
  • the reference number 5 denotes an adhesive of the adhesive layer 2 and the reference number 6 denotes agglomerates which have nanoparticles 7.
  • the agglomerates 6 are surrounded in the adhesive 5 of the adhesive layer 2 by an adhesive base.
  • the adhesive layer 2 extends within the agglomerates 6 paths, the electrical and thermal properties of which differ from the electrical and thermal properties of the surrounding adhesive base material 8.
  • the reference number 10 denotes one of the components 4 of the electronic component 1 in the form of a semiconductor chip.
  • the reference numeral 11 denotes a ceramic substrate as the second component 4, of which a metallic surface 3 is arranged opposite the metallic surface 3 of the semiconductor chip 10.
  • the ceramic plate 11 has on the upper side 13 facing the semiconductor chip a rewiring level 14, the
  • Rewiring lines 15 are connected via bonding wires 16 to contact areas 17 on the active top side 18 of the semiconductor chip 10.
  • the back 19 of the semiconductor chip 10 is metallized and has the metallic surface 3.
  • chip island 20 on the ceramic substrate 11 is a semiconductor 'which is connected through a via 21 with a redistribution layer 24 on the underside 28 of the ceramic substrate.
  • the conversion The wiring level 24 on the underside 28 of the ceramic substrate 11 has, in addition to rewiring lines 15, external contact surfaces 30 on which external contacts 31 are arranged.
  • the external contacts 31 are solder balls which protrude from the underside 28 of the ceramic substrate and are separated from one another by a solder stop layer 32.
  • the adhesive layer 2 is filled with electrically conductive nanoparticles 7.
  • the nanoparticles consist of electrically conductive material, such as gold, silver, copper, nickel or mixtures thereof. These electrically conductive nanoparticles, which take up to 70% by volume of the adhesive layer, agglomerate in the non-crosslinked state of the surrounding adhesive base material 8 to form agglomerates 6, which can be deformed in the non-crosslinked state of the adhesive 5 of the adhesive layer 2.
  • these agglomerates 6 of electrically conductive nanoparticles 7 form electrically conductive paths 9, so that the adhesive layer has an anisotropy in its effect as an electrical connection between the opposing metallic surfaces 3. While the adhesive layer 2 has an insulating effect in the horizontal direction, it connects via the layer thickness d
  • Adhesive layer 2 the back of the semiconductor chip 10 with the -metallic chip island 20 of the ceramic substrate 11.
  • this electrical connection is to be interrupted and only a thermal connection to the chip island 20 is to dissipate heat via the chip island 20, to the through contact 21 and to the external contact 31.
  • the nanoparticles form 27 also from agglomerates 26, but the nanoparticles 27 are made of electrically insulating but thermally conductive material, such as silicon dioxide, boron nitride and polytetrafluoroethylene or mixtures thereof.
  • the adhesive layer thickness d can be minimized to less than one micrometer.
  • the average diameter of the nanoparticles 7 and 27 is between 10 and 200 nanometers, while the average diameter of an agglomerate 6 and 26 made of nanoparticles 7 and 27 is greater than the layer thickness d.
  • a multiplicity of connection points which are statistically distributed in the adhesive layer 2 are produced between the opposite surfaces 3 and 23.
  • the deformability of the agglomerates 6 and 26 is used as long as the adhesive base material is not crosslinked.
  • components 10 and 11 are heated to a crosslinking temperature above 100 ° C.
  • a ceramic substrate 11 is first produced with the rewiring levels 15 on the top 13 and the bottom 28 and with through contacts 21.
  • a semiconductor chip island 20 is provided on the rewiring level 15 in the area of the semiconductor chip 10 to be attached, and an adhesive 5 filled with nanoparticles is applied thereon.
  • the adhesive 5 itself is produced from a starting solution in which a polyamidoacetic acid ester is dissolved in N-methylpyrrolidone. This initial solution is then mixed with catalyst materials and adhesion promoters to form an adhesive solution. Finally, either electrically conductive or electrically insulating nanoparticles 7 and 27 are mixed into this adhesive solution. These nanoparticles cones 7 and 27 agglomerate to form larger agglomerates 6 and 26 which are larger in their average diameter than the adhesive layer 2 to be produced.
  • This adhesive 5 is then applied to the semiconductor chip island 20, the semiconductor chip 10 is placed on it and the ceramic substrate 11 with the semiconductor chip 10 is exposed to a crosslinking temperature above 100 ° C. After the adhesive 5 has been crosslinked, the bonding wire 16 can be bonded to the contact areas 17 on the active top side 18 of the semiconductor chip 10 and connected to the rewiring lines 14 on the top side 13 of the ceramic substrate 11.
  • a plastic housing compound 33 is then applied to the top 13 of the ceramic substrate 11, which at the same time the semiconductor chip 10, the adhesive layer 2 and the
  • Bond wires 16 envelops.
  • external contacts 31 are applied to the external contact surfaces 30 provided for this purpose.
  • the solder stop layer 32 can either be applied directly during the production of the ceramic substrate 11 or it is applied to the underside 28 of the ceramic substrate 11 before the external contacts 31 are applied, leaving the external contact surfaces 30 free.
  • the advantage of the embodiment according to FIG. 1 is that either the semiconductor chip 10 can be connected either thermally and electrically insulating to the external contact 31 or in an electrically conductive manner to the external contact. For this purpose, only the material of the nanoparticles 7 or 27 in the adhesive layer 2 must be selected appropriately.
  • FIG. 2 shows a schematic cross section through an electronic component 1 of a second embodiment of the invention.
  • Components with the same functions as in FIG. 1 are marked with the same reference numerals and not discussed separately.
  • the components 4 of the electronic component 1 are formed from a semiconductor chip 10 and a metallic chip island 20.
  • the metallic chip island 20 simultaneously forms an outside of the housing 34 of the semiconductor chip.
  • the semiconductor chip island 20 can either serve as a ground contact, in which case the adhesive layer 2 will have agglomerates 6 which consist of electrically conductive nanoparticles 7.
  • the agglomeration of the nanoparticles 27 ensures that the thermal conductivity of the adhesive layer 2 is anisotropic and is oriented in the direction of the chip island 20 and thus on the heat sink.
  • the chip island 20 and the metallization sockets provided for the external contacts 31 are first galvanically deposited on a metal carrier (not shown).
  • the surface of the base intended for the external contacts 31 is then provided with a bondable coating 35.
  • Such a bondable coating 35 in turn has several layers, namely a layer made of a copper diffusion-inhibiting nickel layer directly on the base for the external contact 30 made of copper and then a noble metal layer on the Nickel layer for secure bonding.
  • Such a structuring has the advantage that a diffusion of copper ions into the connection with the bonding wire 16 is prevented and thus premature embrittlement of the bond connection is avoided.
  • the adhesive 5 can then be applied to the chip island 20 in a thickness that is less than the average diameter of the agglomerates of nanoparticles.
  • the bonding wires 16 are applied to the contact surfaces 17 on the active top side 18 of the semiconductor chip 10 and connected to the bondable coating 35.
  • the entire metal carrier (not shown) is covered with a plastic housing compound 33, which embeds both the adhesive layer 2 and the semiconductor chip 10 and the bonding wires 16.
  • the metal carrier (not shown) can then be etched away, so that the exemplary embodiment shown here in cross section is present.
  • the adhesive 5 is produced in the same way as in the first exemplary embodiment, so that a listing of the production steps can be omitted.
  • FIG. 3 shows a schematic cross section through an electronic component 1 of a third embodiment of the invention, which has a stack 12 of two semiconductor chips 10.
  • Components with the same functions as in the previous figures are identified by the same reference symbols and are not discussed separately.
  • the two semiconductor chips 10 have contact surfaces 17 on their active top side 18 and carry on this top side te an insulating redistribution layer 36.
  • Rewiring lines 15 are arranged on the insulating redistribution layer 36. These rewiring lines connect the contact areas 17 to metallic areas 3 on the insulating rewiring layer 36.
  • the metallic areas 3 on the two semiconductor chips 10 are aligned and arranged in such a way that they lie opposite one another.
  • the bond channels 37 of the two semiconductor chips 10, which have the contact surfaces 17, are arranged offset with respect to one another and covered by a plastic housing compound 33. In the rest,
  • a region between the two semiconductor chips 10 is an adhesive layer 2 composed of an adhesive 5 which has an anisotropic electrical conductivity.
  • This anisotropic electrical conductivity is achieved in that agglomerates 6 of electrically conductive nanoparticles 7 are arranged in an adhesive matrix 8.
  • the electrically conductive agglomerates 6 are insulated from one another by the adhesive base compound 8, so that the individual outer contact surfaces 30 lying opposite one another are electrically connected by paths 9 through the agglomerates 6.
  • the adhesive 5 can consequently be applied over a large area and in layers without being selectively concentrated on the opposite metallic surfaces 3. Rather, the selectivity occurs automatically through the anisotropy of the electrically conductive adhesive layer.
  • the two semiconductor chips are connected with their corresponding external contact surfaces 30 and thus with their contact surfaces 17 via the rewiring lines 15.
  • a solder resist layer 32 can be placed between the outer contact surfaces 30. ensure that the rewiring lines 14 remain insulated and only corresponding external contact areas 30 are connected to one another via the electrically conductive agglomerates.
  • FIG. 4 shows a schematic cross section through an electronic component 1 of a fourth embodiment of the invention, which has a stack 12 of a plurality of semiconductor chips 10.
  • FIG. 4 shows a schematic cross section through an electronic component 1 of a fourth embodiment of the invention, which has a stack 12 of a plurality of semiconductor chips 10.
  • both the n-type cathode 38 and the p-type anode 39 are metallized on their respective outer sides, and for such a cascade connection of diodes, the respective anode 39 with the cathode 38 arranged above it is now connected via an electrically conductive adhesive layer 2 next diode electrically connected.
  • the adhesive layer has agglomerates 6 made of electrically conductive nanoparticles 7. This creates an anisotropic connection between the individual diodes through the adhesive layer 2, the thickness d of which is less than a micrometer.
  • a flat conductor is arranged on the underside of the lowermost diode as a common cathode 38 of the diode cascade of this electronic component 1 and is modeled in a projecting manner from the diode cascade to form a pin.
  • a common anode 39 is correspondingly attached to the upper side 41 of the diode cascade and is also structured so as to protrude into a pin.

Landscapes

  • Chemical & Material Sciences (AREA)
  • Organic Chemistry (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Abstract

L'invention concerne un composant électronique doté d'une couche adhésive (2) entre les surfaces métalliques (3) d'éléments (4) du composant (1), ces surfaces métalliques (3) étant disposées l'une en face de l'autre. L'adhésif (5) de la couche adhésive (2) contient des agglomérats (6, 26) de nanoparticules (7, 27) qui forment des voies (9, 29) dans la masse de l'adhésif (8), entourées par une masse d'adhésif. La présente invention porte également sur un procédé pour réaliser ce composant (1).
EP03742489A 2002-02-18 2003-02-14 Composant electronique dote d'une couche adhesive et procede de fabrication associe Withdrawn EP1476902A2 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE10206818 2002-02-18
DE10206818A DE10206818A1 (de) 2002-02-18 2002-02-18 Elektronisches Bauteil mit Klebstoffschicht und Verfahren zur Herstellung derselben
PCT/DE2003/000458 WO2003071596A2 (fr) 2002-02-18 2003-02-14 Composant electronique dote d'une couche adhesive et procede de fabrication associe

Publications (1)

Publication Number Publication Date
EP1476902A2 true EP1476902A2 (fr) 2004-11-17

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EP03742489A Withdrawn EP1476902A2 (fr) 2002-02-18 2003-02-14 Composant electronique dote d'une couche adhesive et procede de fabrication associe

Country Status (4)

Country Link
US (1) US7476981B2 (fr)
EP (1) EP1476902A2 (fr)
DE (1) DE10206818A1 (fr)
WO (1) WO2003071596A2 (fr)

Families Citing this family (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4067507B2 (ja) * 2003-03-31 2008-03-26 三洋電機株式会社 半導体モジュールおよびその製造方法
DE10320090A1 (de) 2003-05-05 2004-08-26 Infineon Technologies Ag Elektrisches Bauteil mit Leitungen aus karbonisiertem Kunststoff, sowie Verfahren und Vorrichtung zu seiner Herstellung
US7112472B2 (en) * 2003-06-25 2006-09-26 Intel Corporation Methods of fabricating a composite carbon nanotube thermal interface device
DE102005020453B4 (de) * 2005-04-29 2009-07-02 Infineon Technologies Ag Halbleiterbauteil mit einer Flachleiterstruktur und Verfahren zur Herstellung einer Flachleiterstruktur und Verfahren zur Herstellung eines Halbleiterbauteils
EP1818987B1 (fr) * 2006-02-10 2011-12-07 ELMOS Semiconductor AG Agencement de composant semi-conducteur
JP2007295697A (ja) * 2006-04-24 2007-11-08 Toyota Motor Corp 回転電機の固定子および固定子に用いられる部品
US8617913B2 (en) 2006-08-23 2013-12-31 Rockwell Collins, Inc. Alkali silicate glass based coating and method for applying
US8637980B1 (en) 2007-12-18 2014-01-28 Rockwell Collins, Inc. Adhesive applications using alkali silicate glass for electronics
US8581108B1 (en) 2006-08-23 2013-11-12 Rockwell Collins, Inc. Method for providing near-hermetically coated integrated circuit assemblies
US8084855B2 (en) 2006-08-23 2011-12-27 Rockwell Collins, Inc. Integrated circuit tampering protection and reverse engineering prevention coatings and methods
US7915527B1 (en) 2006-08-23 2011-03-29 Rockwell Collins, Inc. Hermetic seal and hermetic connector reinforcement and repair with low temperature glass coatings
US8076185B1 (en) * 2006-08-23 2011-12-13 Rockwell Collins, Inc. Integrated circuit protection and ruggedization coatings and methods
US20090122389A1 (en) 2007-11-14 2009-05-14 E Ink Corporation Electro-optic assemblies, and adhesives and binders for use therein
US8217482B2 (en) * 2007-12-21 2012-07-10 Avago Technologies General Ip (Singapore) Pte. Ltd. Infrared proximity sensor package with reduced crosstalk
DE102008028300B4 (de) * 2008-06-13 2021-10-07 Tdk Electronics Ag Leiterplatte mit flexiblem Bereich und Verfahren zur Herstellung
DE102008030843B4 (de) * 2008-06-30 2021-08-19 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung Optoelektronische Anordnung sowie Verfahren zur Herstellung einer optoelektronischen Anordnung
US8119040B2 (en) 2008-09-29 2012-02-21 Rockwell Collins, Inc. Glass thick film embedded passive material
US8420999B2 (en) * 2009-05-08 2013-04-16 Avago Technologies Ecbu Ip (Singapore) Pte. Ltd. Metal shield and housing for optical proximity sensor with increased resistance to mechanical deformation
JP5679696B2 (ja) * 2009-05-22 2015-03-04 日東電工株式会社 紫外線硬化型粘着剤組成物、粘着剤層、粘着シートおよびその製造方法
US9525093B2 (en) 2009-06-30 2016-12-20 Avago Technologies General Ip (Singapore) Pte. Ltd. Infrared attenuating or blocking layer in optical proximity sensor
US8779361B2 (en) * 2009-06-30 2014-07-15 Avago Technologies General Ip (Singapore) Pte. Ltd. Optical proximity sensor package with molded infrared light rejection barrier and infrared pass components
US8957380B2 (en) * 2009-06-30 2015-02-17 Avago Technologies General Ip (Singapore) Pte. Ltd. Infrared attenuating or blocking layer in optical proximity sensor
US8716665B2 (en) * 2009-09-10 2014-05-06 Avago Technologies General Ip (Singapore) Pte. Ltd. Compact optical proximity sensor with ball grid array and windowed substrate
US9733357B2 (en) 2009-11-23 2017-08-15 Avago Technologies General Ip (Singapore) Pte. Ltd. Infrared proximity sensor package with improved crosstalk isolation
US8841597B2 (en) 2010-12-27 2014-09-23 Avago Technologies Ip (Singapore) Pte. Ltd. Housing for optical proximity sensor
US8643165B2 (en) 2011-02-23 2014-02-04 Texas Instruments Incorporated Semiconductor device having agglomerate terminals
DE102012206362B4 (de) * 2012-04-18 2021-02-25 Rohde & Schwarz GmbH & Co. Kommanditgesellschaft Schaltungsanordnung zur thermisch leitfähigen Chipmontage und Herstellungsverfahren
US9960140B2 (en) * 2013-11-11 2018-05-01 Nippon Steel & Sumitomo Metal Corporation Metal joining structure using metal nanoparticles and metal joining method and metal joining material
US9939596B2 (en) * 2015-10-29 2018-04-10 Samsung Electronics Co., Ltd. Optical integrated circuit package
US11031364B2 (en) 2018-03-07 2021-06-08 Texas Instruments Incorporated Nanoparticle backside die adhesion layer
DE102019111962A1 (de) * 2019-05-08 2020-11-12 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung Elektronisches Bauelement und Verfahren zur Herstellung eines elektronischen Bauelements

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2902002A1 (de) 1979-01-19 1980-07-31 Gerhard Krause Dreidimensional integrierte elektronische schaltungen
EP0265077A3 (fr) * 1986-09-25 1989-03-08 Sheldahl, Inc. Une colle anisotropique pour lier des composants électriques
CA1307594C (fr) * 1988-06-10 1992-09-15 Kenneth B. Gilleo Circuit electronique multicouche et methode de fabrication
JP2576472Y2 (ja) * 1992-02-28 1998-07-09 アルケア株式会社 整形外科材料用包装袋
DE19517062A1 (de) * 1994-06-29 1996-01-25 Bosch Gmbh Robert Anisotrop leitender Kleber und Verfahren zur Herstellung eines anisotrop leitenden Klebers
EP0767964B1 (fr) 1994-06-29 1998-10-21 Robert Bosch Gmbh Adhesif conducteur anisotrope et procede de production d'un adhesif conducteur anisotrope
US5780101A (en) 1995-02-17 1998-07-14 Arizona Board Of Regents On Behalf Of The University Of Arizona Method for producing encapsulated nanoparticles and carbon nanotubes using catalytic disproportionation of carbon monoxide
US6538801B2 (en) * 1996-07-19 2003-03-25 E Ink Corporation Electrophoretic displays using nanoparticles
US6255738B1 (en) * 1996-09-30 2001-07-03 Tessera, Inc. Encapsulant for microelectronic devices
US5852083A (en) 1997-05-29 1998-12-22 Basf Corporation Process for making hot melt adhesives using water soluble substituted lactam/polymer solutions as feedstocks
FR2768433B1 (fr) * 1997-09-18 1999-11-12 Atochem Elf Sa Copolyamides et compositions de polyamides, procede de fabrication et applications
US6028354A (en) * 1997-10-14 2000-02-22 Amkor Technology, Inc. Microelectronic device package having a heat sink structure for increasing the thermal conductivity of the package
DE19756887A1 (de) 1997-12-19 1999-07-01 Siemens Ag Kunststoffverbundkörper
DE10064411A1 (de) * 2000-12-21 2002-06-27 Giesecke & Devrient Gmbh Elektrisch leitfähige Verbindung zwischen einem Chip und einem Koppelelement sowie Sicherheitselement, Sicherheitspapier und Wertdokument mit einer solchen Verbindung
US6884833B2 (en) * 2001-06-29 2005-04-26 3M Innovative Properties Company Devices, compositions, and methods incorporating adhesives whose performance is enhanced by organophilic clay constituents
US6911385B1 (en) * 2002-08-22 2005-06-28 Kovio, Inc. Interface layer for the fabrication of electronic devices

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO03071596A2 *

Also Published As

Publication number Publication date
WO2003071596A2 (fr) 2003-08-28
WO2003071596A3 (fr) 2004-04-22
US7476981B2 (en) 2009-01-13
US20060017069A1 (en) 2006-01-26
DE10206818A1 (de) 2003-08-28

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