EP1421456B1 - Regulateur de tension a correction de reponse en frequence - Google Patents

Regulateur de tension a correction de reponse en frequence Download PDF

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Publication number
EP1421456B1
EP1421456B1 EP02754318A EP02754318A EP1421456B1 EP 1421456 B1 EP1421456 B1 EP 1421456B1 EP 02754318 A EP02754318 A EP 02754318A EP 02754318 A EP02754318 A EP 02754318A EP 1421456 B1 EP1421456 B1 EP 1421456B1
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EP
European Patent Office
Prior art keywords
voltage regulator
output
frequency
input
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
EP02754318A
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German (de)
English (en)
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EP1421456A2 (fr
Inventor
Bernhard Schaffer
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Infineon Technologies AG
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Infineon Technologies AG
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Filing date
Publication date
Priority claimed from DE10149907A external-priority patent/DE10149907A1/de
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Publication of EP1421456A2 publication Critical patent/EP1421456A2/fr
Application granted granted Critical
Publication of EP1421456B1 publication Critical patent/EP1421456B1/fr
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/575—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices characterised by the feedback circuit
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor

Definitions

  • the invention relates to a voltage regulator according to the preamble of the preamble of claim 1.
  • Fig. 2 generally shows a schematic of a voltage regulator 12 known from the prior art.
  • a reference voltage Uref a control amplifier 1, z. B. formed as an operational amplifier, a control transistor Q, the z. B. may be a FET or a bipolar transistor, the der.Regeltransistor Q in Fig. 2 outlined as a controlled current source.
  • a general voltage control loop includes a load according to Fig. 2 a load resistor RL, an external buffer capacitance CL and, at least in certain cases, an internal voltage divider R1, R2.
  • the buffering capacity CL may also be a purely parasitic capacity.
  • the DC gain of an open loop in the small signal range is composed of several factors.
  • the DC voltage gain of the control amplifier 1 is in the range between 40 and 60 dB. This amount results from the requirements for the static control deviation.
  • the control transistor Q in conjunction with the load resistor RL and the voltage divider R1, R2 provides a contribution in the range between 0 and 30 dB for amplification, depending on the transistor Q used, the ohmic load resistor RL and the supply voltage.
  • Fig. 3 shows both a block diagram of a closed loop and a block diagram of an open loop.
  • the open loop transfer function sometimes referred to as the "open loop transfer function"
  • the pole frequency fp generally defines the cut-off frequency of a low-pass transfer function of the type 1 / (1 + s / p) in control technology, at which an attenuation of 3 dB and a phase post-rotation of 45 ° occur.
  • the transit frequency ft is the 0 dB cutoff frequency of a transfer function. At the transit frequency ft, signals are not amplified or attenuated in magnitude.
  • Poles in the open loop transfer function are as follows:
  • the control amplifier 1 has a dominant pole fp0 whose frequency can be placed within certain limits, wherein a dependence on the input capacitance of the control transistor Q and the allowable power consumption of the control amplifier 1 consists.
  • the control transistor Q in conjunction with the load resistor RL and the load capacitance (buffer capacity) CL provides a variable pole fp1, the position of which can vary by several decades depending on the load. In the frequency range >> 1 MHz are parasitic poles of the control amplifier 1 (fp2 and others).
  • L s A ⁇ 0 1 + s / sp ⁇ 0 ⁇ 1 + s / sp ⁇ 1 ⁇ 1 + s / sp ⁇ 2 ,
  • the pole of the control amplifier 1 is sp0.
  • sp2 denotes the parasitic pole and the expression ( ⁇ ⁇ ⁇ ) denotes the resistance which is brought about by a parallel connection of the resistors indicated on both sides of the symbol ⁇ .
  • the high DC gain A0 associated with multiple poles causes the phase of the open loop transfer function to be shifted 180 ° and more upon reaching the transit frequency ft. This is in Fig. 4 represented with the curve for the uncorrected frequency response.
  • the goal of the frequency response correction is to achieve a phase margin of the open control loop of> 45 °.
  • the zero point in the open loop transfer function is realized by introducing an internal series resistor into the load circuit of the voltage regulator.
  • a circuit which falls under the generic art for the invention, is in Fig. 5 shown.
  • the voltage regulator 13 according to Fig. 5 has a variable gain amplifier 1. This has two inputs 3, 4 and an output 5. Furthermore, the voltage regulator 13 after Fig. 5 a controlled current source Q and a voltage regulator output 6 for providing a regulated output voltage Uout.
  • the controlled current source Q can z. B. be a transistor (FET or bipolar transistor).
  • the first input 3 of the control amplifier 1 is connected to a reference voltage source Uref.
  • the second input 4 of the control amplifier 1 is connected to an electrical feedback path which leads outside of the control amplifier 1 from the output 5 of the control amplifier 1 via the controlled current source Q to the second input 4 of the control amplifier 1.
  • an electrical output path to the voltage regulator output 6 from.
  • an internal ohmic resistor RZ is serially arranged between the branch A and the voltage regulator output 6. This internal ohmic resistance RZ is also sometimes referred to as "series resistance in the load circuit".
  • the in Fig. 5 Voltage regulator 13 shown further includes a voltage divider circuit R1, R2, which is optional and, as all are related to FIG Fig. 5 described circuit details with the exception of the internal ohmic resistance RZ, in relation to the present invention is not one of the mandatory generic features.
  • the invention is therefore based on the object, starting from the generic voltage regulator to provide a voltage regulator, which overcomes the above-described Albertwoodsproblem with consistently good stability with sufficient phase margin.
  • this object is achieved by a voltage regulator according to claim 1.
  • Overcoming the Fehlwoodsproblems takes place in the voltage regulator according to the invention by Fehlwoodskompensation.
  • the control is tapped both before and after the internal ohmic resistance and the voltage regulator designed such that act in different frequency ranges different control paths.
  • For the frequency range above the predetermined frequency is through Tapped at the first point, which is separated from the second point by the internal ohmic resistance, regulated, whereby the zero point at fz becomes effective and the phase pre-rotation (frequency response correction) ensured.
  • the Fehlwoodskompensation is realized by means of a crossover network 2 in the feedback path.
  • the coupling factors of the crossover 2 are chosen so that no additional pole can arise around the crossover frequency fw.
  • the particularly preferred embodiment of the voltage regulator according to the invention according to claim 8 is particularly suitable for the implementation as an integrated circuit, since the N individual resistors each seen individually only a low current carrying capacity of I / N must have.
  • the frequency at which the transfer function has a zero be influenced more targeted.
  • the internal ohmic resistor RZ is designed as an integrated component, which is particularly cost-effective.
  • a first embodiment of a voltage regulator 10 according to the invention which in Fig. 1 1, comprising a control amplifier 1 designed as an operational amplifier, which has two inputs 3, 4 and an output 5, a controlled current source Q and a voltage regulator output 6 for providing a regulated output voltage Uout.
  • controlled current source Q is in the present embodiment, a transistor, such as an NFET, PFET, npn bipolar transistor or pnp bipolar transistor.
  • the first input 3 of the control amplifier 1 is connected to a reference voltage source Uref.
  • the second input 4 of the control amplifier 1 is connected to an electrical feedback path which leads outside of the control amplifier 1 from the output 5 of the control amplifier 1 via the transistor Q to the second input 4 of the control amplifier 1.
  • an electrical output path to the voltage regulator output 6 is serially arranged between the branch A and the voltage regulator output 6, which is referred to below as "internal resistance RZ".
  • the crossover 2 is connected in series with its first input 7 and its output C in the electrical feedback path that its first input 7 in the direction of the branch A of the electrical output path and its output C in the direction of the second input 4 of the control amplifier 1 has.
  • the second input 8 of the crossover network 2 is connected to a further electrical path, which between the internal ohmic resistor RZ and the voltage regulator output 6 at point B (see Fig. 1 ) branches off the electrical output path.
  • the said further electrical path in the embodiment of the voltage regulator 10 of the invention Fig. 1 a voltage divider circuit consisting of two ohmic resistors R1, R2.
  • the second input 8 of the crossover network 2 is connected between the two resistors R1, R2 of the voltage divider circuit to the further electrical path.
  • the crossover 2 is designed so that it transmits signals having frequencies above a predetermined crossover frequency fw from its first input 7 to its output C. Signals with frequencies below the predetermined crossover frequency fw are transmitted from the second input 8 of the crossover 2 to its output C.
  • the respective other internal path of the crossover network 2 is essentially blocked for signals from the respective other frequency range. Relative to the selected node name in Fig. 1 this means that the crossover 2 transmits signals with frequencies «fw from B to C and signals with frequencies» fw from A to C.
  • the operation of the crossover 2 in the present circuit is the following:
  • the error voltage Uf is compensated for the frequency range «fw by tapping at point B and thus can not be measured at the load.
  • For the frequency range »fw is controlled by tapping at point A, whereby the zero point at fz becomes effective and ensures the phase pre-rotation (frequency response correction).
  • this requires that fz ⁇ ft be selected.
  • Fig. 1 is the maximum coupling factor of the crossover 2 of A ⁇ C is greater than or at least equal to the maximum coupling factor of the crossover 2 of B ⁇ C chosen so as not to create an additional pole by fw.
  • the crossover 2 is realized in the present embodiment circuitry as a passive RC filter.
  • Fig. 6 shows a second embodiment of the voltage regulator 11 according to the invention, in which the voltage regulator 11 is designed as an integrated circuit.
  • the sum of the voltage divider resistors R1 + R2 is 150 k ⁇ .
  • fp0 of the control amplifier 1 is by design 100 kHz.
  • the internal resistance RZ is set to 0.32 ⁇ .
  • Fig. 4 The corresponding frequency response is in Fig. 4 represented (curve "frequency response correction by zero").
  • the frequency response has enough phase reserve in every permissible load case 9 on.
  • the frequency divider 2 is essentially formed from R1, R2 ', R2 "and CF. Approximately, fw ⁇ 1 / (2 * ⁇ * CF * (R2" ⁇ (R1 + R2'))) ,
  • the capacity CF is also integrated on the chip. It is possible to realize the capacitance CF as gate capacitance or junction capacitance, since sufficient voltage is applied during operation.
  • a peculiarity of in Fig. 6 illustrated embodiment of the voltage regulator 11 according to the invention is that it is not necessary, the points A1, A2, ..., AN (see Fig. 6 ) electrically directly connect. Dynamically and statically, the points A1, A2,..., AN are at the same potential, since the loading of the point AN by CF is negligible.
  • each single transistor Q1, Q2, ..., QN is provided with a series resistor of the size RZ ⁇ N, resulting in increased ESD protection.
  • the provision of the series resistors RZ.N is also of particular advantage for their thermal decoupling.
  • the crossover (R1, R2 ', R2 ", CF) in the circuit of the embodiment 11 after Fig. 6 in principle designed the same as the crossover 2 in the circuit of the embodiment 10 after Fig. 1 ,
  • the crossover network (R1, R2 ', R2 ", CF) transmits signals with frequencies" fw from B to C and signals with frequencies "fw from AN to C.
  • the maximum coupling factor of the crossover AN ⁇ C is chosen to be greater than or at least equal to the maximum crossover factor of the crossover B ⁇ C so as not to create an additional pole around fw.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Continuous-Control Power Sources That Use Transistors (AREA)

Abstract

L'invention concerne un régulateur de tension (10, 11) qui comprend une sortie de régulateur de tension (6) fournissant une tension de sortie régulée (Usor), ainsi qu'une résistance ohmique interne (RZ), montée en série par rapport à une charge externe (RL) à raccorder à la sortie de régulateur de tension (6). Un chemin de rétroaction de régulation électrique interne du régulateur de tension (10, 11) est capté au niveau d'un premier point (A) avant la résistance ohmique interne (RZ), ainsi qu'au niveau d'un deuxième point (B) après la résistance ohmique interne (RZ), le deuxième point (B) se situant entre la résistance ohmique interne (RZ) et la sortie de régulateur de tension (6). Pour des fréquences supérieures à une fréquence prédéfinie (fw), la régulation agit pratiquement directement par le premier point (A) et pas par le deuxième point (B) alors que, pour des fréquences inférieures à la fréquence prédéfinie (fw), la régulation se fait pratiquement par le chemin : premier point (A) résistance ohmique interne (RZ) deuxième point (B).

Claims (15)

  1. Régulateur (10, 11) de tension comprenant
    - une sortie (6) de régulateur de tension, pour mettre à disposition une tension (Uaus) de sortie régulée aux bornes d'une branche de charge ;
    - un trajet électrique interne de régulation-réaction ; et
    - une résistance (RZ) ohmique interne qui est montée dans la branche de charge interne du régulateur (10, 11) de tension de manière à être électriquement en série avec une charge (RL) extérieure se raccordant à la sortie (6) du régulateur de tension,
    caractérisé par
    - un répartiteur (2) de fréquence, qui est monté en série dans le trajet de régulation-réaction et qui, par une première entrée, est relié à un premier point (A) avant la résistance (RZ) ohmique interne et, par une deuxième entrée, à un deuxième point (B) derrière la résistance (RZ) ohmique interne, le deuxième point (B) se trouvant entre la résistance (RZ) ohmique interne et la sortie (6) du régulateur de tension, et
    - dans lequel le répartiteur (2) de fréquence a une sortie (C) pour faire revenir le signal dans le trajet de régulation-réaction ;
    - dans lequel le répartiteur (2) de fréquence est tel que le répartiteur (2) de fréquence transmet des signaux ayant des fréquences supérieures à une fréquence (fw) de répartiteur déterminée à l'avance de sa première entrée (7) à sa sortie (C) et en ce que le répartiteur (2) de fréquence transmet des signaux ayant des fréquences inférieures à la fréquence (fw) de répartiteur déterminée à l'avance de sa deuxième entrée (8) à sa sortie (C).
  2. Régulateur (10, 11) de tension suivant la revendication 1 comprenant
    - un amplificateur (1) de régulation qui a deux entrées (3, 4) et une sortie (5), et
    - une source (Q) de courant commandée,
    dans lequel
    - la première entrée (3) de l'amplificateur (1) de régulation sert au raccordement à une source (Uref) de tension de référence,
    - la deuxième entrée (4) de l'amplificateur (1) de régulation est raccordée au trajet de régulation-réaction qui mène à l'extérieur de l'amplificateur (1) de régulation de la sortie (5) de l'amplificateur (1) de régulation à la deuxième entrée (4) de l'amplificateur (1) de régulation en passant par la source (Q) de courant commandée, et
    - entre la source (Q) de courant commandée et la deuxième entrée (4) de l'amplificateur (1) de régulation, un trajet électrique de sortie bifurque (A) du trajet de régulation-réaction vers la sortie (6) du régulateur de tension, la résistance (RZ) ohmique interne étant montée en série entre la bifurcation (A) et la sortie (6) du régulateur de tension.
  3. Régulateur (10, 11) de tension suivant la revendication 2,
    caractérisé en ce que
    le facteur de couplage maximum du répartiteur (2) de fréquence, de sa première entrée (7) à sa sortie (C), est supérieure ou égale au facteur de couplage maximum de sa deuxième entrée (8) à sa sortie (C).
  4. Régulateur (10, 11) de tension suivant la revendication 2 ou 3,
    caractérisé en ce que
    l'amplificateur (1) est un amplificateur opérationnel.
  5. Régulateur (10) de tension suivant l'une des revendication 2 à 4,
    caractérisé en ce que
    - ledit autre trajet électrique comportant un circuit diviseur de tension, et
    - la deuxième entrée (8) du répartiteur (2) de fréquence est raccordée à l'autre trajet électrique entre des résistances (R1, R2) du circuit diviseur de tension.
  6. Régulateur (11) de tension suivant la revendication 2,
    caractérisé en ce que
    le répartiteur de fréquence est un filtre RC (CF, R1, R2', R2") passif.
  7. Régulateur (11) de tension suivant la revendication 6,
    caractérisé en ce que
    le répartiteur de fréquence comporte un circuit (R1, R2', R2") diviseur de tension.
  8. Régulateur (11) de tension suivant l'une des revendications précédentes,
    caractérisé en ce que
    la résistance (RZ) ohmique interne est réalisée sous la forme d'un circuit parallèle de N résistances individuelles, N étant plus grand que 1.
  9. Régulateur (11) de tension suivant l'une des revendications 2 à 8,
    caractérisé en ce que
    ladite source (Q) de courant commandée est réalisée sous la forme d'un circuit parallèle de N sources (Q1 à Qn) de courant commandées individuelles, N étant plus grand que 1.
  10. Régulateur (11) de tension suivant la revendication 8
    lorsqu'elle se rapporte à la revendication 9,
    caractérisé en ce que
    - chacune des N sources (Q1 à QN) de courant commandées individuelles est reliée électriquement directement à sa résistance individuelle respective propre parmi l'ensemble des N résistances individuelles de manière à obtenir N liaisons électriques directes entre les N sources (Q1 à QN) de courant commandées individuelles et les N résistances individuelles,
    - lesdites N liaisons électriques directes ne sont pas reliées électriquement entre elles, et
    - la première entrée du répartiteur de fréquence est raccordée directement seulement à l'une desdites N liaisons électriques directes.
  11. Régulateur (10, 11) de tension suivant l'une des revendications précédentes,
    caractérisé en ce que
    la source (Q) de courant commandée ou au moins l'une des N sources (Q1 à QN) de courant commandées individuelles est un transistor.
  12. Régulateur (10, 11) de tension suivant la revendication 11,
    caractérisé en ce que
    le transistor est un FET ou un transistor bipolaire.
  13. Régulateur de tension suivant l'une des revendications précédentes,
    caractérisé par
    une capacité interne, qui est montée électriquement en parallèle à la charge extérieure se raccordant à la sortie du régulateur de tension et qui est montée dans une branche électrique qui bifurque, en direction de la masse, entre la résistance ohmique interne et la sortie de régulateur de tension.
  14. Régulateur (10, 11) de tension suivant l'une des revendications précédentes,
    caractérisé en ce que
    les dimensions de ses composants (1, 2, RZ, Q, R, R2) sont choisies de manière à ce qu'une fréquence (fz), à laquelle sa fonction de transfert a un point zéro, est plus basse que sa fréquence (ft) de transition.
  15. Régulateur (10, 11) de tension suivant l'une des revendications précédentes,
    caractérisé en ce que
    il est réalisé sous la forme d'un circuit intégré.
EP02754318A 2001-07-27 2002-07-04 Regulateur de tension a correction de reponse en frequence Expired - Lifetime EP1421456B1 (fr)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
DE10136715 2001-07-27
DE10136715 2001-07-27
DE10149907A DE10149907A1 (de) 2001-07-27 2001-10-10 Spannungsregler mit Frequenzgangkorrektur
DE10149907 2001-10-10
PCT/DE2002/002449 WO2003012568A2 (fr) 2001-07-27 2002-07-04 Regulateur de tension a correction de reponse en frequence

Publications (2)

Publication Number Publication Date
EP1421456A2 EP1421456A2 (fr) 2004-05-26
EP1421456B1 true EP1421456B1 (fr) 2012-04-11

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Family Applications (1)

Application Number Title Priority Date Filing Date
EP02754318A Expired - Lifetime EP1421456B1 (fr) 2001-07-27 2002-07-04 Regulateur de tension a correction de reponse en frequence

Country Status (3)

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US (1) US6841978B2 (fr)
EP (1) EP1421456B1 (fr)
WO (1) WO2003012568A2 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6975099B2 (en) * 2004-02-27 2005-12-13 Texas Instruments Incorporated Efficient frequency compensation for linear voltage regulators
US7721119B2 (en) * 2006-08-24 2010-05-18 International Business Machines Corporation System and method to optimize multi-core microprocessor performance using voltage offsets

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4908566A (en) * 1989-02-22 1990-03-13 Harris Corporation Voltage regulator having staggered pole-zero compensation network
US5191278A (en) * 1991-10-23 1993-03-02 International Business Machines Corporation High bandwidth low dropout linear regulator
US5631598A (en) * 1995-06-07 1997-05-20 Analog Devices, Inc. Frequency compensation for a low drop-out regulator
US5648718A (en) * 1995-09-29 1997-07-15 Sgs-Thomson Microelectronics, Inc. Voltage regulator with load pole stabilization
US5852359A (en) * 1995-09-29 1998-12-22 Stmicroelectronics, Inc. Voltage regulator with load pole stabilization
EP0846996B1 (fr) 1996-12-05 2003-03-26 STMicroelectronics S.r.l. Circuit de commande d'un transistor de puissance pour régulation de tension
US5889393A (en) * 1997-09-29 1999-03-30 Impala Linear Corporation Voltage regulator having error and transconductance amplifiers to define multiple poles
US6518737B1 (en) * 2001-09-28 2003-02-11 Catalyst Semiconductor, Inc. Low dropout voltage regulator with non-miller frequency compensation
US6630903B1 (en) * 2001-09-28 2003-10-07 Itt Manufacturing Enterprises, Inc. Programmable power regulator for medium to high power RF amplifiers with variable frequency applications
US6465994B1 (en) * 2002-03-27 2002-10-15 Texas Instruments Incorporated Low dropout voltage regulator with variable bandwidth based on load current

Also Published As

Publication number Publication date
US6841978B2 (en) 2005-01-11
WO2003012568A3 (fr) 2003-04-17
EP1421456A2 (fr) 2004-05-26
US20040207374A1 (en) 2004-10-21
WO2003012568A2 (fr) 2003-02-13

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