EP1288971B1 - Verfahren zur Herstellung eines Zinkoxidvaristors - Google Patents

Verfahren zur Herstellung eines Zinkoxidvaristors Download PDF

Info

Publication number
EP1288971B1
EP1288971B1 EP20010120823 EP01120823A EP1288971B1 EP 1288971 B1 EP1288971 B1 EP 1288971B1 EP 20010120823 EP20010120823 EP 20010120823 EP 01120823 A EP01120823 A EP 01120823A EP 1288971 B1 EP1288971 B1 EP 1288971B1
Authority
EP
European Patent Office
Prior art keywords
varistor
varistor element
zinc oxide
manufacturing
compound
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
EP20010120823
Other languages
English (en)
French (fr)
Other versions
EP1288971A1 (de
Inventor
Kaori Shiraishi
Tatsuya Inoue
Riho Sasaki
Keiichi Noi
Hideaki Tokunaga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Original Assignee
Panasonic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp filed Critical Panasonic Corp
Priority to EP20010120823 priority Critical patent/EP1288971B1/de
Publication of EP1288971A1 publication Critical patent/EP1288971A1/de
Application granted granted Critical
Publication of EP1288971B1 publication Critical patent/EP1288971B1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
    • H01C7/10—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material voltage responsive, i.e. varistors
    • H01C7/105—Varistor cores
    • H01C7/108—Metal oxide
    • H01C7/112—ZnO type

Definitions

  • the present invention relates to a method of manufacturing a zinc oxide varistor which absorbs dielectric lightning surge, electrostatic surge, burst surge or the like.
  • Document US-B1-6 260 258 describes a method for manufacturing a varistor having a high plating resistance and high moisture resistance. Therefore, a high resistance layer mainly composed of Zn 2 SiO 4 is formed on the surface of a varistor element. In order to form the layer, heat treatment of the varistor element is performed in a crucible, wherein the varistor element is buried in SiO 2 or a mixture thereof.
  • a material based on zinc oxide is sintered to make a varistor element.
  • a first external electrode is formed on the surface of the sintered varistor element.
  • the varistor element is buried into a mixture based on SiO 2 and is subjected to heat treatment.
  • Zn 2 SiO 4 film having acid and alkali resistance is formed on the surface of the varistor element.
  • acid and alkali resistance means to have plating resistance.
  • Zn 2 SiO 4 film is also formed on the first external electrode, resulting in generation of irregularities thereon.
  • a second external electrode is formed on the first external electrode. After that, Ni plating and solder plating are performed on the second external electrode.
  • the present invention is intended to provide a zinc oxide varistor having a Zn 2 SiO 4 film on the surface of the varistor element, requiring no heat treatment in SiO 2 after forming the first external electrode, that is, after sintering the varistor element.
  • a precipitate film having plating resistance may be formed on the surface of the varistor element during sintering process.
  • Plating resistance means that no deterioration occurs during plating process.
  • Fig. 1 is a sectional view of a laminate chip varistor being a zinc oxide varistor in an embodiment of the present invention.
  • Fig. 2 shows a process of manufacturing a laminate chip varistor being a zinc oxide varistor in an embodiment of the present invention.
  • Fig. 3 is a view of varistor element grain size and precipitate film when aluminum compound is not added as a sub-component for a varistor element in an embodiment of the present invention.
  • Fig. 4 is a view of varistor element grain size and precipitate film when aluminum compound is added as a sub-component for a varistor element in an embodiment of the present invention.
  • a method of manufacturing a zinc oxide varistor of the present invention comprises:
  • a zinc oxide varistor having an acid or alkali resisting film on the surface of the varistor element without requiring heat treatment in SiO 2 after sintering the varistor element.
  • Such acid or alkali resisting film is free from damage, breakage, and deterioration during plating process. That is, the acid or alkali resisting film ensures plating resistance.
  • a precipitate film having plating resistance may be formed on the surface of a varistor element during sintering process. As a result, it is possible to shorten the manufacturing process, and also, to improve the productivity.
  • the varistor element further contains bismuth compound as a sub-component.
  • bismuth compound due to the bismuth compound, it is possible to promote the precipitation of zinc compound film on the varistor element surface during sintering process. As a result, a zinc oxide varistor having plating resistance can be obtained.
  • the second process includes a step of precipitating Zn-Si-O based compound as zinc compound.
  • Zn-Si-O based compound is produced in the varistor element, and consequently, a zinc oxide varistor having plating resistance can be obtained.
  • the silicon compound contained ranges from 1 mol% to 15 mol% in terms of Si.
  • the silicon compound contained ranges from 1 mol% to 15 mol% in terms of Si.
  • the sintering temperature in the second process ranges from 1000°C to 1400°C.
  • the sintering temperature in the second process ranges from 1000°C to 1400°C.
  • the varistor element further contains aluminum compound as a sub-component.
  • the varistor element further contains aluminum compound as a sub-component.
  • the aluminum compound is contained by 3 mol% or less.
  • the aluminum compound is contained by 3 mol% or less.
  • the bismuth compound is disposed around the varistor element when the varistor element is sintered.
  • the bismuth compound disposed around the varistor element is scattered during sintering and some of the scattered bismuth compound sticks to the surface of the varistor element during the temperature lowering process. Accordingly, it is possible to promote the precipitation of Zn-Si-O based compound onto the surface thereof the same as for the bismuth component in the varistor element.
  • the temperature becomes lowered at a speed so as to suppress the grain growth of the varistor element.
  • the temperature becomes lowered at a speed so as to suppress the grain growth of the varistor element.
  • the silicon compound used is Zn 2 SiO 4 .
  • Zn-Si-O based compound is formed on the surface of the varistor element during sintering process.
  • the second process includes a step of storing the varistor element into a sheath and sintering same while rotating the sheath.
  • the heat distribution and the sintering atmosphere can be uniformed.
  • the sheath stores at least one powder selected from the group consisting of Al 2 O 3 , MgO, ZrO 2 , ZnO and NiO together with the varistor element.
  • the varistor element stores at least one powder selected from the group consisting of Al 2 O 3 , MgO, ZrO 2 , ZnO and NiO together with the varistor element.
  • the first process includes a step of obtaining a mixture by mixing the main component and the sub-component before forming the varistor element, and then a step of calcining the mixture.
  • zinc compound may be precipitated as previously intended.
  • zinc compound can be efficiently precipitated on the surface of the varistor element.
  • the varistor element further contains bismuth compound and antimony compound as sub-components
  • the second process includes a step of precipitating Zn-Sb-O based compound as zinc compound.
  • the antimony compound is contained in a range from 1 mol% to 10 mol% in terms of Sb.
  • the antimony compound is contained in a range of 1 mol% to 10 mol% in terms of Sb.
  • the varistor element further contains aluminum compound as a sub-component.
  • the varistor element further contains aluminum compound as a sub-component.
  • the aluminum compound is contained by 3 mol% or less.
  • the aluminum compound is contained by 3 mol% or less.
  • a method of manufacturing a zinc oxide varistor of the present invention further comprises:
  • the external electrode attaching process includes a step of disposing an external electrode material, and a step of forming a plated layer by a plating method on the surface of the external electrode material.
  • the plated layer contains at least two layers which have the nickel layer and one of tin layer and solder layer on the nickel layer.
  • the process of forming the varistor element includes a step of forming a laminate varistor element having an internal electrode in the varistor element.
  • the process of forming the varistor element includes:
  • the first process includes:
  • the first process includes
  • the first process includes:
  • the zinc compound contains at least one of Zn-Si-O based compound and Zn-Sb-O based compound.
  • Fig. 1 is a sectional view of a laminate chip varistor as a zinc oxide varistor.
  • varistor element 1 whose main component is zinc oxide has internal electrodes 3 whose main component is Pt. Also, precipitate film 2 whose main component is Zn 2 SiO 4 is formed on the surface of the varistor element 1. External electrode 4 whose main component is Ag is disposed on the exposed ends of the internal electrodes 3. Further, Ni layer 5 and solder layer 6 are disposed on the external electrode 4.
  • Fig. 2 is a manufacturing process chart of a laminate chip varistor in the present exemplary embodiment.
  • Fig. 3 is a view of varistor element grain size and precipitate film when aluminum compound is not applied as a sub-component of the varistor element in the present embodiment.
  • Fig. 4 is a view of varistor element grain size and precipitate film when aluminum compound is applied as a sub-component of the varistor element in the present embodiment. That is, Fig. 3 and Fig. 4 are sectional views that show the states of irregularities and precipitate film 2 formed on the surface of varistor element 1 with and without aluminum compound applied into the varistor element 1. In Fig. 3 and Fig. 4 , Zn 2 SiO 4 30 is formed in the varistor element 1.
  • step No. 8 of Fig. 2 ZnO as main component and SiO 2 , Bi 2 O 3 , Sb 2 O 3 , Co 3 O 4 , MnO 2 , NiO, Cr 2 O 3 , Al (NO 3 ) 3 as sub-components are subjected to wet mixing.
  • the mixture is dried in the step No. 9.
  • material powder may be obtained.
  • the quantity of silicon compound added is adjusted to 1 mol% to 15 mol% or preferably to 5 mol% to 10 mol% in terms of Si.
  • the quantity of aluminum compound added is adjusted to 3 mol% max. or preferably to 1 mol% or less in terms of Al. Further, by adding aluminum compound, it is also possible to obtain the effect of improving the plating resistance inside the varistor element 1.
  • step No. 10 of Fig. 2 dry powder grain size is adjusted.
  • step No. 11 of Fig. 2 the powder is put into a sheath and is calcined at a temperature of 800°C to 1000°C.
  • the step No. 12 of Fig. 2 the calcined powder is crushed until becoming 1.0 ⁇ 0.5 ⁇ m in grain size on the average.
  • the powder is finely crushed in the step No. 13, and is sufficiently dried in the step No. 14.
  • the powder is again crushed in the step No. 15, and then, powder of larger gain sizes is eliminated in order to obtain a uniform slurry.
  • the crushed powder is mixed with butyl acetate as a solvent, benzene butyl phthalate as a plasticizer, and butyral resin as a binder, thereby manufacturing a slurry.
  • the slurry is formed into a sheet having a predetermined thickness by the doctor blade method after eliminating solid matters contained therein. After that, the sheet is cut to a predetermined shape in the step No. 18. And in the step No. 19, Pt paste as internal electrode 3 is printed thereon in a desired form, followed by lamination.
  • an electrode made of at least one metal out of Pt, Pd, and Ag can be used as the internal electrode.
  • step No. 20 main press operation is performed in the step No. 20. And in the step No. 21, the work is cut to a predetermined shape. In this way, the varistor element 1 can be obtained.
  • the varistor element 1 is inserted into a sheath for binder elimination, which is thrown into a binder eliminating furnace, and then the temperature is increased up to 400°C at a temperature increasing rate of 25°C/h. The condition is maintained for two hours, and further, the temperature is increased up to 700°C, and the condition is maintained for two hours.
  • the binder is eliminated in the step No. 22.
  • the purpose of this is to provide the varistor element 1 with a sufficient strength in advance since it is necessary to rotate the sheath, storing the varistor element 1, in the next sintering process.
  • the varistor element 1 with the binder completely eliminated is put into a bullet-shape sheath together with Al 2 O 3 powder, which is then thrown into a furnace and sintered in the air.
  • the sintering process is described in the following. First, the temperature is increased up to 800°C at a temperature increasing rate of 200°C/h without rotating the sheath. After that, rotating the sheath is started at the temperature higher than 800°C. Subsequently, the temperature is increased up to 1000°C to 1400°C max. at a rate of 200°C/h, and the condition is maintained for two hours at the maximum temperature. Next, the temperature is lowered at a temperature lowering rate of 100°C/h.
  • step No. 24 chamfering of the varistor element 1 is performed. Subsequently, in the step No. 25, external electrode 4 whose main component is Ag is formed on the exposed ends of the internal electrodes 3. Next, in the step No. 26, baking is performed. In this case, the external electrode 4 is formed from a paste prepared by dispersing Ag in Pt, Pt-Ag, Ag-Pd, or thermosetting resin.
  • the external electrode 4 is subjected to baking, followed by Ni-plating, and by solder plating. In this way, Ni layer 5 and solder layer 6 are formed. A laminate chip varistor is completed through such steps. It is also possible to perform Sn plating to form an Sn layer instead of solder plating.
  • precipitate film 2 whose main component is Zn 2 SiO 4 , which is formed on the surface of the varistor element 1, is described in the following.
  • Zinc oxide is an amphoteric substance that dissolves in both acid and alkali. Therefore, zinc oxide dissolves in Ni plating solution and solder plating solution which are acidic or alkaline.
  • a film containing Zn 2 SiO 4 as main component is harder to dissolve in acidic and alkaline solution than the varistor element 1. Accordingly, by coating the surface of varistor element 1 with precipitate film 2 whose main component is Zn 2 SiO 4 , it is possible to suppress the intrusion of plating solution into the varistor element 1.
  • a metal flow is generated since the varistor element 1 is a semiconductor.
  • the precipitate film 2 having Zn 2 SiO 4 as main component is a high resistance substance.
  • Sb 2 O 3 as a sub-component of varistor element 1 is also applied. Accordingly, Zn-Sb-O based compound is also produced due to sintering, and Zn-Sb-O based compound is precipitated on the surface of varistor element 1 together with Zn 2 SiO 4 .
  • the Zn-Sb-O based compound also has excellent plating resistance the same as Zn 2 SiO 4 . Therefore, it is possible to obtain a varistor having excellent plating resistance which does not affect the plating effect.
  • the material powder was calcined to form Zn 2 SiO 4 in advance in order to promote the precipitation on the surface of varistor element 1 after calcining, but it is not limited to this configuration. It is also possible to use Zn 2 SiO 4 as silicon compound instead of calcining. In this way, the same effect as described above may be obtained. Naturally, it is possible to form precipitate film 2 having Zn 2 SiO 4 as main component on the surface of varistor element 1 without using Zn 2 SiO 4 as silicon compound or without calcining of the material powder.
  • Precipitate film 2 having Zn 2 SiO 4 as main component can be formed on the surface of varistor element 1 without adding aluminum compound as a sub-component of varistor element 1.
  • precipitate film 2 can be further reliably formed when aluminum compound is used as a sub-component of varistor element 1.
  • the bismuth is liquefied and dispersed during sintering. Therefore, more bismuth will exist on the surface of varistor element 1. Accordingly, the precipitation of Zn 2 SiO 4 onto the surface of varistor element 1 is promoted and Zn 2 SiO 4 close to the surface of varistor element 1 also moves onto the surface, thereby lessening the portion where precipitate film 2 is not formed on the surface of varistor element 1.
  • precipitate film 2 has Zn-Sb-O based compound as main component.
  • the other configuration is same as in the laminate chip varistor in the first exemplary embodiment described above.
  • ZnO as main component and Bi 2 O 3 , Sb 2 O 3 , Co 3 O 4 , MnO 2 , NiO, Cr 2 O 3 , and Al (NO 3 ) 3 as sub-components are subjected to wet mixing (No. 8 of Fig. 2 ), followed by drying (No. 9 of Fig. 2 ).
  • the material powder is obtained.
  • the amount of antimony compound added is adjusted to 1 mol% to 10 mol% or preferably 4 mol% to 10 mol% in terms of Sb.
  • varistor element 1 is obtained through the steps No. 10 to No. 21 of Fig. 2 .
  • the varistor element 1 is inserted into a sheath for binder elimination, which is thrown into a binder eliminating furnace, and then the temperature is increased up to 400°C at a temperature increasing rate of 25°C/h, and the condition is maintained for two hours. After that,, the temperature is further increased up to 700°C, and the condition is maintained for two hours. Thus, the binder is eliminated (No. 22 of Fig. 2 ). In this way, the strength of varistor element 1 is increased. And it is possible to prevent the varistor element 1 from being damaged when the sheath, storing the varistor element 1, is rotated in the next sintering process.
  • the varistor element 1 with the binder completely eliminated is put into a bullet-shape sheath together with Al 2 O 3 powder, which is then thrown into a furnace and sintered in the air (No. 23 of Fig. 2 ).
  • the sintering process is described in the following. First, the temperature is increased up to 800°C at a temperature increasing rate of 200°C/h without rotating the sheath. After that, the sheath rotation is started at a temperature higher than 800°C. Subsequently, the temperature is increased up to 1000°C to 1400°C max. at a rate of 200°C/h, and the condition is maintained for two hours at the maximum temperature. Next, the temperature is lowered at a temperature lowering rate of 100°C/h.
  • the varistor element 1 is subjected to chamfering (No. 24 of Fig. 2 ).
  • External electrode 4 whose main component is Ag is formed on the exposed ends of internal electrodes 3 (No. 25 of Fig. 2 ).
  • baking is performed (No. 26 of Fig. 2 ).
  • the external electrode 4 is formed by using a paste prepared by dispersing Ag in Pt, Pt-Ag, Ag-Pd, or thermosetting resin.
  • Ni plating is performed, followed by solder plating.
  • Ni layer 5 and solder layer 6 are formed (No. 27, 28 of Fig. 2 ). In this way, a laminate chip varistor can be obtained.
  • precipitate film 2 whose main component is Zn-Sb-O based compound, which is formed on the surface of varsistor element 1, will be described in the following.
  • Zinc oxide is an amphoteric substance that dissolves in both acid and alkali. Therefore, zinc oxide dissolves in Ni plating solution and solder plating solution which are acidic or alkaline.
  • a film containing Zn 2 SiO 4 as main component is harder to dissolve in acidic and alkaline solution than the varistor element 1. Accordingly, by coating the surface of varistor element 1 with precipitate film 2 whose main component is Zn 2 SiO 4 , it is possible to suppress the intrusion of plating solution into the varistor element 1.
  • a metal flow is generated since the varistor element 1 is a semiconductor.
  • the precipitate film 2 having Zn 2 SbO 4 as main component is a high resistance substance.
  • the material powder was calcined to form Zn-Sb-O based compound in advance in order to promote the precipitation on the surface of varistor element 1 during burning, but it is not limited to this configuration. It is also possible to use Zn-Sb-O based compound as antimony compound instead of calcining. In this way, the same effect as described above may be obtained. Naturally, it is possible to form precipitate film 2 having Zn-Sb-O based compound as main component on the surface of varistor element 1 without using Zn-Sb-O based compound as antimony compound or without calcining of the material powder.
  • precipitate film 2 in the second exemplary embodiment probably contains Zn 2.33 Sb 0.67 O 4 as main component.
  • Zn-Sb-O based compound having another configuration is precipitated on the precipitate film 2. Therefore, it was expressed by precipitate film 2 having Zn-Sb-O as main component with respect to the precipitate film 2.
  • the second exemplary embodiment it is possible to lessen the portion where precipitate 2 is not formed on the surface of varistor element 1 by suppressing the grain growth of varistor element and generation of irregularities on the surface. Accordingly, the same as in the first exemplary embodiment, the addition of aluminum compound as a sub-component of varistor element 1 increases the amount of substance of the spinel structure consisting of Zn and Sb and O, existing at the triple point of grain boundary of varistor element 1, and the substance of the spinel structure serves a wedge-like function to suppress the grain growth.
  • the bismuth as a sub-component of varistor element 1, the same as in the first exemplary embodiment, it is possible to start the formation of Zn-Sb-O based compound at a lower temperature. Moreover, the bismuth is liquefied and dispersed during sintering. Therefore, more bismuth will exist on the surface of varistor element 1. In this case, preferably, the bismuth compound is being disposed around the varistor element when the varistor element is sintered. Accordingly, the precipitation of Zn-Sb-O based compound onto the surface of varistor element 1 is promoted, and also, Zn-Sn-O based compound close to the surface of varistor element 1 moves onto the surface. As a result, it is possible to lessen the portion where precipitate film 2 is not formed on the surface of varistor element 1.
  • precipitate film 2 having Zn-Sb-O based compound as main component can be formed on the surface of varistor element 1 without adding aluminum compound as a sub-component of varistor element 1.
  • a precipitate film whose main component is zinc compound having plating resistance can be formed on the surface of a varistor element without another heat treatment in SiO 2 after sintering. Accordingly, the manufacturing process can be shortened. As a result, it is possible to improve the productivity and, further, to reduce the cost.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Thermistors And Varistors (AREA)

Claims (27)

  1. Verfahren zum Herstellen eines Zinkoxidvaristors, umfassend:
    (a) einen ersten Prozess (8 bis 21) des Bildens eines Varistorelements (1), wobei das Varistorelement (1) Zinkoxid als Hauptkomponente enthält, und
    (b) einen zweiten Prozess (23) des Sinterns des Varistorelements (1),
    wobei durch Sintern (23) des Varistorelements (1) das Varistorelement (1) gesintert wird und Zinkverbindung mit mindestens Säureresistenz oder Basenresistenz auf der Oberfläche des Varistorelements (1) gebildet wird,
    dadurch gekennzeichnet, dass
    in dem ersten Prozess (8 bis 21) das Varistorelement (1) weiterhin Silikonverbindung enthält, und
    eine Zn-Si-O-basierte Verbindung als die Zinkverbindung in dem zweiten Prozess (23) aus dem Varistorelement (1) ausgeschieden wird, so dass sie einen Ausscheidungsfilm (original: precipitate film) (2) bildet.
  2. Verfahren zum Herstellen eines Zinkoxidvaristors nach Anspruch 1,
    wobei in dem ersten Prozess (8 bis 21) das Varistorelement (1) weiterhin Wismutverbindung als Unterkomponente enthält.
  3. Verfahren zum Herstellen eines Zinkoxidvaristors nach Anspruch 2, wobei die Silikonverbindung in einem Bereich von 1 mol% bis 15 mol%, ausgedrückt in Si, enthalten ist.
  4. Verfahren zum Herstellen eines Zinkoxidvaristors nach Anspruch 2, wobei die Sintertemperatur in dem zweiten Prozess (23) im Bereich von 1000°C bis 1400°C liegt.
  5. Verfahren zum Herstellen eines Zinkoxidvaristors nach Anspruch 2, wobei, in dem ersten Prozess (8 bis 21) das Varistorelement (1) weiterhin Aluminiumverbindung als eine Unterkomponente enthält.
  6. Verfahren zum Herstellen eines Zinkoxidvaristors nach Anspruch 5, wobei die Aluminiumverbindung zu 3 mol% oder weniger enthalten ist.
  7. Verfahren zum Herstellen eines Zinkoxidvaristors nach Anspruch 2, wobei in dem zweiten Prozess (23) die Wismutkomponente um das Varistorelement (1) herum angeordnet ist, wenn das Varistorelement (1) gesintert wird.
  8. Verfahren zum Herstellen eines Zinkoxidvaristors nach Anspruch 2, wobei das Sintern in dem zweiten Prozess (23) einen Schritt des Erniedrigens einer Temperatur mit einer solchen Geschwindigkeit enthält, dass ein Kornwachstum des Varistorelements (1) unterdrückt wird.
  9. Verfahren zum Herstellen eines Zinkoxidvaristors nach Anspruch 2, wobei die verwendete Silikonverbindung Zn2SiO4 ist.
  10. Verfahren zum Herstellen eines Zinkoxidvaristors nach Anspruch 1, wobei der zweite Prozess (23) einen Schritt des Einlagerns des Varistorelements (1) in eine Ummantelung und seines Sinterns, während die Ummantelung gedreht wird, enthält.
  11. Verfahren zum Herstellen eines Zinkoxidvaristors nach Anspruch 10, wobei in der Ummantelung zusammen mit dem Varistorelement (1) wenigstens ein aus der Gruppe bestehend aus Al2O3, MgO, ZrO2, ZnO und NiO ausgewähltes Pulver eingelagert ist.
  12. Verfahren zum Herstellen eines Zinkoxidvaristors nach Anspruch 1, wobei der erste Prozess (8 bis 21) einschließt
    einen Schritt (8) des Erhaltens einer Mixtur durch Mischen der Hauptkomponente und der Unterkomponente, vor dem Bilden des Varistorelements (1), und
    nachfolgend einen Schritt (11) des Kalzinierens der Mixtur.
  13. Verfahren zum Herstellen eines Zinkoxidvaristors nach Anspruch 1,
    wobei, in dem ersten Prozess (8 bis 21), das Varistorelement (1) weiterhin Wismutverbindung und Antimonverbindung als Unterkomponenten enthält, und
    der zweite Prozess (23) einen Schritt des Ausscheidens von Zn-Sb-O-basierter Verbindung als Teil der Zinkverbindung enthält.
  14. Verfahren zum Herstellen eines Zinkoxidvaristors nach Anspruch 13, wobei die Antimonverbindung in einem Bereich von 1 mol% bis 10 mol%, ausgedrückt in Sb, enthalten ist.
  15. Verfahren zum Herstellen eines Zinkoxidvaristors nach Anspruch 13, wobei, in dem ersten Prozess (8 bis 21), das Varistorelement (1) weiterhin Aluminiumverbindung als eine Unterkomponente enthält.
  16. Verfahren zum Herstellen eines Zinkoxidvaristors nach Anspruch 15, wobei die Aluminiumverbindung mit 3 mol% oder weniger enthalten ist.
  17. Verfahren zum Herstellen eines Zinkoxidvaristors nach einem der Ansprüche 1 bis 16, weiterhin umfassend:
    (c) einen Prozess (25 bis 28) des Anbringens einer externen Elektrode (4) an das Varistorelement (1),
    wobei der Prozess (25 bis 28) des Anbringens der externen Elektrode (4) nach dem Beenden den Sinterprozesses (23) des Varistorelements ausgeführt wird.
  18. Verfahren zum Herstellen eines Zinkoxidvaristors nach Anspruch 17, wobei der Prozess (25 bis 28) des Anbringens der externen Elektrode enthält
    einen Schritt (25) des Anlegens eines externen Elektrodenmaterials, und
    einen Schritt (27, 28) des Bildens eines galvanischen bzw. metallischen Überzugs (original: plated layer) (5, 6) durch ein Beschichtungsverfahren auf der Oberfläche des externen Elektrodenmaterials.
  19. Verfahren zum Herstellen eines Zinkoxidvaristors nach Anspruch 18, wobei der Schritt des Bildens des galvanischen bzw. metallischen Überzugs die Schritte enthält:
    Anordnen (27) einer Nickelüberzugsschicht (5) auf der Oberfläche des externen Elektrodenmaterials und
    Anordnen (28) entweder einer Zinnschicht oder einer Lötmittelschicht (6) auf der Nickelüberzugsschicht (5).
  20. Verfahren zum Herstellen eines Zinkoxidvaristors nach Anspruch 1, wobei der Prozess (8 bis 21) des Bildens des Varistorelements (1) einen Schritt (19) des Bildens eines Laminatvaristorelements mit internen Elektroden (3) in dem Varistorelement (1) enthält.
  21. Verfahren zum Herstellen eines Zinkoxidvaristors nach einem der Ansprüche 1 bis 20, wobei der Prozess (8 bis 21) des Bildens des Varistorelements (1) die Schritte enthält:
    Herstellen (18) einer Mehrzahl von Schichtvaristormaterialien,
    Anordnen (19) von internen Elektroden (3) auf der Oberfläche eines jeden der Schichtvaristormaterialien, und
    Laminieren (19) der Schichtvaristormaterialien mit den jeweiligen internen Elektroden (3).
  22. Verfahren zum Herstellen eines Zinkoxidvaristors nach Anspruch 1, wobei in dem ersten Prozess (8 bis 21) das Varistorelement (1) weiterhin Wismutverbindung und Silikonverbindung als Unterkomponenten enthält.
  23. Verfahren zum Herstellen eines Zinkoxidvaristors nach Anspruch 1, wobei der erste Prozess (8 bis 21) die Schritte enthält:
    (i) Zubereiten (8) einer Mixtur durch Mischen von ZnO als Hauptkomponente, SiO2 und mindestens einer aus der Gruppe bestehend aus Bi2O3, Sb2O3, Co3O4, MnO2, NiO, Cr2O3 und Al(NO3)3 ausgewählten als Unterkomponente, und
    (ii) Formen (16 bis 21) der Mixtur in eine vorbestimmte Form, um das Varistorelement (1) zu bilden,
    wobei der zweite Prozess (23) enthält:
    einen Schritt des Ausscheidens von Zn-Si-O-basierter Verbindung als Zinkverbindung auf der Oberfläche des Varistorelements (1).
  24. Verfahren zum Herstellen eines Zinkoxidvaristors nach Anspruch 1, wobei der erste Prozess (8 bis 21) die Schritte enthält:
    (i) Zubereiten (8) einer Mixtur durch Mischen von ZnO als Hauptkomponente, SiO2 und Sb2O3 und mindestens einer aus der Gruppe bestehend aus Bi2O3, Co3O4, MnO2, NiO, Cr2O3 und Al(NO3)3 ausgewählten als Unterkomponente, und
    (ii) Formen (16 bis 21) der Mixtur in eine vorbestimmte Form, um das Varistorelement (1) zu bilden,
    wobei der zweite Prozess (23) einen Schritt des Ausscheidens von Zn-Si-O-basierter Verbindung und Zn-Sb-O-basierter Verbindung als Zinkverbindung auf der Oberfläche des Varistorelements (1).
  25. Verfahren zur Herstellung eines Zinkoxidvaristors nach Anspruch 23, wobei der erste Prozess (8 bis 21) weiterhin die Schritte enthält:
    (iii) Kalzinieren (11) der Mixtur;
    (iv) Formen (12, 13) der kalzinierten Mixtur in eine vorbestimmte Größe kalzinierten Pulvers; und
    (v) Zubereiten (16) einer Aufschlämmung unter Verwendung des kalzinierten Pulvers,
    wobei die Aufschlämmung verwendet wird, um das Varistorelement (1) in einer vorbestimmte Form zu formen.
  26. Verfahren zum Herstellen eines Zinkoxidvaristors nach Anspruch 1, wobei der erste Prozess (8 bis 21) die Schritte enthält:
    (i) Zubereiten (8) einer Mixtur durch Mischen von ZnO als Hauptkomponente und Zn-Si-O-basierter Verbindung und Zn-Sb-O-basierter Verbindung als Unterkomponente;
    (ii) Zubereiten (16) einer Aufschlämmung unter Verwendung der Mixtur; und
    (iii) Formen (17 bis 21) der Mixtur in eine vorbestimmte Form, um das Varistorelement (1) zu bilden,
    wobei der zweite Prozess (23) enthält:
    einen Schritt des Ausscheidens von Zn-Si-O-basierter Verbindung und Zn-Sb-O-basierter Verbindung als Zinkverbindung auf der Oberfläche des Varistorelements (1).
  27. Verfahren zum Herstellen eines Zinkoxidvaristors nach Anspruch 1, wobei in dem zweiten Prozess (23) die Zinkverbindung mindestens Zn-Si-O-basierte Verbindung und Zn-Sb-O-basierte Verbindung enthält.
EP20010120823 2001-08-29 2001-08-29 Verfahren zur Herstellung eines Zinkoxidvaristors Expired - Lifetime EP1288971B1 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP20010120823 EP1288971B1 (de) 2001-08-29 2001-08-29 Verfahren zur Herstellung eines Zinkoxidvaristors

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP20010120823 EP1288971B1 (de) 2001-08-29 2001-08-29 Verfahren zur Herstellung eines Zinkoxidvaristors

Publications (2)

Publication Number Publication Date
EP1288971A1 EP1288971A1 (de) 2003-03-05
EP1288971B1 true EP1288971B1 (de) 2012-06-20

Family

ID=8178469

Family Applications (1)

Application Number Title Priority Date Filing Date
EP20010120823 Expired - Lifetime EP1288971B1 (de) 2001-08-29 2001-08-29 Verfahren zur Herstellung eines Zinkoxidvaristors

Country Status (1)

Country Link
EP (1) EP1288971B1 (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104599797B (zh) * 2014-12-29 2018-07-13 广西新未来信息产业股份有限公司 一种压敏电阻边缘涂敷浆料材料及其制备方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03173402A (ja) * 1989-12-02 1991-07-26 Murata Mfg Co Ltd チップバリスタ
JP3396973B2 (ja) * 1994-10-28 2003-04-14 松下電器産業株式会社 積層型バリスタの製造方法
JPH1070012A (ja) * 1996-06-03 1998-03-10 Matsushita Electric Ind Co Ltd バリスタの製造方法
JP2904178B2 (ja) * 1997-03-21 1999-06-14 三菱電機株式会社 電圧非直線抵抗体及び避雷器

Also Published As

Publication number Publication date
EP1288971A1 (de) 2003-03-05

Similar Documents

Publication Publication Date Title
JP5304757B2 (ja) セラミック積層ｐｔｃサーミスタ
US5866196A (en) Electronic component and method for fabricating the same
US6232867B1 (en) Method of fabricating monolithic varistor
JP5344179B2 (ja) チップ型ｐｔｃサーミスタ
EP1095917A1 (de) Dielectrische keramische zusammensetzung, kondensator diese verwendend und herstellungsverfahren
JPH10125557A (ja) 積層型複合機能素子およびその製造方法
JP7441120B2 (ja) 積層セラミックコンデンサおよび誘電体材料
CN101341558A (zh) 带可变阻功能的层叠型半导体陶瓷电容器及其制造方法
EP0437613A1 (de) Halbleiterkeramikkondensator von laminiertem und zwischenkornisolationstyp und verfahren zu seiner herstellung
US6749891B2 (en) Zinc oxide varistor and method of manufacturing same
JPH1070012A (ja) バリスタの製造方法
EP0548394A1 (de) Laminierter Halbleiterkeramikkondensator mit Zwischenkornisolation und Herstellungsverfahren
JP4623036B2 (ja) 電子部品の製造方法及び電子部品
EP1288971B1 (de) Verfahren zur Herstellung eines Zinkoxidvaristors
JP4030180B2 (ja) セラミックス複合積層部品
US8471673B2 (en) Varistor and method for manufacturing varistor
JP2008100856A (ja) 酸化亜鉛積層チップバリスタの製造方法
JP2002043105A (ja) 酸化亜鉛型バリスタ及びその製造方法
JP4539671B2 (ja) 電子部品及びその製造方法
JP2004311676A (ja) チップ状積層セラミック電子部品の製造方法およびチップ状積層セラミック電子部品
JP2007273820A (ja) バリスタ素体及びバリスタ
JP4087359B2 (ja) 積層型チップバリスタ
US20240096524A1 (en) Electronic component
JP3132313B2 (ja) 積層バリスタ
KR100371056B1 (ko) ＳｒＴｉＯ3계 ＳＭＤ형 바리스터-캐패시터 복합기능소자제조기술

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

17P Request for examination filed

Effective date: 20020702

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE TR

AX Request for extension of the european patent

Extension state: AL LT LV MK RO SI

AKX Designation fees paid

Designated state(s): DE FR GB

17Q First examination report despatched

Effective date: 20080118

RAP1 Party data changed (applicant data changed or rights of an application transferred)

Owner name: PANASONIC CORPORATION

RTI1 Title (correction)

Free format text: METHOD OF MANUFACTURING ZINC OXIDE VARISTOR

GRAP Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOSNIGR1

GRAS Grant fee paid

Free format text: ORIGINAL CODE: EPIDOSNIGR3

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): DE FR GB

REG Reference to a national code

Ref country code: GB

Ref legal event code: FG4D

RIN1 Information on inventor provided before grant (corrected)

Inventor name: NOI, KEIICHI

Inventor name: SASAKI, RIHO

Inventor name: INOUE, TATSUYA

Inventor name: SHIRAISHI, KAORI

Inventor name: TOKUNAGA, HIDEAKI

REG Reference to a national code

Ref country code: DE

Ref legal event code: R096

Ref document number: 60146731

Country of ref document: DE

Effective date: 20120816

PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

REG Reference to a national code

Ref country code: FR

Ref legal event code: ST

Effective date: 20130430

26N No opposition filed

Effective date: 20130321

GBPC Gb: european patent ceased through non-payment of renewal fee

Effective date: 20120920

REG Reference to a national code

Ref country code: DE

Ref legal event code: R097

Ref document number: 60146731

Country of ref document: DE

Effective date: 20130321

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: GB

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20120920

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: FR

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20120831

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DE

Payment date: 20130821

Year of fee payment: 13

REG Reference to a national code

Ref country code: DE

Ref legal event code: R119

Ref document number: 60146731

Country of ref document: DE

REG Reference to a national code

Ref country code: DE

Ref legal event code: R119

Ref document number: 60146731

Country of ref document: DE

Effective date: 20150303

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: DE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20150303