EP1142022A2 - Halbleiterschalter mit gleichmässig verteilten feinen steuerstrukturen - Google Patents

Halbleiterschalter mit gleichmässig verteilten feinen steuerstrukturen

Info

Publication number
EP1142022A2
EP1142022A2 EP99900058A EP99900058A EP1142022A2 EP 1142022 A2 EP1142022 A2 EP 1142022A2 EP 99900058 A EP99900058 A EP 99900058A EP 99900058 A EP99900058 A EP 99900058A EP 1142022 A2 EP1142022 A2 EP 1142022A2
Authority
EP
European Patent Office
Prior art keywords
semiconductor switch
fine structures
semiconductor
region
semiconductor crystal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP99900058A
Other languages
German (de)
English (en)
French (fr)
Inventor
Roland Sittig
Folco Heinke
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Publication of EP1142022A2 publication Critical patent/EP1142022A2/de
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402Field plates
    • H01L29/404Multiple field plate structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7391Gated diode structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7395Vertical transistors, e.g. vertical IGBT
    • H01L29/7396Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
    • H01L29/7397Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes
    • H01L29/868PIN diodes

Definitions

  • the invention relates to a semiconductor structure as a semiconductor switch, which can be used in various variants for switching currents (claim 1 and / or 2).
  • a semiconductor structure as a semiconductor switch, which can be used in various variants for switching currents (claim 1 and / or 2).
  • bidirectional switches i.e. of switches that can switch currents on and off in both directions if the polarity of the applied voltage is appropriate.
  • Such bidirectional switches are used for some circuits (I converters, matrix converters), mostly at voltage levels above those of gate circuits, up to several thousand volts of blocking or blocking voltage.
  • the object of the invention is to provide a monolithic switch which does not have to be constructed hybrid by several components, in particular the static transmission and blocking losses are to be reduced and possibilities are provided to reduce switching losses compared to known switches.
  • the proposed structure does not require a pn junction that absorbs the blocking or blocking voltage.
  • it is characterized in that areas are created whose potential and thus their charge carrier concentrations can be set by control surfaces (gates).
  • gates One could speak symbolically of a "gate-controlled doping", which is set by means of the gate voltage depending on the polarity of the voltage at the connection electrodes (of the main current path) and the desired operating state.
  • Claim 1 describes the maintenance of the switch-on state (s), which is achieved by controlling the concentration of the charge carriers in the active area in an increasing sense.
  • the controlled fine structures are influenced by fields of MOS structures in such a way that the concentration in the active region can be increased over a large area if a first polarity of the control voltage is selected for the MOS structure.
  • Claim 2 describes the switch-off process or the switched-off state, in which the control of the concentration results in the reduction of this charge carrier concentration in the active region.
  • the fine structures are influenced here by the same MOS structure in such a way that the charge carriers are removed from the active region when the control voltage is reversed in polarity. Claim 1 and claim 2 can also be combined.
  • the fine structures of the invention can be raised in relation to the surface of the semiconductor crystal (claim 4), they can be lowered into the active region of the semiconductor crystal (claim 6), whereby they can be oriented vertically as well as horizontally () Claim 8). Regardless of how they are located, the fine structures remain on the surface or at least close to the surface with respect to the semiconductor crystal. They are distributed substantially uniformly on this surface and are formed substantially uniformly (claim 17).
  • the invention can also be used in the context of a semiconductor component which has a pn junction providing charge carriers (claim 19), but which is not suitable for receiving the reverse voltage; Here, switching blocking (and switching on) is only possible in one direction.
  • the fine structures distributed over a large area in the active area can be controlled by the MOS structures, the length of which is a multiple of their width (claim 16), can be carried out on one or both sides (claim 10, claim 6).
  • the invention makes it possible to produce bidirectional switches with a greatly reduced thickness of the weakly doped zone.
  • bidirectionally blocking components such as thyristors
  • a first pn junction which blocks one polarity
  • a second one which can absorb the blocking voltage in the other polarity.
  • According to the same weakly doped zone can absorb both the blocking voltage and the blocking voltage. Due to the smaller thickness of the main crystal region, lower forward voltages can also be achieved according to the invention.
  • the level of the flooding concentration can be adjusted during operation.
  • the losses for the respective company can be minimized.
  • control surface GA to the opposite connection electrode KB or, on the other hand, the control surface GB to the opposite connection electrode KA can be kept relatively small in accordance with the ratio of structure width to the distance between two fine structures, so that the control effort remains low.
  • switch-off losses can be significantly reduced compared to those of switchable thyristors (e.g. a GTO).
  • the low demands on the manufacturing process are of particular importance.
  • the component consists almost entirely of unchanged semiconductor starting material. There are no pn junctions that can be blocked, no precise doping concentrations to be set and no recombination centers are required. Only contact areas from which electrons and holes (as first and complementary second charge carriers) can be injected or derived are provided. This can be done with each other via a connection surface short-circuited, highly doped, but short areas across the surface. Suitable Schottky contacts can also be used.
  • the by far predominant active area of the semiconductor crystal is coated with an insulating layer and shielded by conductive field plates which, in the blocking state, make the field uniform across the semiconductor crystal.
  • the reduced technological production outlay is particularly advantageous for semiconductor materials in which doping is extremely difficult to achieve, such as in silicon carbide.
  • FIG. 1 is a cross section through the active region 1 of an example of a bidirectional semiconductor switch with a semiconductor crystal, a first connection electrode KA on a first side "A" and a second connection electrode KB on an opposite, other side "B".
  • Figure 2 illustrates a web structure of Figure 1 in perspective
  • connection electrode KA is shown broken away in order to make the doping structure 3a, 4a clear below the electrode KA and at the upper end of the web 2.
  • FIG. 3 illustrates an edge termination to the active area according to FIG. 1, which has a continuously curved field plate 50 which is connected to the metallic layer FA or FB on the respective side of the semiconductor.
  • the webs or columns 10 are at the beginning of the rising
  • Field plate 50 is shown schematically.
  • the field plate 50 which rises more curved in the end region, lies on an insulating layer 51 with a correspondingly shaped surface, which can be formed from SiO 2 .
  • FIG. 4 illustrates a cross section through a structure with lowered or recessed webs 11 using a trench technology
  • FIG. 5 shows a further structural variant. This structure arises from the fact that the web of FIG. 2 is halved and "folded over" on the insulated field plate FA to form a "lying web" 12. For this structure it is particularly simple to use the " Web width "b to make it significantly smaller.
  • FIG. 6a illustrate a bidirectional switch constructed in the manner of a cascode.
  • the gates are not monolithically integrated here, but MOSFET switches SnA and SpA are provided, which carry the entire current of the bidirectional switch, but only need to absorb a low reverse voltage. A larger web width of the structure 13 is thus permitted.
  • the structure in FIG. 6 corresponds to the trench technology in FIG. 4.
  • FIG. 7 illustrates a section from the active region 1 of a thyristor that can be switched off and has a structure in trench technology, similar to that of FIG. 4.
  • FIG. 8, FIG. 8a illustrates a top view and a section II of a switching lateral component with fine control structures 14 only on one side of the Semiconductor crystal.
  • FIGS. 1 and 2 A section of the periodically constructed structure of a bidirectional semiconductor switch is schematically outlined in FIGS. 1 and 2.
  • the dimensions are of very different sizes and are therefore not shown to scale.
  • the component consists of, for example, a rectangular slice of a semiconductor crystal, typically made of silicon, in particular silicon carbide.
  • active area 1 which takes over the switching function
  • edge area 50, 51 according to FIG. 3.
  • Figure 1 shows only a section of the active area.
  • the structures on the top "A" and on the bottom “B” are periodically continued over the entire surface of the active area; they are identical on the top and bottom. They can, but do not need to be aligned with one another and are shown displaced relative to one another in FIG.
  • Each individual structure is very small compared to the thickness of the semiconductor wafer, which is itself made from intrinsic (ie undoped, usually referred to as “i") or from very weakly n-doped (usually referred to as “n”) or from very weakly p-doped (usually Semiconductor crystal referred to as "p" and should have the lowest possible concentration of recombination centers (longest possible charge carrier life).
  • the distributed fine structures can be formed both as columns (same extension perpendicular to the drawing plane as in the drawing plane) and as webs 10 (extension extending perpendicularly to the drawing plane over the entire active area), as well as embedded horizontal or vertical control structures according to FIG. 4 , 5 are possible.
  • the web-like structures 10 to explain all such structures will be dealt with further below. Only the outer ends of these webs are highly doped shorted together by connection electrodes KA and KB n + - or p + regions 3,4. For web-like structures, these heavily doped regions 3a, 4a can also be formed successively perpendicular to the plane of the drawing, as shown in FIG. 2.
  • the entire active area 1 is covered with an insulating layer 20, 21 on both sides.
  • an insulating layer 20, 21 on both sides.
  • silicon for example, with a high-quality silicon oxide layer, as is customary for gate oxides.
  • This oxide layer is covered on the actual pane surfaces with highly conductive (metal or highly doped polycrystalline silicon) field electrodes FA or FB, which are electrically connected to the respective connection electrodes on the side, FA with KA and FB with KB.
  • the oxide layer is covered with gate electrodes GA or GB, which for silicon typically consist of highly doped, highly conductive, polycrystalline silicon.
  • the component therefore has the two main connections KA (connected to FA) and KB (connected to FB) and the two control electrodes GA and GB.
  • FIG. 1 To describe the function, a detail from a web 10 of FIG. 1 is shown enlarged in FIG.
  • the regions 3a, 4a, 3a (etc.) which are alternately n + and p + doped in the longitudinal direction of the web are shown. Due to the symmetry of the arrangement, only one direction of voltage between the main connections KA, KB need be considered.
  • a positive gate voltage U GKA above the threshold voltage of the MOS structure (GA - oxide layer - bridge semiconductor) of approximately +10 V is applied to GA on one side "A" of the semiconductor crystal. A forms in the immediate vicinity of the web surface and the web attachment point opposite the GA
  • Electron enrichment layer 2a Electron enrichment layer 2a.
  • the positive potential of GA is largely shielded from the interior of the web 2, but if the web width b is chosen small enough, there is still a positive potential of approximately 0.3 V with respect to KA in the middle of the web. The result of this is that an electron concentration is also established there which is substantially greater than the hole concentration.
  • the web 10 with its interior 2 thus acts as if it were n-doped.
  • the voltage U AB is now directed so that practically no current flows in these charge carrier distributions caused by the gate voltages. Only the respective “minority charge carriers”, ie holes from the web attachments "z" on one side "A” or electrons from the web attachments on the other side “B", are sucked away by the electrical field, which extends over the entire intrinsic area 1 contribute to reverse current.
  • the ridges correspond to the transition areas z from the fine structures to the main crystal area.
  • the gate voltages can be varied as a function of time, depending on the discharge state of the semiconductor.
  • the slice thickness of the semiconductor material will be selected in accordance with the intended blocking capacity.
  • 10 V reverse voltage can be absorbed per 1 ⁇ m silicon thickness, for example from a 200 ⁇ m thick 2000V disc.
  • the web width b is chosen to be as small as possible. As a typical width one might imagine widths from 0.2 ⁇ m to 2.0 ⁇ m.
  • the web length I should be a multiple of the web width, approximately 3 to 10 times.
  • the depth can be freely configured depending on, for example, the load current to be carried.
  • the distance between two webs can be chosen to be about 10 to 20 times the web width, and the size of the n + and p + regions at the web contacts KA, KB should not be more than the web width. This information is exemplary and is only intended to give a more concrete idea.
  • the component is to be used for a bidirectional mode of operation, it is advisable not to reduce the electrical field strength in the edge region simply by means of asymmetrically doped regions, for example in the form of the usual systems of field rings or by varying the lateral doping curve.
  • field plates 50 offer themselves as an edge seal which continuously bends away from the semiconductor, as shown schematically in FIG. 3, as does WO 99/27582 (Fraunhofer).
  • the functional principle on which the component is based can be realized with various structures, which differ primarily in the effort for the manufacturing processes. For example, the thin columns or long bars shown in FIG. 1 and FIG. 2 may not appear to be sufficiently robust and the contacting with the connection electrodes KA.KB may be very difficult.
  • the entire web structure can also be “lowered” into the semiconductor crystal, as shown in FIG. 4, 7 or 8.
  • connection electrodes KA.KB is now particularly simple, because with the gate electrode GA also insulated at the top with an oxide layer 20, only the metallization for the field plates FA, FB and connection surfaces KA, KB has to be applied over the entire surface.
  • FIG. 5 A structural variant that takes this consideration into account is shown in FIG. 5. This structure arises from the fact that the web 2 of FIG. 2 is halved and "folded over" onto the insulated field electrode. For this horizontally oriented fine structure, it is particularly simple to make the "web width" b even smaller and that To increase the ratio l / b significantly without exceeding mechanical limit strengths.
  • the halved and horizontally placed structure variant from FIG. 2 is shown in a lowered state in FIG. 5.
  • the web 2 in FIG. 2 corresponds here to the narrow control region 2 *, which consists of undoped or weakly doped semiconductor crystal, like the active region 1 , into which the horizontal land area 2 * leads via the transition area z.
  • the area z corresponds to that foot area or web attachment area z of FIG. 2.
  • the field plate FA lowered into the semiconductor crystal 1 in the active area has an angular shape and connects to the field plate lying on the surface on the left in FIG. 5.
  • the long leg of the angular extension is in length I many times longer than the remaining thickness of the control area 2 * , which is denoted by b.
  • the lowered, angularly shaped field plate FA in its left edge area is insulated from the semiconductor crystal on both sides by a horizontally lying insulating layer 20b.
  • a MOS structure is formed, consisting of the gate connection GA, the horizontal insulating layer 20 on the surface of the crystal 1 and the controlling land area 2 * .
  • the MOS arrangement controls the flooding and removal of charge carriers in the transition region z, depending on the control voltage with respect to the connection electrode KA.
  • the control of the charge carriers is in accordance with the aforementioned exemplary embodiments and is not to be explained separately here.
  • the highly doped zone 3a, 4a is provided in the angular region, close to the connection surface KA, and extends only slightly in the longitudinal direction I of the fine structure 12.
  • the external switches can be low-blocking MOSFE s, which, however, must be able to carry the entire current of the bidirectional switch.
  • the switches SpA and SnB In through-flow mode, the switches SpA and SnB must be closed accordingly and the switches SnA and SpB must be opened. Partial discharging can be achieved by simultaneously closing all switches.
  • the concept of locking in a controlled manner without a pn junction can also be used advantageously for other components. If, for example, a component is to be controlled only in one direction, it is sufficient to attach the structure according to the invention to only one side and to provide the other side with the corresponding doping - which provides charge carriers for the forward operation.
  • the structure of such an IGBT-like component is shown in FIG.
  • the component is MOS-controllable and has a particularly favorable, safe working area because current filamentation is avoided.
  • the structure according to FIG. 4 is shown, however, any other embodiment of the fine structure could also be used.
  • FIGS. 8 and 8a show a top view of an embodiment in which bidirectional switches with the fine structures 14 are designed as a lateral component.
  • a section along the plane I-1 is shown in Figure 8a, both figures are to be described simultaneously.
  • Lateral means that all connections are on the same side.
  • the two surfaces of the crystal region described so far as opposite sides A and B lie side by side here and are cut in the middle in both figures, so that only the left and right regions can be seen.
  • the manufacturing effort is facilitated by such a lateral structure, photolithography is only required on one surface, and on the other hand, a dielectric 70 serves to isolate the undoped or only weakly doped semiconductor crystal i, the active area 1 of which covers the entire area above the insulating layer 70 is.
  • Such a structure is called SOI - Silicon on Insulator.
  • this structure can assume a dimension of approximately 100 ⁇ m from the A side to the B side, depending on the reverse voltage or blocking voltage to be recorded.
  • connection areas KA and KB are shown partially broken away in order to show the doping regions 3a, 4a, which have already been explained in FIGS. 1 and 2.
  • the trench structures GA, 20a have also already been explained with reference to FIG. 4.
  • the shape of the MOS structures designed in a trench structure is different from FIG. 4; long oval structures have been chosen which, lined up with their long sides facing each other, form a row, each of which forms webs 2 'between each other, in which weakly doped or undoped semiconductor crystal is present, at which locations the web structures are formed, which are based on the previous ones Figures have been designated with the reference number 2.
  • MOS structures are provided on both sides, each with a trench gate GA with a layer 20a insulating it from the surrounding area.
  • the control via the MOS structures is carried out analogously to the previous figures.
  • the highly doped regions 3a, 4a make it possible, controlled by the lowered web structures that run between the trench gates, to either clear the crystal from charge carriers or to inject charge carriers into the crystal, depending on the operating state of the lateral switch desired by the control.
  • the conductive connection (not shown in FIG. 8) is present between the individual trench gates GA or on the other lateral side GB with a functional switch. They have been omitted here for the sake of clarity, as has the contact metallization, shown partially broken away, above the alternating n + and p + regions on the outside of the respective row of trench gates. On the inside of the respective row of trench gates is the undoped or weakly doped semiconductor crystal for receiving the reverse voltage or blocking voltage.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Thyristors (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Electronic Switches (AREA)
EP99900058A 1998-10-21 1999-10-15 Halbleiterschalter mit gleichmässig verteilten feinen steuerstrukturen Withdrawn EP1142022A2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE19848596 1998-10-21
DE19848596A DE19848596C2 (de) 1998-10-21 1998-10-21 Halbleiterschalter mit gleichmäßig verteilten feinen Steuerstrukturen
PCT/DE1999/003313 WO2000024060A2 (de) 1998-10-21 1999-10-15 Halbleiterschalter mit gleichmässig verteilten feinen steuerstrukturen

Publications (1)

Publication Number Publication Date
EP1142022A2 true EP1142022A2 (de) 2001-10-10

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
EP99900058A Withdrawn EP1142022A2 (de) 1998-10-21 1999-10-15 Halbleiterschalter mit gleichmässig verteilten feinen steuerstrukturen

Country Status (7)

Country Link
US (1) US6661036B1 (ko)
EP (1) EP1142022A2 (ko)
JP (1) JP2002528897A (ko)
KR (1) KR20010080285A (ko)
CN (1) CN1329757A (ko)
DE (2) DE19848596C2 (ko)
WO (1) WO2000024060A2 (ko)

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Publication number Priority date Publication date Assignee Title
KR100734266B1 (ko) * 2005-07-15 2007-07-02 삼성전자주식회사 콘택 저항이 개선된 수직 채널 반도체 소자 및 그 제조방법
KR100724560B1 (ko) * 2005-11-18 2007-06-04 삼성전자주식회사 결정질 반도체층을 갖는 반도체소자, 그의 제조방법 및그의 구동방법
FR2894386B1 (fr) * 2005-12-06 2008-02-29 Commissariat Energie Atomique Transistor de type i-mos comportant deux grilles independantes, et procede d'utilisation d'un tel transistor
US9281359B2 (en) 2012-08-20 2016-03-08 Infineon Technologies Ag Semiconductor device comprising contact trenches

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FR2553583B1 (fr) * 1983-10-14 1986-03-21 Thomson Csf Limiteur de puissance elevee a diodes pin pour ondes millimetriques et procede de realisation des diodes
FR2632776A1 (fr) * 1988-06-10 1989-12-15 Thomson Hybrides Microondes Diode hyperfrequences de type pin et son procede de fabrication
JPH06268173A (ja) * 1993-03-15 1994-09-22 Toshiba Corp 半導体記憶装置
JP3959125B2 (ja) * 1994-09-14 2007-08-15 株式会社東芝 半導体装置
JP3850054B2 (ja) 1995-07-19 2006-11-29 三菱電機株式会社 半導体装置
US5894149A (en) * 1996-04-11 1999-04-13 Mitsubishi Denki Kabushiki Kaisha Semiconductor device having high breakdown voltage and method of manufacturing the same
US6380569B1 (en) * 1999-08-10 2002-04-30 Rockwell Science Center, Llc High power unipolar FET switch

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Title
See references of WO0024060A2 *

Also Published As

Publication number Publication date
WO2000024060A2 (de) 2000-04-27
DE19848596A1 (de) 2000-05-04
DE19982124D2 (de) 2001-11-22
DE19848596C2 (de) 2002-01-24
WO2000024060A3 (de) 2000-08-10
CN1329757A (zh) 2002-01-02
JP2002528897A (ja) 2002-09-03
US6661036B1 (en) 2003-12-09
KR20010080285A (ko) 2001-08-22

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