EP1135011A2 - Panneau à circuit - Google Patents

Panneau à circuit Download PDF

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Publication number
EP1135011A2
EP1135011A2 EP01400690A EP01400690A EP1135011A2 EP 1135011 A2 EP1135011 A2 EP 1135011A2 EP 01400690 A EP01400690 A EP 01400690A EP 01400690 A EP01400690 A EP 01400690A EP 1135011 A2 EP1135011 A2 EP 1135011A2
Authority
EP
European Patent Office
Prior art keywords
printed
wiring board
board
hole
soldering
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP01400690A
Other languages
German (de)
English (en)
Other versions
EP1135011A3 (fr
Inventor
Itou Kazuhiro
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of EP1135011A2 publication Critical patent/EP1135011A2/fr
Publication of EP1135011A3 publication Critical patent/EP1135011A3/fr
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3452—Solder masks
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3447—Lead-in-hole components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/099—Coating over pads, e.g. solder resist partly over pads

Definitions

  • This invention relates to a printed-wiring board including a multi-layered board, and more particularly relates to a structure of a land part of a through hole that is suitable in soldering between conducting bodies of a wiring pattern formed on both sides (front side and back side) of a board with lead-free solder.
  • Fig. 5 is a plan view of a component side around one through hole part of a related printed-wiring board
  • Fig. 6 is a plan view of the soldering side of the printed-wiring board shown in Fig. 5
  • Fig. 7 is a cross sectional side view of the cross sectional side view along the line A-A of the printed-wiring board shown in Fig. 5
  • Fig. 8 is a cross sectional view for describing undesirable phenomenon that arises when the printed-wiring board shown in Fig. 5 is used for soldering.
  • a both-side printed-wiring board having the structure in which an electrically conducting layer is formed on the through hole surface by means of plating to electrically connect between conducting bodies on both sides (front side and back side) has been used widely for various electronic apparatuses as the low cost both-sides printed-wiring board.
  • the character 1 denotes the printed-wiring board.
  • a wiring pattern formed by forming land portions 3a, 3b on both sides (front side and back side) of a board 2 consisting of insulative material such as glass epoxy resin is formed, and an electrically conducting layer 5 is formed on the inside peripheral surface of a through hole 4 formed through the board 2 from one land part 3a to the other land part 3b by means of plating to connect between both land portions 3a and 3b.
  • the part of the wiring pattern other than both land portions 3a and 3b is covered with a layer 6 of insulative material (referred to as "insulating layer” hereinafter) such as solder resist.
  • the insulating layer 6 provided on both sides (front side and back side) of the printed-wiring board 1 covers the other part of the wiring pattern so as not to cover both land portions 3a and 3b, and as a matter of course the inside diameter Db of the insulating layer 6 is larger than the diameter Da of the through hole 4.
  • solder S solder that fills in and passes through the through hole 4 forms a fillet Sa and solders a base of the lead L to the land part 3a.
  • the lift-off phenomenon does not occur when lead-containing solder is used and is special to lead-free solder, and occurs regardless of soldering process, including soldering process by use of a jet soldering tank and soldering bell.
  • the part where lift-off phenomenon occurs does not depend on the type of soldering process.
  • the lift-off phenomenon is likely due to the heat shrinkage or solidification shrinkage of lead-free solder itself, and a method for controlling or preventing the lift-off phenomenon has not been established yet.
  • the present invention has been accomplished in view of the above-mentioned problem, and it is the object of the present invention to provide a printed-wiring board that is capable of preventing the lift-off phenomenon without changing the related fabrication process for fabricating a related printed-wiring board.
  • a printed-wiring board including a wiring pattern and land portions which are formed on a component side having electric components thereon and a soldering side of the board respectively, in which both of the land portions are connected with each other through an electrically conducting layer formed on an inside peripheral surface of a through hole bored through the board, and the wiring pattern is covered with an insulating layer, and in which one of the land portions on said component side is covered with the insulating layer.
  • soldering side stops at the above-mentioned component side end of the through hole, and the land part on the soldering side can secure the same soldering surface as that of the related printed-wiring board.
  • a printed-wiring board in accordance with the present invention will be described hereinafter in detail with reference to Fig. 1 to Fig. 4.
  • Fig. 1 is a plan view of the component side around one through hole of the printed-wiring board in accordance with one embodiment of the present invention
  • Fig. 2 is a plan view of the soldering side of the printed-wiring board of the printed-wiring board shown in Fig. 1
  • Fig. 3 is a cross sectional side view in the cross sectional side view along the line A-A of the printed-wiring board shown in Fig. 1
  • Fig. 4 is a cross sectional side view illustrating the soldering state of solder soldered by use of the printed-wiring board shown in Fig. 1.
  • the character 10 denotes the printed-wiring board in accordance with one embodiment of the present invention.
  • the printed-wiring board 10 has the same structure as that of the related printed-wiring board 1.
  • a wiring pattern formed by forming land portions 3a, 3b on both sides (front side and back side) of a board 2 consisting of insulative material such as glass epoxy resin is formed, and an electrically conducting layer 5 is formed on the inside peripheral surface of a through hole 4 formed through the board 2 from one land part 3a to the other land part 3b by means of plating to connect between both land portions 3a and 3b.
  • the entire surface of the land part 3a on the component side 10A side is covered including the opening circumference of the through hole 4 with an insulating layer 6a that covers other part of the wiring pattern.
  • the insulating layer 6 covers the part of wiring pattern other than the land part 3b as in the case of the related printed-wiring board 1, and the land part 3b is not covered with the insulating layer 6 and remains exposed.
  • the inside diameter Dc of the insulating layer 6a is equal to the diameter Da of the though hole 4 on the component side 10A of the printed-wiring board 10.
  • soldering side 10B lead-free solder S forms a fillet Sb to solder the head end of the lead L on the land part 3b, and other lead-free solder S fills in and passes through the through hole 4 and forms a fillet Sa on the component side 10A to solder the base of the lead L on the land part 3a.
  • the fillet Sa stops at the upper end of the through hole 4 of the component side 10A and will not penetrate to and will not solder the land part 3a of the component side 10A as shown in Fig. 4.
  • the land part 3b of the soldering side 10B secures the same soldering area as that of the related printed-wiring board, and the head end of the lead L can be soldered on the land part 3b firmly.
  • a single-layered board 2 consisting of insulative material is exemplified for description as the printed-wiring board 10, but a multi-layered board having wiring patterns formed between layers may be used instead of the board 2.

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
EP01400690A 2000-03-15 2001-03-15 Panneau à circuit Withdrawn EP1135011A3 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2000071563 2000-03-15
JP2000071563 2000-03-15

Publications (2)

Publication Number Publication Date
EP1135011A2 true EP1135011A2 (fr) 2001-09-19
EP1135011A3 EP1135011A3 (fr) 2003-05-14

Family

ID=18590130

Family Applications (1)

Application Number Title Priority Date Filing Date
EP01400690A Withdrawn EP1135011A3 (fr) 2000-03-15 2001-03-15 Panneau à circuit

Country Status (1)

Country Link
EP (1) EP1135011A3 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1313143A2 (fr) * 2001-11-19 2003-05-21 Gennum Corporation Plage à couche épaisse anrcé périphériquement
EP1367875A4 (fr) * 2001-03-07 2008-07-30 Sony Corp Pastille de carte de circuit imprime, procede de fabrication de la carte de circuit imprime et procede de montage de ladite carte

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08181424A (ja) 1994-12-26 1996-07-12 Sony Corp プリント基板及びその半田付け方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5730932A (en) * 1996-03-06 1998-03-24 International Business Machines Corporation Lead-free, tin-based multi-component solder alloys

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08181424A (ja) 1994-12-26 1996-07-12 Sony Corp プリント基板及びその半田付け方法

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 1996, no. 11 29 November 1996 (1996-11-29)
SCARLETT J.A.: "An introduction to printed circuit board technology", 1984, ELECTROCHEMICAL PUBLICATIONS LTD, article "Flexibles and flexi-rigids (Chapter 9)", pages: 129 - 131, XP002989711
SUGANUMA KATSUAKI ET AL.: "Mechanism of lift-off phenomenon (original article in JP and EN translation thereof)", MATERIA JAPAN, vol. 38, no. 12, 1999, pages 927 - 932, XP002989710
VINCENT J.H., HUMPSTON G.: "LEAD-FREE SOLDERS FOR ELECTRONIC ASSEMBLY", GEC JOURNAL OF RESEARCH, vol. 11, no. 2, 1994, pages 76 - 89, XP000454473

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1367875A4 (fr) * 2001-03-07 2008-07-30 Sony Corp Pastille de carte de circuit imprime, procede de fabrication de la carte de circuit imprime et procede de montage de ladite carte
EP1313143A2 (fr) * 2001-11-19 2003-05-21 Gennum Corporation Plage à couche épaisse anrcé périphériquement
EP1313143A3 (fr) * 2001-11-19 2006-03-08 Gennum Corporation Plage à couche épaisse anrcé périphériquement

Also Published As

Publication number Publication date
EP1135011A3 (fr) 2003-05-14

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