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  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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  • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
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  • H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds

Definitions

• This invention relates to microelectronic devices and fabrication methods, and more particularly to gallium nitride semiconductor devices and fabrication methods therefor.
• gallium nitride is being widely investigated for microelectronic devices including but not limited to transistors, field emitters and optoelectronic devices. It will be understood that, as used herein, gallium nitride also includes alloys of gallium nitride such as aluminum gallium nitride, indium gallium nitride and aluminum indium gallium nitride.
• a major problem in fabricating gallium nitride-based microelectronic devices is the fabrication of gallium nitride semiconductor layers having low defect densities. It is known that one contributor to defect density is the substrate on which the gallium nitride layer is grown. Accordingly, although gallium nitride layers have been grown on sapphire substrates, it is known to reduce defect density by growing gallium nitride layers on aluminum nitride buffer layers which are themselves formed on silicon carbide substrates. Notwithstanding these advances, continued reduction in defect density is desirable. It is also known to fabricate gallium nitride structures through openings in a mask.
• a gallium nitride semiconductor layer by laterally growing an underlying gallium nitride layer to thereby form a laterally grown gallium nitride semiconductor layer, and forming microelectronic devices in the laterally grown gallium nitride semiconductor layer.
• a gallium nitride semiconductor layer is fabricated by masking an underlying gallium nitride layer with a mask that includes an array of openings therein and growing the underlying gallium nitride layer through the array of openings and onto the mask, to thereby form an overgrown gallium nitride semiconductor layer. Microelectronic devices may then be formed in the overgrown gallium nitride semiconductor layer.
• the overgrown gallium nitride layer is relatively defect-free. Accordingly, high performance microelectronic devices may be formed in the overgrown gallium nitride semiconductor layer.
• the overgrown gallium nitride semiconductor layer is overgrown until the overgrown gallium nitride layer coalesces on the mask, to form a continuous overgrown monocrystalline gallium nitride semiconductor layer.
• the overgrown layer can thus have overgrown regions of relatively low defect in the area of coalescence and regions of relatively high defects over the mask openings.
• a gallium nitride semiconductor layer is fabricated by laterally growing an underlying gallium nitride layer to thereby form a first laterally grown gallium nitride semiconductor layer, and laterally growing the first laterally grown gallium nitride layer to thereby form a second laterally grown gallium nitride semiconductor layer. Microelectronic devices may then be formed in the second laterally grown gallium nitride semiconductor layer.
• a gallium nitride semiconductor layer is fabricated by masking an underlying gallium nitride layer with a first mask that includes a first array of openings therein and growing the underlying gallium nitride layer through the first array of openings and onto the first mask, to thereby form a first overgrown gallium nitride semiconductor layer.
• the first overgrown layer is then masked with the second mask that includes a second array of openings therein.
• the second array of openings is laterally offset from the first array of openings.
• the first overgrown gallium nitride layer is then grown through the second array of openings and onto the second mask, to thereby form a second overgrown gallium nitride semiconductor layer.
• Microelectronic devices may then be formed in the second overgrown gallium nitride semiconductor layer.
• the first overgrown gallium nitride layer is relatively defect-free.
• the second array of mask openings is laterally offset from the first array of mask openings, the relatively defect-free overgrown first gallium nitride layer propagates through the second array of openings and onto the second mask. Accordingly, high performance microelectronic devices may be formed in the second overgrown gallium nitride semiconductor layer.
• the second overgrown gallium nitride semiconductor layer is overgrown until the second overgrown gallium nitride layer coalesces on the second mask, to form a continuous overgrown monocrystalline gallium nitride semiconductor layer.
• the entire continuous overgrown layer can thus be relatively defect-free compared to the underlying gallium nitride layer.
• the first and second gallium nitride semiconductor layers may be grown using metalorganic vapor phase epitaxy (MONPE).
• the openings in the masks are stripes that are oriented along the ⁇ 1 1 00 > direction ofthe underlying gallium nitride layer.
• the overgrown gallium nitride layers may be grown using triethylgallium (TEG) and ammonia ( ⁇ H 3 ) precursors at 1000- 1100°C and 45 Torr.
• TEG triethylgallium
• ⁇ H 3 ammonia
• TEG at 13-39 ⁇ mol/min and NH 3 at 1500 seem are used in combination with 3000 seem H 2 diluent.
• TEG at 26 ⁇ mol/min, NH 3 at 1500 seem and H 2 at 3000 seem at a temperature of 1100°C and 45 Torr are used.
• the underlying gallium nitride layer preferably is formed on a substrate, which itself includes a buffer layer such as aluminum nitride, on a substrate such as 6H- SiC(0001).
• Gallium nitride semiconductor structures according to the present invention include an underlying gallium nitride layer, a lateral gallium nitride layer that extends from the underlying gallium nitride layer, and a plurality of microelectronic devices in the lateral gallium nitride layer.
• gallium nitride semiconductor structures according to the present invention include an underlying gallium nitride layer and a patterned layer (such as a mask) that includes an array of openings therein, on the underlying gallium nitride layer.
• a vertical gallium nitride layer extends from the underlying gallium nitride layer through the array of openings.
• a lateral gallium nitride layer extends from the vertical gallium nitride layer onto the patterned layer, opposite the underlying gallium nitride layer.
• a plurality of microelectronic devices including but not limited to optoelectronic devices and field emitters, are formed in the lateral gallium nitride layer.
• the lateral gallium nitride layer is a continuous monocrystalline gallium nitride semiconductor layer.
• the underlying gallium nitride layer and the vertical gallium nitride layer both include a predetermined defect density, and the lateral gallium nitride semiconductor layer is of lower defect density than the predetermined defect density. Accordingly, low defect density gallium nitride semiconductor layers may be produced, to thereby allow the production of high- performance microelectronic devices.
• gallium nitride semiconductor structures include an underlying gallium nitride layer, a first lateral gallium nitride layer that extends from the underlying gallium nitride layer and a second lateral gallium nitride layer that extends from the first lateral gallium nitride layer.
• a plurality of microelectronic devices are provided in the second lateral gallium nitride layer.
• gallium nitride semiconductor structures include an underlying gallium nitride layer and a first mask that includes a first array of openings therein, on the underlying gallium nitride layer.
• a first vertical gallium nitride layer extends from the underlying gallium nitride layer through the first array of openings.
• a first lateral gallium nitride layer extends from the vertical gallium nitride layer onto the mask, opposite the underlying gallium nitride layer.
• a second mask on the first lateral gallium nitride layer includes a second array of openings therein that are laterally offset from the first array of openings.
• a second vertical gallium nitride layer extends from the first lateral gallium nitride layer and through the second array of openings.
• a second lateral gallium nitride layer extends from the second vertical gallium nitride layer onto the second mask, opposite the first lateral gallium nitride layer.
• a plurality of microelectronic devices including but not limited to optoelectronic devices and field emitters, are formed in the second vertical gallium nitride layer and in the second lateral gallium nitride layer.
• the second lateral gallium nitride layer is a continuous monocrystalline gallium nitride semiconductor layer.
• the underlying gallium nitride layer includes a predetermined defect density, and the second vertical and lateral gallium nitride semiconductor layers are of lower defect density than the predetermined defect density. Accordingly, continuous low defect density gallium nitride semiconductor layers may be produced, to thereby allow the production of high-performance microelectronic devices, using laterally offset masks.
• Figure 1 is a cross-sectional view of first embodiments of gallium nitride semiconductor structures according to the present invention.
• Figures 2-5 are cross-sectional views of structures of Figure 1 during intermediate fabrication steps, according to the present invention.
• Figure 6 is a cross-sectional view of second embodiments of gallium nitride semiconductor structures according to the present invention.
• Figure 7-14 are cross-sectional views of structures of Figure 6 during intermediate fabrication steps, according to the present invention.
• the gallium nitride structures 100 include a substrate 102.
• the substrate may be sapphire or gallium nitride.
• the substrate includes a 6H-SiC(0001) substrate 102a and an aluminum nitride buffer layer 102b on the silicon carbide substrate 102 a
• the aluminum nitride buffer layer 102b may 0.01 ⁇ m thick.
• the fabrication of substrate 102 is well known to those having skill in the art and need not be described further. Fabrication of silicon carbide substrates are described, for example, in U.S.
• An underlying gallium nitride layer 104 is also included on buffer layer 102b opposite substrate 102a.
• the underlying gallium nitride layer 104 may be between O 99/44224 .
• the underlying gallium nitride layer generally has an undesired relatively high defect density, for example dislocation densities of between about 10 and 10 10 cm "2 . These high defect densities may result from mismatches in lattice parameters between the buffer layer 102b and the underlying gallium nitride layer 104. These high defect densities may impact performance of microelectronic devices formed in the underlying gallium nitride layer 104.
• a mask such as a silicon dioxide mask 106 is included on the underlying gallium nitride layer 104.
• the mask 106 includes an array of openings therein. Preferably, the openings are stripes that extend along the ⁇ 1 1 00 > direction ofthe underlying gallium nitride layer 104.
• the mask 106 may have a thickness of about 1000 A and may be formed on the underlying gallium nitride layer 104 using low pressure chemical vapor deposition (CVD) at 410°C.
• the mask 106 may be patterned using standard photolithography techniques and etched in a buffered hydrofluoric acid (HF) solution.
• HF buffered hydrofluoric acid
• a vertical gallium nitride layer 108a extends from the underlying gallium nitride layer 104 and through the array of openings in the mask 106.
• the term "vertical" means a direction that is orthogonal to the faces ofthe substrate 102.
• the vertical gallium nitride layer 108a may be formed using metalorganic vapor phase epitaxy at about 1000-1100°C and 45 Torr. Precursors of triethygallium (TEG) at 13-39 ⁇ mol/min and ammonia ( ⁇ H 3 ) at 1500 seem may be used in combination with a 3000 seem H 2 diluent, to form the vertical gallium nitride layer 108a.
• TAG triethygallium
• ⁇ H 3 ammonia
• the gallium nitride semiconductor structure 100 also includes a lateral gallium nitride layer 108b that extends laterally from the vertical gallium nitride layer 108a onto the mask 106 opposite the underlying gallium nitride layer 104.
• the lateral gallium nitride layer 108b may be formed using metalorganic vapor phase epitaxy as described above.
• the term "lateral" denotes a direction parallel to the faces of substrate 102.
• lateral gallium nitride layer 108b coalesces at interfaces 108c to form a continuous monocrystalline gallium nitride semiconductor layer 108. It has been found that the dislocation densities in the underlying gallium nitride layer 104 generally do not propagate laterally with the same intensity as vertically. Thus, lateral gallium nitride layer 108b can have a relatively low defect density, for example less that 10 4 cm "2 . Accordingly, lateral gallium nitride layer 108b may form device quality gallium nitride semiconductor material. Thus, as shown in Figure 1 , microelectronic devices 110 may be formed in the lateral gallium nitride layer 108b.
• an underlying gallium nitride layer 104 is grown on a substrate 102.
• the substrate 102 may include a 6H-SiC(0001) substrate 102a and an aluminum nitride buffer layer 102b.
• the gallium nitride layer 104 may be between 1.0 and
• the underlying gallium nitride layer 104 is masked with a mask 106 that includes an array of openings 107 therein.
• the mask may comprise silicon dioxide at thickness of lOOOA and may be deposited using low pressure chemical vapor deposition at 410°C. Other masking materials may be used.
• the mask may be patterned using standard photolithography techniques and etching in a buffered HF solution.
• the openings 107 are 3 ⁇ m-wide openings that extend in parallel at distances of between 3 and 40 ⁇ m and that are oriented along the ⁇ 1 1 00 > direction on the underlying gallium nitride layer 104.
• the structure Prior to further processing, the structure may be dipped in a 50% buffered hydrochloric acid (HC1) solution to remove surface oxides from the underlying gallium nitride layer 104.
• HC1 50% buffered hydrochloric acid
• the underlying gallium nitride layer 104 is grown through the array of openings 107 to form vertical gallium nitride layer 108a in the openings.
• Growth of gallium nitride may be obtained at 1000-1100°C and 45 Torr.
• the precursors TEG at 13-39 ⁇ mol/min and NH 3 at 1500 seem may be used in combination with a 3000 seem H diluent. If gallium nitride alloys are formed, additional conventional precursors of aluminum or indium, for example, may also be used.
• the gallium nitride layer 108a grows vertically to the top ofthe mask 106.
• underlying gallium nitride layer 104 may also be grown laterally without using a mask 106, by appropriately controlling growth parameters and/or by appropriately patterning the underlying gallium nitride layer 104.
• a patterned layer may be formed on the underlying gallium nitride layer after vertical growth or lateral growth, and need not function as a mask.
• lateral growth in two dimensions may be used to form an overgrown gallium nitride semiconductor layer.
• mask 106 may be patterned to include an array of openings 107 that extend along two orthogonal directions such as ⁇ 1100 > and ⁇ 1120 > .
• the openings can form a rectangle of orthogonal striped patterns.
• the ratio ofthe edges ofthe rectangle is preferably proportional to the ratio ofthe growth rates ofthe ⁇ 1120 ⁇ and ⁇ 1101 ⁇ facets, for example, in a ratio of 1.4: 1.
• lateral overgrowth is allowed to continue until the lateral growth fronts coalesce at interfaces 108c, to form a continuous gallium nitride layer 108.
• the total growth time may be approximately 60 minutes.
• microelectronic devices may then be formed in regions 108b. Devices may also be formed in regions 108a if desired.
• gallium nitride semiconductor structures according to second embodiments ofthe present invention are illustrated.
• the gallium nitride structures 200 include a substrate 102 as described above.
• An underlying gallium nitride layer 104 is also included on buffer layer 102b opposite substrate 102a as described above.
• a first mask such as a first silicon dioxide mask 106 is included on O 99/44224 _ J Q - PCT/US99/04346
• the first mask 106 includes a first array of openings therein.
• the first openings are first stripes that extend along the ⁇ 1 1 00 > direction ofthe underlying gallium nitride layer 104 as described above.
• a first vertical gallium nitride layer 108a extends from the underlying gallium nitride layer 104 and through the first array of openings in the first mask 106 as described above.
• the gallium nitride semiconductor structure 200 also includes a first lateral gallium nitride layer 108b that extends laterally from the first vertical gallium nitride layer 108a onto the first mask 106 opposite the underlying gallium nitride layer 104 as described above.
• a second mask such as a second silicon dioxide mask 206 is included on the first vertical gallium nitride layer 108a. As shown, second mask 206 is laterally offset from first mask 106. It will also be understood that second mask 206 may also extend onto first vertical gallium nitride layer 108b. Preferably, second mask 206 covers all of first vertical gallium nitride layer 108b such that defects in this layer do not propagate further. It will also be understood that the second mask 206 need not be symmetrically offset with respect to first mask 106.
• the second mask 206 includes a second array of openings therein. The second openings are preferably oriented as described in connection with the first mask 106.
• the second mask 206 also may be fabricated similar to first mask 106. Still continuing with the description of Figure 6, a second vertical gallium nitride layer 208a extends from the first lateral gallium nitride layer 108a and through the second array of openings in the second mask 206. The second vertical gallium nitride layer 208a may be formed similar to first vertical gallium nitride layer 108a.
• the gallium nitride semiconductor structure 200 also includes a second lateral gallium nitride layer 208b that extends laterally from the second vertical gallium nitride layer 208a onto the second mask 206 opposite the first gallium nitride layer 108.
• the second lateral gallium nitride layer 208b may be formed using metalorganic vapor phase epitaxy as was described above.
• the second lateral gallium nitride layer 208b coalesces at second interfaces 208c, to form a second continuous monocrystalline gallium nitride semiconductor layer 208. It has been found that since the first lateral gallium nitride layer 108b is used to grow second gallium nitride layer 208, the second gallium nitride layer 208 including second vertical gallium nitride layer 208a and O 99/44224 _ j j _ PCT/US99/04346
• second lateral gallium nitride layer 208b can have a relatively low defect density, for example less than 10 4 cm "2 . Accordingly, the entire gallium nitride layer 208 can form device quality gallium nitride semiconductor material.
• microelectronic devices 210 may be formed in both the second vertical gallium nitride layer 208a and the second lateral gallium nitride layer 208b, and may bridge these layers as well. By offsetting masks 106 and 206, a continuous device quality gallium nitride layer may be obtained.
• an underlying gallium nitride layer 104 is grown on a substrate 102 as was described in detail in connection with Figure 2. Still referring to Figure 7, the underlying gallium nitride layer 104 is masked with a first mask 106 that includes a first array of openings 107 therein as was described in connection with Figure 2. Referring to Figure 8, the underlying gallium nitride layer 104 is grown through the first array of openings 107 to form first vertical gallium nitride layer 108a in the first openings as was described in connection with Figure 3.
• first gallium nitride layer 108a causes lateral overgrowth onto the first mask 106, to form first lateral gallium nitride layer 108b, as was described in connection with Figure 4.
• lateral overgrowth is optionally allowed to continue until the lateral growth fronts coalesce at first interfaces 108c, to form a first continuous gallium nitride layer 108, as was described in connection with Figure 5.
• the first vertical gallium nitride layer 108a is masked with a second mask 206 that includes a second array of openings 207 therein.
• the second mask may be fabricated as was described in connection with the first mask.
• the second mask may also be eliminated, as was described in connection with the first mask of Figure 3.
• the second mask may also be eliminated, as was described in connection with Figure 3.
• the second mask 206 preferably covers the entire first vertical gallium nitride layer 108a, so as to prevent defects therein from propagating vertically or laterally. In order to provide defect-free propagation, mask 206 may extend onto first lateral gallium nitride layer 108b as well.
• the first lateral gallium nitride layer 108c is grown vertically through the second array of openings 207, to form second vertical gallium nitride layer 208a in the second openings. Growth may be obtained as was described in connection with Figure 3.
• continued growth ofthe second gallium nitride layer 208a causes lateral overgrowth onto the second mask 206, to form second lateral gallium nitride layer 208b. Lateral growth may be obtained as was described in connection with Figure 3.
• lateral overgrowth preferably continues until the lateral growth fronts coalesce at second interfaces 208c to form a second continuous gallium nitride layer 208.
• Total growth time may be approximately 60 minutes.
• Microelectronic devices may then be formed in regions 208a and in regions 208b as shown in Figure 6, because both of these regions are of relatively low defect density. Devices may bridge these regions as well, as shown. Accordingly, a continuous device quality gallium nitride layer 208 may be formed.
• the openings 107 and 207 in the masks are preferably rectangular stripes that preferably extend along the ⁇ 1120 > and/or ⁇ 1 1 00 > directions relative to the underlying gallium nitride layer 104.
• Truncated triangular stripes having (1 1 01) slant facets and a narrow (0001) top facet may be obtained for mask openings 107 and 207 along the ⁇ 1120 > direction.
• Rectangular stripes having a (0001) top facet, (1120) vertical side faces and (1 1 01) slant facets may be grown along the ⁇ 1 1 00 > direction. For growth times up to 3 minutes, similar morphologies may be obtained regardless of orientation. The stripes develop into different shapes if the growth is continued.
• the amount of lateral growth generally exhibits a strong dependence on stripe orientation.
• the lateral growth rate ofthe ⁇ 1 1 00 > oriented stripes is generally much faster than those along ⁇ 1120 > . Accordingly, it is most preferred to orient the openings 107 and 207 so that they extend along the ⁇ 1 1 00 > direction ofthe underlying gallium nitride layer 104.
• Stripes oriented along ⁇ 1120 > may have wide (1 1 00) slant facets and either a very narrow or no (0001) top facet depending on the growth conditions. This may be because (1 1 01) is the most stable plane in the gallium nitride wurtzite crystal structure, and the growth rate of this plane is lower than that of others.
• the ⁇ 1 1 01 ⁇ planes ofthe ⁇ 1 1 00 > oriented stripes may be wavy, which implies the existence of more than one Miller index.
• the morphologies ofthe gallium nitride layers selectively grown on openings oriented along ⁇ 1 1 00 > are also generally a strong function ofthe growth temperatures. Layers grown at 1000°C may possess a truncated triangular shape. This morphology may gradually change to a rectangular cross-section as the growth temperature is increased. This shape change may occur as a result ofthe increase in the diffusion coefficient and therefore the flux ofthe gallium species along the (0001) top plane onto the ⁇ 1 1 01 ⁇ planes with an increase in growth temperature.
• the morphological development ofthe gallium nitride regions also appears to depend on the flow rate ofthe TEG.
• An increase in the supply of TEG generally increases the growth rate ofthe stripes in both the lateral and the vertical directions.
• the lateral/vertical growth rate ratio decrease from 1.7 at the TEG flow rate of 13 ⁇ mol/min to 0.86 at 39 ⁇ mol.min.
• This increased influence on growth rate along ⁇ 0001> relative to that of ⁇ 1120 > with TEG flow rate may be related to the type of reactor employed, wherein the reactant gases flow vertically and perpendicular to the substrate.
• the considerable increase in the concentration ofthe gallium species on the surface may sufficiently impede their diffusion to the ⁇ 1 1 01 ⁇ planes such that chemiso ⁇ tion and gallium nitride growth occur more readily on the (0001) plane.
• Continuous 2 ⁇ m thick gallium nitride layers 108 and 208 may be obtained using 3 ⁇ m wide stripe openings 107 and 207 spaced 7 ⁇ m apart and oriented along ⁇ 1 1 00 > , at 1100°C and a TEG flow rate of 26 ⁇ mol/min.
• the overgrown gallium nitride layers 108b and 208b may include subsurface voids that form when two growth fronts coalesce.
• the coalesced gallium nitride layers 108 and 208 may have a microscopically flat and pit-free surface.
• the surfaces ofthe laterally grown gallium nitride layers may include a terrace structure having an average step height of 0.32nm. This terrace structure may be related to the laterally grown gallium nitride, because it is generally not included in much larger area films grown only on aluminum nitride buffer layers.
• the average RMS roughness values may be similar to the values obtained for the underlying gallium nitride layers 104.
• Threading dislocations originating from the interface between the gallium nitride underlayer 104 and the buffer layer 102b, appear to propagate to the top surface ofthe first vertical gallium nitride layer 108a within the first openings 107 of the first mask 106.
• the dislocation density within these regions is approximately 10 9 cm "2 .
• threading dislocations do not appear to readily propagate into the first overgrown regions 108b. Rather, the first overgrown gallium nitride regions 108b contain only a few dislocations. These few dislocations may be formed parallel to the (0001) plane via the extension ofthe vertical threading dislocations after a 90° bend in the regrown region.
• both the second vertical gallium nitride layer 208a and the second lateral gallium nitride layer 208b propagate from the low defect first overgrown gallium nitride layer 108b, the entire layer 208 can have low defect density.
• the formation mechanism ofthe selectively grown gallium nitride layer is lateral epitaxy.
• the two main stages of this mechanism are vertical growth and lateral growth.
• Ga or N atoms should not readily bond to the mask surface in numbers and for a time sufficient to cause gallium nitride nuclei to form. They would either evaporate or diffuse along the mask surface to the openings 107 or 207 in the masks or to the vertical gallium nitride surfaces 108a or 208a which have emerged. During lateral growth, the gallium nitride grows simultaneously both vertically and laterally over the mask from the material which emerges over the openings.
• lateral cracking within the SiO may take place due to thermal stresses generated on cooling.
• the viscosity (p) ofthe SiO 2 at 1050°C is about 10 15 ' 5 poise which is one order of magnitude greater than the strain point (about 10 145 poise) where stress relief in a bulk amorphous material occurs within approximately six hours.
• the SiO 2 mask may provide limited compliance on cooling.
• chemical bonding may occur only when appropriate pairs of atoms are in close proximity. Extremely small relaxations ofthe silicon and oxygen and gallium and nitrogen atoms on the respective surfaces and/or within the bulk ofthe SiO may accommodate the gallium nitride and cause it to bond to the oxide.
• regions of lateral epitaxial overgrowth through mask openings from an underlying gallium nitride layer may be achieved via MOVPE.
• the growth may depend strongly on the opening orientation, growth temperature and TEG flow rate.
• Coalescence of overgrown gallium nitride regions to form regions with both extremely low densities of dislocations and smooth and pit-free surfaces may be achieved through 3 ⁇ m wide mask openings spaced 7 ⁇ m apart and extending along the ⁇ 1 TOO > direction, at 1100°C and a TEG flow rate of 26 ⁇ mol/min.
• the lateral overgrowth of gallium nitride via MOVPE may be used to obtain low defect density continuous gallium nitride layers for microelectronic devices.

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  • 1999-02-26 JP JP2000533892A patent/JP2002505519A/ja active Pending
  • 1999-02-26 AU AU27956/99A patent/AU2795699A/en not_active Abandoned
  • 1999-02-26 KR KR1020007009261A patent/KR100610396B1/ko not_active IP Right Cessation
  • 1999-02-26 EP EP99908553A patent/EP1070340A1/en not_active Ceased
  • 1999-02-26 CA CA002321118A patent/CA2321118C/en not_active Expired - Lifetime
  • 1999-02-26 WO PCT/US1999/004346 patent/WO1999044224A1/en not_active Application Discontinuation

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