EP1008182A1 - Hochspannungsbauelement und verfahren zu seiner herstellung - Google Patents
Hochspannungsbauelement und verfahren zu seiner herstellungInfo
- Publication number
- EP1008182A1 EP1008182A1 EP98914831A EP98914831A EP1008182A1 EP 1008182 A1 EP1008182 A1 EP 1008182A1 EP 98914831 A EP98914831 A EP 98914831A EP 98914831 A EP98914831 A EP 98914831A EP 1008182 A1 EP1008182 A1 EP 1008182A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- component
- doped
- wafer
- component according
- region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 238000000034 method Methods 0.000 title claims abstract description 10
- 239000004065 semiconductor Substances 0.000 claims abstract description 20
- 238000001465 metallisation Methods 0.000 claims description 23
- 238000004519 manufacturing process Methods 0.000 claims description 6
- 239000000463 material Substances 0.000 claims description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 3
- 229920005591 polysilicon Polymers 0.000 claims description 3
- 230000001681 protective effect Effects 0.000 claims description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims 2
- 235000012239 silicon dioxide Nutrition 0.000 claims 1
- 239000000377 silicon dioxide Substances 0.000 claims 1
- 239000002184 metal Substances 0.000 abstract 1
- 235000012431 wafers Nutrition 0.000 description 21
- 238000009792 diffusion process Methods 0.000 description 8
- 238000009413 insulation Methods 0.000 description 7
- 238000000926 separation method Methods 0.000 description 7
- 239000002019 doping agent Substances 0.000 description 5
- 238000010304 firing Methods 0.000 description 3
- 230000003321 amplification Effects 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 238000003199 nucleic acid amplification method Methods 0.000 description 2
- 230000035515 penetration Effects 0.000 description 2
- 241000283070 Equus zebra Species 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000005266 casting Methods 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/87—Thyristor diodes, e.g. Shockley diodes, break-over diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
Definitions
- the invention is based on a high-voltage component or a method for producing a high-voltage component according to the type of the independent claims.
- a high-voltage component is already known from DE 4108611, in which partial components arranged laterally on a carrier plate are connected in series. The partial components are integrated in a thin silicon layer applied to the carrier plate, which preferably has a thickness of approximately 100 micrometers.
- the high-voltage component according to the invention with the characterizing features of the independent device claim has the advantage of a simple construction, since no carrier plate is necessary due to the use of a wafer that carries itself. This results in a compact, space-saving construction.
- Another advantage is that the use of an appropriately thick wafer results in a better current distribution, in particular a higher current carrying capacity of the high-voltage component, since a larger volume of semiconductor material can contribute to a briefly high current flow, as is particularly the case when using ignition systems is required for motor vehicles.
- the method according to the invention with the characteristic features of the The independent method claim has the advantage that it represents a simple method for producing a high-voltage component, the use of a carrier plate in particular being omitted and the component directly, for example without the laborious handling of an insulated carrier plate, after the etching and passivation.
- B. by Ummolden or by casting, can be packed.
- the measures listed in the dependent claims enable advantageous developments and improvements of the high-voltage component or method for its production specified in the independent claims. It is particularly advantageous that the high-voltage component has, in addition to p-doped regions designed as separation diffusion regions, flat p-doped wells.
- This makes it possible to implement a base width of an NPN sub-transistor which is variable but nevertheless spatially homogeneous in wide areas, for example if such an NPN sub-transistor is part of a thyristor which is the sub-component.
- spatially homogeneous small base widths can be set, which lead to large current amplifications in a thyristor as a component, as are required for use to control an ignition current of an ignition coil in the motor vehicle.
- FIG. 1 shows a first exemplary embodiment
- FIG. 2 shows a second exemplary embodiment
- FIG. 3 shows a third exemplary embodiment
- FIG. 4 shows a fourth exemplary embodiment.
- FIG. 1 shows a high-voltage component according to the invention, which is arranged in a semiconductor wafer 14.
- the high-voltage component has a plurality of sub-components 10 connected in series.
- the component 10 is a thyristor.
- the wafer 14 is weakly n-doped and has p-regions 2 designed as separation diffusion regions, which completely penetrate the semiconductor wafer 14, as shown in the cross-sectional view in FIG. 1.
- the semiconductor wafer 14 is divided into n-doped regions 1.
- the p-regions 2, like the n-doped regions 1, run essentially parallel to one another, that is to say they form perpendicular to the cross-sectional view shown in FIG extensive parallel stripes.
- a p-doped well 20 is introduced into each of the n-doped regions 1, which, in contrast to the p-regions 2, does not completely penetrate the semiconductor wafer.
- the p-wells 20 extend from a left boundary 16 to a right boundary 17, the boundaries extending perpendicular to the cross-sectional view extending essentially parallel to the n-doped regions 1 and the p-regions 2.
- a strongly n-doped strip 4 is embedded in each of the p-wells 20 and also runs perpendicular to the cross-sectional view parallel to the other areas.
- the strongly n-doped strip 4 introduced into the p-well is contacted by the respective bridge cathode.
- An edge p-region 15 can be contacted via an anode metallization 7.
- the remaining surface of the front of the high-voltage component, on which no contacts are arranged, is coated with an oxide layer 8 for insulation.
- the back of the semiconductor wafer 14 is also coated with a further oxide layer 9.
- the thickness 11 of the wafer from the front to the rear is in a range from, for example, 200 to 500 micrometers, preferably in a range from 200 to 250 micrometers.
- the high-voltage component provided with connecting wires on the first bridge cathode 22 and on the anode metallization 7 is finally surrounded by a protective material or plastic (connecting wires and packaging are not shown in FIG. 1).
- the reverse current increases until a potential difference between the p-well 20 and the heavily n-doped strip 4 forms in the vicinity of the right limit 17 (for example 0.6 volts) that the high-voltage component breaks down comes ("overhead firing" of the thyristor).
- the bottom resistance is in turn influenced by the layer thickness 24 of the p-well 20 underneath the heavily n-doped strip 4.
- Small layer thickness 24 means large undermight resistance of the p-well 20. If the layer thickness 24 is selected So sufficiently small, a sufficiently large under-resistance can be set, so that not only at too high reverse currents
- the current gain of the individual NPN Partial transistor which is formed from the heavily n-doped strip 4, the p-well 20 and the n-doped region 1, and thus also the tilting behavior of the thyristor, in particular the speed of the high-voltage component, is strongly affected by the distance between the heavily n-doped strips 4 and the adjacent n-doped region 1 influenced. This distance is just the layer thickness 24 of the p-well 20 and represents the base width of the NPN partial transistor mentioned. For a high switching speed of the
- the ratio of the dopant concentrations of the dopant concentration of the heavily n-doped strip 4 to the dopant concentration of the p-well 20 must be suitably high.
- the structure shown in FIG. 1 also makes it possible to set a homogeneous base width, that is to say the base width is essentially the same at different locations of the NPN junction of the NPN partial transistor. This means that when the thyristor is fired at the right boundary 17, the entire width of the p-well 20 is immediately from the left
- Limit 16 to the right limit 17 is used for current amplification, that is, the NPN partial transistor works along its entire spatial extent.
- the location-independent base width of the NPN partial transistor thus leads to the fact that at a given required
- the component 10 designed as a thyristor can be made smaller in its lateral extent, in particular the width of the heavily n-doped strip 4 and the extent of the p-well 20 from the left boundary 16 to the right limit 17 reducible.
- the structure according to the invention can also be used for a series connection of light-tipping diodes (ie thyristors that can be fired with a light pulse) or for triac components.
- FIG. 2 shows a second exemplary embodiment of a high-voltage component, in which the same reference numerals as in FIG. 1 designate the same parts and are not described again.
- the high-voltage component has a p-well 3 which is connected to the p-region 2 of the adjacent sub-component via a p-doped region 12.
- a first is used as the cathode metallizations in the exemplary embodiment according to FIG.
- Cathode metallization 5, a second cathode metallization 6 and other metallizations, not shown in FIG. 2, are used, which are not relined by an insulation 21. This is not necessary here either because the cathode metallizations cannot come into contact with the n-doped regions 1 due to the p-doped regions 12.
- the mode of operation is essentially analogous to the prescribed exemplary embodiment. However, there is still a more compact design since there is no longer a weakly n-doped region which separates the p-wells from the p-regions 2.
- FIG. 3 shows a high-voltage component which has partial components with a p-well 3, which is provided with a gate metallization 22a or 23a.
- Gate metallizations are electrically connected to the adjacent bridge cathode 22 and 23 via resistance areas 34 and 35, respectively.
- the gate metallization 22a or 23a is designed in the form of a strip perpendicular to the cross-sectional view shown, in particular in parallel to the bridge cathodes, which are also strip-shaped.
- the gate metallizations contact the flat p-wells near their right boundary 17.
- the bridge cathodes differ from the bridge cathodes of FIG.
- an alternative insulation 32 is provided, which is also partially arranged above the heavily n-doped strip 4.
- the insulation 32 serves to set a distance between the bottom resistances formed by the flat p-wells and the respectively associated bridge cathodes 22, 23 etc.
- the resistance areas 34, 35 etc. can be used to set the tilting conditions of the
- High-voltage component can also be used. This is very advantageous if the tilting behavior of the high-voltage component should have a very small temperature dependency.
- the resistance areas 34 and 35 etc. are each connected in parallel with the bottom resistance of the respectively assigned p-well. Since the temperature dependence of the resistance range when using, for example, polysilicon is small in comparison to the temperature dependence of the under-resistance, a small resistance value for the
- Resistance ranges the temperature dependency of the resistance of the parallel connection of the resistance range and the bottom resistance, which influences the tilting condition, is determined by the temperature coefficient of the resistance range and is therefore small. This makes the one for overhead lighting one of the
- FIG. 4 shows a high-voltage component with separate p-wells 20, similar to the exemplary embodiment shown in FIG. 1, but with resistance regions 34, 35, etc., as have already been explained in the description of FIG. 3.
- the bottom resistance and the assigned resistance range are connected in series. Therefore, the value of the resistance range must be chosen so that it is greater than the bottom resistance, so that the resistance range with its small temperature response determines the temperature response of the breakdown voltage.
- Gate metalizations 22a and 23a etc. can also be arranged over the p-doped region 12 (this alternative arrangement of the gate metalization is not shown in FIG. 4, only the region 12 is marked here with its reference symbol). In this case they are
- bridge cathodes in their strip-shaped extension perpendicular to the cross-sectional view with one or more holes into which the gate metallization is arranged in isolation from the bridge cathode, either as a simply connected area or consisting of several sub-areas and separated by areas which are covered with the metallization of the bridge cathode.
- the resistance areas occurring in the exemplary embodiments mentioned are preferably made of polysilicon and either between assigned gate Metallization and bridge cathode of the neighboring component arranged, or they are placed in a suitable manner between the bridge cathode and the semiconductor wafer, each isolated from the respectively associated bridge cathode and the semiconductor wafer. The latter arrangement is a preferred embodiment for ensuring the high-voltage strength of the high-voltage component.
- This separation diffusion method consists of applying p-type dopant atoms on both sides of the semiconductor wafer in areas which are provided for the p-type regions 2 and in a further step allowing these dopant atoms to diffuse in until the semiconductor wafer is similar to a zebra pattern consisting of alternating p -doped and weakly n-doped areas.
- p-wells and heavily n-doped strips are introduced, with the p-wells 20 in particular if the p-wells 3 are to be connected to the p-regions 2 via p-doped regions 12, with p -Areas 2 can be produced in the simplest way.
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Thyristors (AREA)
Abstract
Description
Claims
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19735542A DE19735542A1 (de) | 1997-08-16 | 1997-08-16 | Hochspannungsbauelement und Verfahren zu seiner Herstellung |
DE19735542 | 1997-08-16 | ||
PCT/DE1998/000597 WO1999009597A1 (de) | 1997-08-16 | 1998-02-28 | Hochspannungsbauelement und verfahren zu seiner herstellung |
Publications (1)
Publication Number | Publication Date |
---|---|
EP1008182A1 true EP1008182A1 (de) | 2000-06-14 |
Family
ID=7839162
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP98914831A Withdrawn EP1008182A1 (de) | 1997-08-16 | 1998-02-28 | Hochspannungsbauelement und verfahren zu seiner herstellung |
Country Status (5)
Country | Link |
---|---|
US (1) | US6617661B2 (de) |
EP (1) | EP1008182A1 (de) |
JP (1) | JP2001516147A (de) |
DE (1) | DE19735542A1 (de) |
WO (1) | WO1999009597A1 (de) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19958234C2 (de) * | 1999-12-03 | 2001-12-20 | Infineon Technologies Ag | Anordnung eines Gebietes zur elektrischen Isolation erster aktiver Zellen von zweiten aktiven Zellen |
JP4146672B2 (ja) * | 2002-06-14 | 2008-09-10 | シャープ株式会社 | 静電気保護素子 |
DE102004062183B3 (de) * | 2004-12-23 | 2006-06-08 | eupec Europäische Gesellschaft für Leistungshalbleiter mbH | Thyristoranordnung mit integriertem Schutzwiderstand und Verfahren zu deren Herstellung |
DE102007029756A1 (de) * | 2007-06-27 | 2009-01-02 | X-Fab Semiconductor Foundries Ag | Halbleiterstruktur zur Herstellung eines Trägerwaferkontaktes in grabenisolierten SOI-Scheiben |
US20120043540A1 (en) * | 2009-03-16 | 2012-02-23 | Tomohiro Kimura | Semiconductor device, method for manufacturing same, and display device |
JP2011238771A (ja) * | 2010-05-11 | 2011-11-24 | Hitachi Ltd | 半導体装置 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CH584456A5 (de) * | 1975-04-24 | 1977-01-31 | Bbc Brown Boveri & Cie | |
JPS54127687A (en) * | 1978-03-28 | 1979-10-03 | Mitsubishi Electric Corp | Planar-type reverse conducting thyristor |
EP0035841A3 (de) * | 1980-03-06 | 1982-05-26 | Westinghouse Brake And Signal Company Limited | Thyristor mit kurzgeschlossenem Emitter |
US4520277A (en) * | 1982-05-10 | 1985-05-28 | Texas Instruments Incorporated | High gain thyristor switching circuit |
US5241210A (en) * | 1987-02-26 | 1993-08-31 | Kabushiki Kaisha Toshiba | High breakdown voltage semiconductor device |
DE4108611A1 (de) * | 1990-12-22 | 1992-06-25 | Bosch Gmbh Robert | Hochspannungsbauelement |
JPH07235660A (ja) * | 1992-09-30 | 1995-09-05 | Rohm Co Ltd | サイリスタの製造方法 |
FR2699015B1 (fr) * | 1992-12-04 | 1995-02-24 | Sgs Thomson Microelectronics | Dispositif de protection contre des surtensions. |
JP3781452B2 (ja) * | 1995-03-30 | 2006-05-31 | 株式会社東芝 | 誘電体分離半導体装置およびその製造方法 |
FR2751789B1 (fr) * | 1996-07-26 | 1998-10-23 | Sgs Thomson Microelectronics | Composant monolithique associant un composant haute tension et des composants logiques |
-
1997
- 1997-08-16 DE DE19735542A patent/DE19735542A1/de not_active Ceased
-
1998
- 1998-02-28 JP JP2000510168A patent/JP2001516147A/ja not_active Abandoned
- 1998-02-28 WO PCT/DE1998/000597 patent/WO1999009597A1/de not_active Application Discontinuation
- 1998-02-28 US US09/485,915 patent/US6617661B2/en not_active Expired - Fee Related
- 1998-02-28 EP EP98914831A patent/EP1008182A1/de not_active Withdrawn
Non-Patent Citations (1)
Title |
---|
See references of WO9909597A1 * |
Also Published As
Publication number | Publication date |
---|---|
JP2001516147A (ja) | 2001-09-25 |
US6617661B2 (en) | 2003-09-09 |
US20020109193A1 (en) | 2002-08-15 |
DE19735542A1 (de) | 1999-02-18 |
WO1999009597A1 (de) | 1999-02-25 |
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Legal Events
Date | Code | Title | Description |
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PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
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17P | Request for examination filed |
Effective date: 20000316 |
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AK | Designated contracting states |
Kind code of ref document: A1 Designated state(s): DE FR GB IT |
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RIN1 | Information on inventor provided before grant (corrected) |
Inventor name: QU, NING Inventor name: HOHEISEL, DIRK Inventor name: BIRECKOVEN, BERND Inventor name: MICHEL, HARTMUT |
|
RIN1 | Information on inventor provided before grant (corrected) |
Inventor name: QU, NING Inventor name: HOHEISEL, DIRK Inventor name: BIRECKOVEN, BERND Inventor name: MICHEL, HARTMUT |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN |
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18D | Application deemed to be withdrawn |
Effective date: 20050913 |