EP0947975A1 - Gammakorrekturschaltung - Google Patents

Gammakorrekturschaltung Download PDF

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Publication number
EP0947975A1
EP0947975A1 EP99302559A EP99302559A EP0947975A1 EP 0947975 A1 EP0947975 A1 EP 0947975A1 EP 99302559 A EP99302559 A EP 99302559A EP 99302559 A EP99302559 A EP 99302559A EP 0947975 A1 EP0947975 A1 EP 0947975A1
Authority
EP
European Patent Office
Prior art keywords
gamma correction
level
nodes
video signal
node
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP99302559A
Other languages
English (en)
French (fr)
Inventor
Takaaki Matono
Haruki Takata
Katsunobu Kimura
Tatsuo Nagata
Takeshi Sakai
Koichi Sudo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Hitachi Advanced Digital Inc
Original Assignee
Hitachi Ltd
Hitachi Video and Information System Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Hitachi Video and Information System Inc filed Critical Hitachi Ltd
Publication of EP0947975A1 publication Critical patent/EP0947975A1/de
Withdrawn legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2011—Display of intermediate tones by amplitude modulation
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/14—Picture signal circuitry for video frequency region
    • H04N5/20—Circuitry for controlling amplitude response
    • H04N5/202—Gamma control
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0271—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping
    • G09G2320/0276—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping for the purpose of adaptation to the characteristics of a display device, i.e. gamma correction

Definitions

  • the present invention relates to a gamma correction circuit for implementing favorable gradation and contrast of reproduced images in display devices such as a liquid crystal display device (hereinafter referred to as LCD), a plasma display panel (hereinafter referred to as PDP) and a digital micromirror device (hereinafter referred to as DMD).
  • LCD liquid crystal display device
  • PDP plasma display panel
  • DMD digital micromirror device
  • display devices such as LCDs, PDPs and DMDs have attracted attention.
  • Gamma characteristics of these new display devices are different from characteristics of the cathode-ray tube (hereinafter referred to as CRT) type heretofore used.
  • display devices such as LCDs, PDPs and DMDs have also different characteristic, respectively.
  • the gamma correction is conducted on an image transmitting side so as to cancel the gamma characteristic of a display side by supposing that the display device uses a CRT.
  • the circuit typically includes a look up table (hereinafter referred to as LUT) for specifying a predetermined characteristic by using a ROM or the like as described, for example, in JP-A-8-190363 and JP-A-8-194450 as laid-open gazette.
  • LUT look up table
  • a gamma correction circuit 100 using a LUT shown in FIG. 3 includes input terminals 101 to 103 respectively supplied with image signals of three systems, i.e., R (Red), G (Green) and B (Blue) before gamma correction, processing circuits 111 to 113 for correcting gamma characteristics respectively for the systems of R, G and B, LUTs 121 to 123 each having a plurality of LUTs for storing beforehand gamma characteristic conformed to display devices, a control circuit 130 for selecting one of the plurality of LUTs for each of LUTs 121 to 123 of the respective systems in conformity with the gamma characteristic of the display device, and output terminals 141 to 143 for outputting image signals after gamma correction.
  • the LUTs 121 to 123 are stored in a ROM 120.
  • the plurality of LTUs 121-1 to 121-n storing different gamma characteristics are included.
  • the circuit scale becomes large. It is not easy to alter the gamma characteristic from the outside.
  • An object of the present invention is to provide a gamma correction circuit capable of altering the gamma correction characteristic according to the gamma characteristic of the display device and capable of altering the gamma correction characteristic according to the input signal, by using a small circuit scale.
  • a gamma correction circuit includes a node level setting unit and a gamma correction unit.
  • An encoded M-bit (where M is an arbitrary integer) video signal is represented by using a predetermined number of sections.
  • Level values of the video signal predetermined so as to be respectively associated with 2 n + 1 number of nodes (where n is an arbitrary integer) respectively determined for the sections are set in the node level setting unit from an outside.
  • the gamma correction unit executes gamma correction of the M-bit video signal according to level values of the nodes set in the node level setting unit.
  • a level of the video signal in the M sections is represented by using the 2 n + 1 number of nodes.
  • level values of the video signal predetermined so as to be respectively associated with the nodes can be set in the node level setting unit from the outside.
  • the gamma correction unit may include a selection circuit supplied with level values of the 2 n number of nodes from the node level setting unit.
  • the selection circuit selects and outputs a level value of a start point and a level value of an end point of each of segments virtually connected between nodes, out of the 2 n + 1 number of level values specified by the node level setting unit.
  • the selection circuit may includes a first selection circuit and a second selection circuit each supplied with level values of 2 n number of nodes from the node level setting unit.
  • the first selection circuit and the second selection circuit respectively select and output the level value of the start point and the level value of the end point of each of segments virtually connected between the nodes, out of the 2 n + 1 number of level values specified by the node level setting unit.
  • the gamma correction unit may include a first control circuit for controlling the first and second selection circuits by using a value of N high-order bits (where N is an arbitrary integer) specifying the segment out of the M-bit video signal inputted from the video signal input terminal.
  • the gamma correction unit may include an addition circuit for calculating a mixture ratio, according to which level values of the end point and the start point outputted from the first and second selection circuits are mixed, by using a coefficient and predetermined computation, and generating a gamma corrected video signal.
  • the gamma correction unit may include a second control circuit for calculating the coefficient from a value of (M - N) low-order bits included in the M-bit video signal inputted from the video signal input terminal, by predetermined computation.
  • the node level setting unit may be connected to shift registers storing beforehand level values indicating the nodes, and the level values may be inputted from the shift registers to the node level setting unit.
  • the shift registers may be connected to a microprocessor, and level values of the nodes may be indicated from the microprocessor according to a characteristic of the display device.
  • the first control circuit may specify the segment by a value of N high-order bits out of the M-bit video signal, cause the first selection circuit to output a level value of a start point of the segment, and cause the second selection circuit to output a level value of an end point of the segment.
  • the node level setting unit and the gamma correction unit may be provided in a circuit of each of R system, B system and G system.
  • FIG. 1 is a block diagram showing an embodiment of a gamma correction circuit according to the present invention.
  • a gamma correction circuit 1 includes a node level setting circuit 11 for specifying at least 2 n + 1 number of node level values, where n is an arbitrary integer, a first node level selection circuit 12 supplied with 2 n number of level values for selecting a segment end point out of the 2 n + 1 number of level values set by the node level setting circuit 11, a second node level selection circuit 13 supplied with the 2 n number of level values for selecting a segment start point out of the 2 n + 1 number of level values set by the node level setting circuit 11, a video signal input terminal 17 for inputting a video signal before the gamma correction encoded in M bits, where M is an arbitrary integer, a first control circuit 14 for controlling the first node level selection circuit 12 and the second node level selection circuit 13 by using a value of N high-order bits specifying a segment out of M-bit data inputted from the video signal input terminal 17, where N is an arbitrary integer, a second control circuit 15 for outputting a coefficient for
  • nodes and segments will be described. As shown in FIG. 2, predetermined gamma characteristic curves are supposed. Assuming now that a video signal inputted from the video signal input terminal 17 is represented by eight bits and the video signal is divided into eight sections by using three high-order bits included in the eight bits, there are number 2 3 + 1 of partitions. Points existing on these partitions and each represented by an input level value and an output level value of a video signal are referred to as nodes. Each of lines virtually connecting nodes is referred to as segment. In each segment, a node indicating a low level value is referred to as start point, and a node indicating a high level value is referred to as end point.
  • FIG. 2 shows an example of the gamma characteristic obtained in the present embodiment.
  • Black dots indicate output level values which can be specified at respective nodes.
  • a gamma characteristic curve formed of eight segments can be implemented.
  • This gamma characteristic shows an example in which gamma characteristics of the three systems, i.e., R, G and B are corrected independently. It is possible to specify gamma characteristics independently and respectively for the systems of R, G and B.
  • the axis of abscissas represents an input level value and the axis of ordinates represents an output level value, and the gamma characteristic curve is represented by eight segments connecting nine nodes.
  • the eight segments 1 to 8 have three high-order bits equivalent to "000”, "001", “010”, “011”, “100”, “101", “110” and “111”, respectively.
  • output level values of nine nodes for example, output level values of the nodes 0 to 7 can be made values at points where the input level has five low-order bits "00000”, and an output level value of the node 8 can be made a value at a point where the input level has five low-order bits "11111".
  • level values of end points of the node 8 to node 1 are inputted respectively to points of the first node level selection circuit 12 associated with three high-order bits
  • level values of start points of the node 0 to node 7 are inputted respectively to points of the second node level selection circuit 13 associated with the three high-order bits.
  • the level value of the first node level selection circuit 12 specifies the output level value of the end point of each segment.
  • the level value of the second node level selection circuit 13 specifies the output level value of the start point of each segment.
  • the first control circuit 14 selects an output level value "A" of an end point of a segment included in the eight segments and associated with input data of the three high-order bits.
  • the first control circuit 14 selects an output level value "B" of a start point of a segment included in the eight segments and associated with input data of the three high-order bits.
  • the adder 16 conducts computation in accordance with an expression of kA + (1 - k) B, and specifies an output level value between the start point and the end point of each segment.
  • An output signal computed by the adder 16 is outputted from the video signal output terminal 18. A video output is thus obtained after gamma correction.
  • this gamma correction circuit 1 can be easily altered by rewriting the node level setting circuit 11, the gamma correction circuit 1 corresponding to a display device, such as a LCD, PDP, and DMD, can be obtained.
  • the gamma correction circuit shown in FIG. 1 can be incorporated as a one-chip LSI. By incorporating it in display devices of all different types, video images corresponding to the video transmitting side can be displayed. It is a matter of course that the shift registers 20 and the microprocessor 21 can also be incorporated into the one-chip LSI.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Picture Signal Circuits (AREA)
  • Transforming Electric Information Into Light Information (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Controls And Circuits For Display Device (AREA)
EP99302559A 1998-04-02 1999-03-31 Gammakorrekturschaltung Withdrawn EP0947975A1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP10089643A JPH11288241A (ja) 1998-04-02 1998-04-02 ガンマ補正回路
JP08964398 1998-04-02

Publications (1)

Publication Number Publication Date
EP0947975A1 true EP0947975A1 (de) 1999-10-06

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Family Applications (1)

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EP99302559A Withdrawn EP0947975A1 (de) 1998-04-02 1999-03-31 Gammakorrekturschaltung

Country Status (3)

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US (1) US6344857B1 (de)
EP (1) EP0947975A1 (de)
JP (1) JPH11288241A (de)

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EP1258859A1 (de) * 2001-05-18 2002-11-20 Chunghwa Picture Tubes, Ltd. Verfahren zur segmentierten invertierten Gammakorrektur für eine Plasmaanzeigetafel
EP1336954A1 (de) * 2002-02-14 2003-08-20 Seiko Epson Corporation Datentreiberschaltung und Treiber-Verfahren für Anzeige mit aktiver Matrix
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EP1486944A1 (de) * 2003-06-12 2004-12-15 Himax Technologies, Inc. Vorrichtung für Gamma-Korrektur in einer Flüssigkristallanzeige
FR2858740A1 (fr) * 2003-08-08 2005-02-11 St Microelectronics Sa Dispositif de correction pour systeme d'affichage
EP1557814A2 (de) * 2003-12-31 2005-07-27 LG Electronics Inc. Verfahren zur Darstellung von Grauwerten in einer Plasmaanzeige
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KR100743498B1 (ko) * 2005-08-18 2007-07-30 삼성전자주식회사 표시 장치의 전류 구동 데이터 드라이버 및 이를 가지는표시 장치
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Cited By (26)

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Publication number Priority date Publication date Assignee Title
US6340996B1 (en) 1998-10-06 2002-01-22 Matsushita Electric Industrial Co., Ltd. γ Correction system and method utilizing graph approximation
WO2000021303A1 (en) * 1998-10-06 2000-04-13 Matsushita Electric Industrial Co., Ltd. η CORRECTION CIRCUIT AND η CORRECTION METHOD
AU2001250556B2 (en) * 2000-03-24 2005-04-28 Light-House Technologies Ltd. Selected data compression for digital pictorial information
WO2001071701A2 (en) * 2000-03-24 2001-09-27 Lighthouse Technologies Ltd. Selected data compression for digital pictorial information
WO2001071701A3 (en) * 2000-03-24 2002-04-04 Lighthouse Technologies Ltd Selected data compression for digital pictorial information
CN100433794C (zh) * 2000-03-24 2008-11-12 兆光科技有限公司 用于数字图像信息的选择数据压缩方法和装置
EP1258859A1 (de) * 2001-05-18 2002-11-20 Chunghwa Picture Tubes, Ltd. Verfahren zur segmentierten invertierten Gammakorrektur für eine Plasmaanzeigetafel
EP1336954A1 (de) * 2002-02-14 2003-08-20 Seiko Epson Corporation Datentreiberschaltung und Treiber-Verfahren für Anzeige mit aktiver Matrix
US7068292B2 (en) 2002-02-14 2006-06-27 Seiko Epson Corporation Display driver circuit, display panel, display device, and display drive method
KR100532722B1 (ko) * 2002-02-14 2005-11-30 세이코 엡슨 가부시키가이샤 표시 구동 회로, 표시 패널, 표시 장치 및 표시 구동 방법
US7038721B2 (en) 2002-02-15 2006-05-02 Koninklijke Philips Electronics N.V. Gamma correction circuit
US6989804B2 (en) 2002-04-11 2006-01-24 Thomson Licensing S.A. Method and apparatus for processing video pictures, especially for improving grey scale fidelity portrayal
CN100341040C (zh) * 2002-04-11 2007-10-03 汤姆森许可贸易公司 处理视频图像的方法和设备
EP1353315A1 (de) * 2002-04-11 2003-10-15 Thomson Licensing S.A. Verfahren und Vorrichtung zur Verbesserung der Grauwertauflösung einer Bildanzeigevorrichtung
EP1353314A1 (de) * 2002-04-11 2003-10-15 Deutsche Thomson-Brandt Gmbh Verfahren und Vorrichtung zur Verbesserung der Grauwertauflösung einer Bildanzeigevorrichtung
US7095395B2 (en) 2002-10-21 2006-08-22 Himax Technologies, Inc. Gamma correction apparatus for a liquid crystal display
EP1486944A1 (de) * 2003-06-12 2004-12-15 Himax Technologies, Inc. Vorrichtung für Gamma-Korrektur in einer Flüssigkristallanzeige
EP1515299A1 (de) 2003-08-08 2005-03-16 St Microelectronics S.A. Vorrichtung zur Korrektur des optischen Verhaltens eines flachen Anzeigesystems
FR2858740A1 (fr) * 2003-08-08 2005-02-11 St Microelectronics Sa Dispositif de correction pour systeme d'affichage
US7573468B2 (en) 2003-08-08 2009-08-11 Stmicroelectronics Sa Correction device for a display system
EP1557814A2 (de) * 2003-12-31 2005-07-27 LG Electronics Inc. Verfahren zur Darstellung von Grauwerten in einer Plasmaanzeige
US7397445B2 (en) 2003-12-31 2008-07-08 Lg Electronics Inc. Method of displaying gray scale in plasma display panel
EP1557814A3 (de) * 2003-12-31 2006-08-30 LG Electronics Inc. Verfahren zur Darstellung von Grauwerten in einer Plasmaanzeige
EP1722577A1 (de) * 2005-05-12 2006-11-15 Samsung Electronics Co.,Ltd. Verfahren und System zur Farbkorrektur einer Anzeigevorrichtung
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CN111443754B (zh) * 2020-04-07 2022-08-30 京东方科技集团股份有限公司 伽马电压输出电路及模块、校准方法及装置、显示装置

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US6344857B1 (en) 2002-02-05

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