EP1353315A1 - Verfahren und Vorrichtung zur Verbesserung der Grauwertauflösung einer Bildanzeigevorrichtung - Google Patents

Verfahren und Vorrichtung zur Verbesserung der Grauwertauflösung einer Bildanzeigevorrichtung Download PDF

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Publication number
EP1353315A1
EP1353315A1 EP03290429A EP03290429A EP1353315A1 EP 1353315 A1 EP1353315 A1 EP 1353315A1 EP 03290429 A EP03290429 A EP 03290429A EP 03290429 A EP03290429 A EP 03290429A EP 1353315 A1 EP1353315 A1 EP 1353315A1
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EP
European Patent Office
Prior art keywords
luminance
sub
codes
field
levels
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP03290429A
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English (en)
French (fr)
Inventor
Carlos Correa
Cédric Thebault
Sébastien Weitbruch
Rainer Zwing
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THOMSON LICENSING
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Thomson Licensing SAS
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Filing date
Publication date
Priority claimed from EP02290907A external-priority patent/EP1353314A1/de
Application filed by Thomson Licensing SAS filed Critical Thomson Licensing SAS
Priority to EP03290429A priority Critical patent/EP1353315A1/de
Publication of EP1353315A1 publication Critical patent/EP1353315A1/de
Withdrawn legal-status Critical Current

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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007Display of intermediate tones
    • G09G3/2044Display of intermediate tones using dithering
    • G09G3/2051Display of intermediate tones using dithering with use of a spatial dither pattern
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007Display of intermediate tones
    • G09G3/2018Display of intermediate tones by time modulation using two or more time intervals
    • G09G3/2022Display of intermediate tones by time modulation using two or more time intervals using sub-frames
    • G09G3/2033Display of intermediate tones by time modulation using two or more time intervals using sub-frames with splitting one or more sub-frames corresponding to the most significant bits into two or more sub-frames
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • G09G3/288Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
    • G09G3/291Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
    • G09G3/294Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for lighting or sustain discharge
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0266Reduction of sub-frame artefacts
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0285Improving the quality of display appearance using tables for spatial correction of display data
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02Details of power systems and of start or stop of display operation
    • G09G2330/021Power management, e.g. power saving
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00Aspects of the architecture of display systems
    • G09G2360/16Calculation or use of calculated indices related to luminance levels in display data

Definitions

  • the present invention relates to a method for processing video pictures, especially to a method for improving grey scale fidelity portrayal of pictures displayed on matrix display screens like plasma display panels (PDPs) or other display devices based on the principle of duty cycle modulation (PWM for Pulse Width Modulation) of light emission.
  • PDPs plasma display panels
  • PWM Pulse Width Modulation
  • the invention also relates to an apparatus for carrying out the method.
  • a plasma display panel is constituted by two insulating plates sealed together to form a space filled with gas. Ribs are provided inside the space to form a matrix array of discharge cells which could only be "ON” or “OFF". Also, unlike other displays such as CRT (Color ray tube) or LCD (Liquid Crystal Display) in which grey levels are expressed by analogue control of the light emission, a PDP controls the grey level by modulating the number of light pulses per frame. These light pulses are known as sustain pulses. The time-modulation will be integrated by the eye over a period corresponding to the eye time response.
  • each sub-field SF corresponds to one of the 8 bits as shown in figure 1.
  • each sub-field SF is a period of time comprising :
  • a priming pulse P may be used at the beginning of the frame period. Such priming makes a pre-excitation of the plasma cell to prepare the cells for homogeneous writing of each sub -field.
  • PDPs require use of a Peak White Enhancement (PWE) circuit, which controls peak white level as a function of average image power.
  • PWE Peak White Enhancement
  • the number of peak white sustain pulses is adapted to said average picture power and the sustain pulses can not be neatly divided amongst the sub-fields as mentioned above.
  • the gist of the present invention is to replace a given sub-field code based on sub-field weights by a metacode based on sub -field actual luminance.
  • the gist of the present invention is also to propose an apparatus for implementing the method which avoids large additional cost.
  • the present invention relates to a method for improving grey scale fidelity portrayal of pictures displayed on a display device wherein the grey level is obtained by modulating the number of light pulses per frame or sustain pulses, said method comprising the following steps :
  • the video levels are processed to perform with a spatial and temporal change of the display value, a luminance linear interpolation between the available luminance levels.
  • the video levels are dithered and truncated to integer precision . So the fractional part of luminance resolution lying between two consecutive luminance values may be rendered.
  • the mapping of sub-field codes to luminance codes is done by using a sub-field sustain luminance model.
  • Such luminances model allows to evaluate the expected luminance brightness when the number of priming, sub-field writing and sustaining operations is known. It can also be done by using the luminance value of the sub-field.
  • the luminance level for a given code is experimentally measured for a reference panel, i.e. a panel considered as typical for a given technology with centered physical parameters.
  • the re-ordering of the luminance code is done according to the ascending luminance values and if several codes produce approximately the same luminance codes, it is possible to drop some of them, the number of luminance codes being smaller than the number of original codes.
  • step d the mapping of the luminance codes is done with fractional precision, for example with 3 bits on the right side of the coma. This fractional precision corresponds to the part of luminance resolution beyond the discrete set of luminance levels of resolution that can be portrayed with a given plasma technology.
  • the present invention relates also to an apparatus for performing the above method.
  • Said apparatus includes a picture average power measuring circuit, a control unit comprising a power level mode table and selecting the requested power level mode according to the average power value given by the average power measuring circuit, a meta-code sub-field coding unit for implementing at least the steps d and e.
  • the meta-sub-field coding unit comprises two look-up-table blocks for implementing steps d and e. Between the two look-up-table blocks is provided a dithering adder and truncation block.
  • the look-up-table blocks are realised by an EEPROM memory that can be read bit sequentially by the c ontrol unit.
  • each sub-field SF has assigned a specific weight which determines how many light pulses are produced in this sub-field.
  • Light generation is controlled by sub-field code words.
  • a sub-field code word is a binary number which controls sub-field activation and inactivation. Each bit being set to 1 activates the corresponding sub-field SF. Each bit being set to 0 inactivates the corresponding sub-field SF. In an activated sub-field SF, the assigned number of light pulses or sustain pulses will be generated. In an inactivated sub-field, there will be no light generation.
  • the sub-field weights are the following : 1, 2, 4, 8, 16, 32, 32, 32, 32, 32, 3 2, 32.
  • each sub-field period comprises :
  • the building of meta-codes generated upon the output luminance levels requires either the use of a sub-field sustain luminance model or the determination of the real luminance value.
  • sustain luminance model An example of a sustain luminance model will be given hereafter. This model can be more or less accurate. A valid first approximation model may be obtained by measuring some values and then, by determining the curve that best fits to the experimental points.
  • the method of building meta-codes according to the present invention will be explained in the case of two different power levels, the first one corresponding to 255 sustain pulses and the second one to 382 sustain pulses amongst a range from about 120 sustain pulses up to 1200 sustain pulses.
  • the generation of the first 20 video levels amongst 1024 (corresponding to 10 bits of input video resolution) will be described in the examples.
  • the step a consists in distributing the 255 sustain pulses among the 12 sub-fields.
  • the mapping is straightforward.
  • step b the sub-field codes are mapped to luminance levels using the luminance model described above.
  • priming is not considered because its contribution is a merely constant offset for all codes which can not be compensated.
  • the first 6 sub-field codes need to be considered for the coding of the first 20 video levels.
  • the following step consists in re-ordering the luminance codes in order of ascending luminance.
  • two or more of the weight codes produce approximately the same luminance, it is possible to drop some of them leading to a number of luminance codes smaller than the number of the original codes.
  • the video levels are mapped to the luminance codes.
  • the maximum video level 1023 corresponding to a peak white video level is mapped to the maximal luminance level which is chosen to be of 255.75 cd m-2 instead of 261 cd m-2.
  • the value 261 cd m-2 corresponds to the maximum value of luminance that is produced when all 12 sub-fields are on.
  • the choice of 255.75 cd m-2 corresponds to 0.25 cd m-2 per video level. This simplifies calculations.
  • step d video levels are dithered and truncated to integer precision.
  • the mapping of step d is done by using a look up table of 1024 entries and 11 bits.
  • the 11 bits available from the look up table correspond to 8 bits integer resolution and 3 bits fractional resolution.
  • the 3 bits of fractional resolution are added with the 3 bits of dithering and then truncated.
  • a dithering method is used at this level for reducing the perceptibility of quantisation noise. This noise is due to the fact that the displayed luminance is linear to the number of pulses but the eye response and its sensitivity to noise is not linear.
  • the last step of the method of the present invention consists in mapping the luminance codes to the output sub-field codes. This step used a second look up table of 256 entries * 16 bits.
  • the luminance codes are re-ordered as follows : SF code luminance luminance code 0 0.00 cd m-2 #0 1 1.50 cd m-2 #1 2 3.50 cd m-2 #2 3 5.00 cd m-2 #3 4 6.50 cd m-2 #4 5 8.00 cd m-2 #5 6 10.00 cd m-2 #6 In this case, no sub-field code has been dropped.
  • the peak-white video level 1023 is mapped to 383.625 cd m-2. This corresponds to 0.375 per level.
  • the step concerning dithering of video level and truncation to integer precision is done as described above.
  • the luminance codes are mapped to output sub-field codes : luminance code SF code SF mapping #0 0 0000 0000 0000 #1 1 1000 0000 0000 #2 2 0100 0000 0000 #3 3 1100 0000 0000 #4 4 0010 0000 0000 #5 5 1010 0000 0000
  • FIG 3 a block diagram of a possible circuit implementation for the above explained method is illustrated.
  • Input R, G, B video data is forwarded to a video degamma unit 10.
  • Output R, G, B video data is forwarded to an average power measure unit 11 and to a metacode sub-field coding unit 13.
  • the average power measure unit may be of the type described in PCT patent application WO00/46782.
  • the average power measure unit 11 calculates the average power value AP and forwards it to the peak white enhancements or PWE control block 12.
  • the average power value of a picture is calculated by simply summing up the pixel values for all R, G, B data streams and dividing the result through the number of pixel values multiplied by three.
  • the control block 12 consults its internal power level mode table and directly generates the selected mode control signals for the other processing blocks. It selects the sustain table to be used and the sub-field meta-code to be used, i.e. the data MC [7,0] coded on 8-bits corresponding to the 256 metacodes necessary for a full range of power levels from about 120 sustain pulses up to 1200 sustain pulses.
  • the PWE control block 12 also controls the 2 Frame Memory circuit 14 and the Serial/Parallel conversion circuit 15. More specifically, it controls the writing of RGB pixel data in the first frame memory of the circuit 15 through the WR signal and the reading of RGB sub-field data from the second frame memory of the circuit 15 through the RD signal.
  • the RGB sub-field data SF-R, SF-G, SF-B are forwarded from the 2 Frame Memory circuit 14 to the Serial/Parallel conversion circuit 15 controlled by the SP signal from the PWE control circuit 12.
  • the PWE control circuit 12 generates the SCAN and SUSTAIN pulses required to control the PDP driver circuits 16,17.
  • two frame memories are required in the circuit 14. Data is written pixel-wise into one frame memory, but read sub-field-wise from the other frame memory. In order to read the complete first sub-field, a whole frame must already be present in the memory. In a practical implementation two whole frame memories are present, and while one frame memory is being written, the other is being read, avoiding in this way reading the wrong data. As later seen, in a cost optimized architecture, the two frame memories may be located on the same SDRAM memory IC, and access to the two frames is time multiplexed.
  • the described implementation introduces a delay of 1 frame between power measurement and sub-field coding. Power level is measured, and at the end of a given frame, the average power value becomes available to the controller 12. At that time, it is however too late to take an action, for instance like modifying the metacode selection LUTs, because data has already been written in the frame memory.
  • Fig. 4 shows one possible implementation of the metacode sub-field coding unit 13.
  • This unit comprises a first look up table 130 comprising 1024 x 11 bits for handling 10 bits of input video resolution as described in the above method.
  • Each of the 3 color components is coded with the same look-up tables.
  • the first look-up table 130 is used for the implementation of step d of the coding process.
  • the look-up table 130 is controlled by the MC value from the PWE control unit 12.
  • 11 bits video signal is obtained.
  • the available 11-bits correspond to 8-bits integer resolution and 3-bits fractional resolution.
  • the 11-bits of video signal YA [10-0] are forwarded to a circuit 131.
  • the 3-bits of fractional resolution are added with the 3-bits of dithering forwarded by the dithering circuit 132 and then truncated.
  • the dithering circuit 132 may be a 3D-chess-pattern dithering block as described in EP patent application 00 250 099.9. Other dithering patterns could also be used.
  • the circuit 131 is used to implement step e in the above described method.
  • the video signal YB[7,0] from the circuit 131 is then forwarded to a second look-up table 1333 comprising 256 x 16 bits.
  • This look-up table 133 is used to implement step f in the above described method.
  • the look-up table data is stored on an external EPROM circuit 21 that can be read bit sequentially by the controller 20.
  • new LUT data has to be downloaded by the controller.
  • the sub-field coding processed has to be stopped. Since access to the external EPROM is sequential, thus quite slow, some video lines might be lost which would be acceptable.
  • external SDRAM circuit 22 main function is to store the 2 frames of required video memory. Its capacity will usually be larger than the minimum required for storing those 2 frame memories. This is due to the fact that memory capacity corresponds always to a power of 2 ; i.e. 64 Mbit, 128 Mbit, 256 Mbit and so on. The redundant memory space is more than enough to store the complete meta-codes look-up tables.
  • the main idea of the implementation of figure 5 is to transfer all the look-up tables data to the free SDRAM address space, during set power-up.
  • LUT data is sequentially read from the external EPROM using pins SCLK and SDATA.
  • the plasma controller will, at the end of every frame during the vertical blanking, compute the picture power and the required meta-code for the following frame.
  • the controller will request the required data from the SDRAM, and will load the required table data on the internal sub-field coding block. This access will be quite fast because no sub-field data has to be written or read in the SDRAM during vertical blanking, and SDRAM bandwith is huge.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
EP03290429A 2002-04-11 2003-02-21 Verfahren und Vorrichtung zur Verbesserung der Grauwertauflösung einer Bildanzeigevorrichtung Withdrawn EP1353315A1 (de)

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Application Number Priority Date Filing Date Title
EP03290429A EP1353315A1 (de) 2002-04-11 2003-02-21 Verfahren und Vorrichtung zur Verbesserung der Grauwertauflösung einer Bildanzeigevorrichtung

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP02290907A EP1353314A1 (de) 2002-04-11 2002-04-11 Verfahren und Vorrichtung zur Verbesserung der Grauwertauflösung einer Bildanzeigevorrichtung
EP02290907 2002-04-11
EP03290429A EP1353315A1 (de) 2002-04-11 2003-02-21 Verfahren und Vorrichtung zur Verbesserung der Grauwertauflösung einer Bildanzeigevorrichtung

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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1587050A1 (de) * 2004-04-13 2005-10-19 Deutsche Thomson-Brandt Gmbh Universelles Zeitsteuerungsgerät für eine Plasmaanzeigetafel
EP1596354A2 (de) * 2004-05-14 2005-11-16 LG Electronics Plasmaanzeigegerät und Bildverarbeitungsverfahren dafür
EP1630773A1 (de) 2004-08-25 2006-03-01 Thomson Licensing Verfahren und Vorrichtung zum Halbtonzittern
EP1638067A1 (de) * 2004-09-15 2006-03-22 Deutsche Thomson-Brandt Gmbh Verfahren und Vorrichtung zur Erzeugung von Teilfeldsteuerworten
EP1638068A1 (de) 2004-09-15 2006-03-22 Thomson Licensing Verfahren und Vorrichtung zur Erzeugung von Teilfeldsteuerworten
CN100456350C (zh) * 2005-02-16 2009-01-28 日本电气株式会社 图像处理方法、显示设备及其驱动方法
CN109076259A (zh) * 2016-04-07 2018-12-21 哉英电子股份有限公司 视频信号发送装置、视频信号接收装置以及视频信号传输系统

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0919984A2 (de) * 1997-10-09 1999-06-02 THOMSON multimedia Verfahren und Vorrichtung zum Abtasten einer Plasmaanzeigetafel
EP0947975A1 (de) * 1998-04-02 1999-10-06 Hitachi, Ltd. Gammakorrekturschaltung
EP1014330A2 (de) * 1998-12-24 2000-06-28 Fujitsu Limited Steuerung des dynamischen Bereichs eines Anzeigegeräts
WO2000046782A1 (en) * 1999-02-01 2000-08-10 Thomson Licensing S.A. Method for power level control of a display device and apparatus for carrying out the method
EP1136974A1 (de) * 2000-03-22 2001-09-26 Deutsche Thomson-Brandt Gmbh Videobilddatenverarbeitungsverfahren für eine Anzeigevorrichtung

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0919984A2 (de) * 1997-10-09 1999-06-02 THOMSON multimedia Verfahren und Vorrichtung zum Abtasten einer Plasmaanzeigetafel
EP0947975A1 (de) * 1998-04-02 1999-10-06 Hitachi, Ltd. Gammakorrekturschaltung
EP1014330A2 (de) * 1998-12-24 2000-06-28 Fujitsu Limited Steuerung des dynamischen Bereichs eines Anzeigegeräts
WO2000046782A1 (en) * 1999-02-01 2000-08-10 Thomson Licensing S.A. Method for power level control of a display device and apparatus for carrying out the method
EP1136974A1 (de) * 2000-03-22 2001-09-26 Deutsche Thomson-Brandt Gmbh Videobilddatenverarbeitungsverfahren für eine Anzeigevorrichtung

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1587050A1 (de) * 2004-04-13 2005-10-19 Deutsche Thomson-Brandt Gmbh Universelles Zeitsteuerungsgerät für eine Plasmaanzeigetafel
EP1596354A2 (de) * 2004-05-14 2005-11-16 LG Electronics Plasmaanzeigegerät und Bildverarbeitungsverfahren dafür
EP1596354A3 (de) * 2004-05-14 2007-06-20 LG Electronics Plasmaanzeigegerät und Bildverarbeitungsverfahren dafür
US7696958B2 (en) 2004-05-14 2010-04-13 Lg Electronics Inc. Plasma display apparatus and image processing method thereof
EP1630773A1 (de) 2004-08-25 2006-03-01 Thomson Licensing Verfahren und Vorrichtung zum Halbtonzittern
EP1638067A1 (de) * 2004-09-15 2006-03-22 Deutsche Thomson-Brandt Gmbh Verfahren und Vorrichtung zur Erzeugung von Teilfeldsteuerworten
EP1638068A1 (de) 2004-09-15 2006-03-22 Thomson Licensing Verfahren und Vorrichtung zur Erzeugung von Teilfeldsteuerworten
CN100456350C (zh) * 2005-02-16 2009-01-28 日本电气株式会社 图像处理方法、显示设备及其驱动方法
CN109076259A (zh) * 2016-04-07 2018-12-21 哉英电子股份有限公司 视频信号发送装置、视频信号接收装置以及视频信号传输系统
CN109076259B (zh) * 2016-04-07 2021-04-27 哉英电子股份有限公司 视频信号发送装置、视频信号接收装置以及视频信号传输系统

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