EP0910002B1 - Verfahren zur Herstellung eines sehr genauen Stroms - Google Patents

Verfahren zur Herstellung eines sehr genauen Stroms Download PDF

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Publication number
EP0910002B1
EP0910002B1 EP97117804A EP97117804A EP0910002B1 EP 0910002 B1 EP0910002 B1 EP 0910002B1 EP 97117804 A EP97117804 A EP 97117804A EP 97117804 A EP97117804 A EP 97117804A EP 0910002 B1 EP0910002 B1 EP 0910002B1
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EP
European Patent Office
Prior art keywords
current
transistor
terminal
voltage
value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
EP97117804A
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English (en)
French (fr)
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EP0910002A1 (de
Inventor
Tim Bales
Serge Bitz
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EM Microelectronic Marin SA
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EM Microelectronic Marin SA
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Filing date
Publication date
Application filed by EM Microelectronic Marin SA filed Critical EM Microelectronic Marin SA
Priority to DE69739232T priority Critical patent/DE69739232D1/de
Priority to AT97117804T priority patent/ATE421723T1/de
Priority to EP97117804A priority patent/EP0910002B1/de
Priority to TW087116619A priority patent/TW437137B/zh
Priority to JP10290688A priority patent/JPH11249751A/ja
Priority to US09/173,162 priority patent/US6137273A/en
Publication of EP0910002A1 publication Critical patent/EP0910002A1/de
Application granted granted Critical
Publication of EP0910002B1 publication Critical patent/EP0910002B1/de
Anticipated expiration legal-status Critical
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/24—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only

Definitions

  • the present invention relates to current supply means. More specifically, it relates to means for providing a high precision current, to an external element intended to be connected to these means.
  • the figure 1 represents a circuit comprising a first example of conventional current supply means 1 intended to be connected, by a connection line 5, to an element 3 outside this circuit.
  • the means 1 are arranged to supply the element 3 with a current I1 at a desired predetermined value or nominal value, this value being designated by the reference I1o.
  • the means 1 comprise an operational amplifier A1 and a field effect transistor T1.
  • the means 1 further include integrated resistors such as field effect transistors operating in ohmic mode, the reference Rint designating the resistance equivalent to all of these integrated resistors.
  • the various components of the means 1 are made by a CMOS type of manufacturing process widely used in the semiconductor industry. It goes without saying that these components also include a connection terminal to a voltage source (not shown) arranged to supply a supply voltage Vdd to these components.
  • the transistor T1 produced by a bushing of the aforementioned type typically comprises a drain terminal D, a source terminal S and a gate terminal G.
  • the terminal D of the transistor T1 is connected to the external element 3 via the line 5, and the terminal S of the transistor T1 is connected to one of the terminals of the resistor Rint.
  • the operational amplifier A1 typically comprises an inverting terminal, a non-inverting terminal and an output terminal.
  • the inverting terminal of the operational amplifier A1 is connected to voltage supply means (not shown) arranged to supply a reference voltage Vref, its non-inverting terminal is connected to the terminal S of the transistor T1, and the terminal of output of the operational amplifier A1 is connected to the terminal G of the transistor T1.
  • the latter becomes stable when the voltage at the non-inverting terminal of the operational amplifier A1 (that is to say the voltage present at the source terminal S) is substantially equal to that present at the non-inverting terminal. inverter of the operational amplifier A1 (that is to say the reference voltage Vref).
  • the output voltage of the operational amplifier A1 is substantially constant, so that this voltage supplied to the terminal G of the transistor T1, maintains the current I1 which passes through the transistor T1 equal to its nominal value.
  • the circuit represented in figure 1 allows an adjustment of the value of the current I1 to its nominal value, this adjustment is commonly called by the term "trimming". Indeed, the practical realization of the various components of this circuit inevitably leads to variations of technological parameters, in particular the value of the internal resistance Rint which varies up to ⁇ 30% with respect to its desired value. Such variations cause the supply of the current I1 to a value different from its nominal value.
  • the value of the current I1 supplied by the means 1 to which the integrated resistors which are initially short-circuited by connection lines is measured, as represented by FIG. figure 1 . Then, some of these connection lines are cut with a laser beam, which connects to the means 1 the integrated resistors initially short-circuited by these lines. This has the effect of increasing the value of the resistor Rint connected in series with the transistor T1, that is to say to modify the value of the current I1. Such an adjustment is made until the value of the current I1 is equal to its nominal value.
  • a disadvantage of the power supply means represented in figure 1 is that it requires the realization of a plurality of adjustment elements, which goes against the usual concerns in the semiconductor industry, complexity, size and cost .
  • the figure 2 represents a circuit comprising a second example of conventional current supply means 6. Note that this circuit is similar to that shown in figure 1 . Thus, the components represented in figure 2 and designated by the same references as those represented in figure 1 , are identical to those designated in figure 1 .
  • the means 6 are connected to an external resistor Rext to these means.
  • the resistor Rext is connected between the terminal S of the transistor T1 and the ground.
  • the resistance Rext represented in figure 2 allows the adjustment of the current I1 to its nominal value.
  • a disadvantage of the power supply means represented in figure 2 resides in the fact that it requires the realization of a resistor Rext having a low resistance value, in the case where the value of the current I1 to be supplied must be high. Indeed, considering that the supply voltage Vdd is known and constant, the voltage present between the terminal D of the transistor T1 and the mass is thus determined and substantially constant. As a result, a high value of the resistor Rext has the effect of reducing the voltage present between the terminal D of the transistor T1 and its terminal S, since the resistor Rext is connected in series with the external element 3 and the transistor T1 . It is therefore necessary to increase the dimensions of the active surface of the transistor T1 so that the current I1 passing through it is equal to said predetermined value.
  • resistor Rext having a low resistance value (typically of the order of a few ohms) is expensive, especially in the case where it is desired that this resistance has an accuracy of the order of ⁇ 5%.
  • a first precise current is provided by a first transistor 18, whose gate terminal 26 is connected to the output terminal of the operational amplifier 14.
  • a second transistor 16 has its gate terminal connected. also to the output terminal of the amplifier and its drain terminal connected to an external reference resistor and the non-inverting terminal of the amplifier.
  • An object of the present invention is to provide means for providing a high accuracy current without being influenced by a voltage variation of the supply voltage source of said means, these means thus overcoming the aforementioned drawbacks.
  • Another object of the present invention is to provide such power supply means, without it being necessary to integrate with these means additional adjustment elements.
  • Another object of the present invention is to provide such current supply means, without it being necessary to connect to these means an external adjustment resistor having a low resistance value, in the case where the value of the current to provide must be high.
  • Another object of the present invention is to provide such current supply means capable of providing a current with improved accuracy, especially in the case of variations of the electrical parameters of the external element connected to these means.
  • Another object of the present invention is to provide such means meeting the traditional criteria in the semiconductor industry, complexity, size and cost.
  • An advantage of the arrangement of the current supply means according to the present invention is to be able to adjust the first current value by the resistance value of the external resistor, without the need to connect additional adjustment elements on the line of resistance. conduction of the first current. This makes it possible to determine the dimensions of the various components of these means by optimizing the dimensions of the first transistor.
  • Another advantage of the arrangement of the current supply means according to the present invention is to be able to connect an external resistor having a usual resistance value, while guaranteeing a precision of this resistance of the order of ⁇ 1%, and a low cost of purchase.
  • An advantage of the first and second transistors is to be connected to operate in saturation mode, this has the effect of maintaining the current flowing in the first transistor at its nominal value, especially in the case where the voltage present between the terminal of drain of this transistor and its source terminal, is modified.
  • the figure 3 represents a circuit diagram of a circuit comprising a first embodiment of current supply means 30 according to the present invention.
  • the means 30 are intended to be connected, by a connection line 5, to an element 3 outside these means.
  • the means 30 are arranged to supply the element 3 with a first current I3 at a desired predetermined value or nominal value.
  • the means 30 comprise an operational amplifier A2 and at least a first transistor T3 arranged so that the value of the current I3 which passes through it is substantially equal to its nominal value.
  • the various components of the circuit represented in figure 3 are preferably carried out by a CMOS type of manufacturing process widely used in the semiconductor industry. It goes without saying that these components also include a connection terminal to a voltage source (not shown) arranged to supply a supply voltage Vdd to these components.
  • the voltage source provides a regulated supply voltage, i.e. a voltage Vdd which is substantially constant.
  • the transistor T3 produced by a bushing of the aforementioned type typically comprises a drain terminal D, a source terminal S and a gate terminal G. It is noted that the terminal G serves as a control terminal of the transistor T3, and is intended to receive a control signal V G.
  • the terminal D of the transistor T3 is connected to the outer element 3 by the line 5, and the terminal S of the transistor T3 is connected to ground.
  • the operational amplifier A2 typically comprises an inverting terminal, a non-inverting terminal and an output terminal connected to the terminal G of the transistor T3 to provide it with the control signal V G.
  • the inverting terminal of the operational amplifier A2 is connected to voltage supply means (not shown) arranged to provide a reference voltage Vref.
  • the figure 4 represents an example of a circuit diagram of the reference voltage supply means 40 intended to be connected to the circuit of the figure 3 .
  • the means 40 comprise first and second resistors designated R1 and R2, respectively.
  • One of the two terminals of the resistor R1 receives the supply voltage Vdd from the power supply also supplying the circuit of the figure 3 its other terminal is connected to one of the two terminals of resistor R2, and the other terminal of this resistor is grounded.
  • the point of connection of the resistors R1 and R2 provides the reference voltage Vref which is proportional to the supply voltage Vdd.
  • the resistance values of the resistors R1 and R2 should be chosen to provide a reference voltage value which is commonly in the vicinity of the middle of the dynamic operating range of the operational amplifier A2. In the case of a typical example, for a voltage Vdd equal to 2 V, the reference voltage Vref is of the order of 1V.
  • the operational amplifier A2 is chosen as a function of the value of the voltage V G to be supplied to the transistor T3, and of the impedance present on the terminal G.
  • the means 30 further comprise a second transistor T4 arranged so that a second current I4 passes through it.
  • the transistor T4 is produced by a CMOS type die, and typically comprises a drain terminal D, a source terminal S and a gate terminal G. It is noted that the terminal G serves as a control terminal of the transistor T4.
  • the terminal G of the transistor T4 is connected to that of the transistor T3, so that the control signal V G makes it possible to control both the transistor T3 and the transistor T4.
  • Terminal D of transistor T4 is connected to the non-inverting terminal of operational amplifier A2, and terminal S of transistor T4 is connected to ground.
  • the transistor T3 and the transistor T4 are advantageously connected to operate in saturation mode.
  • the transistor T3 is arranged so that the value of the current I3 which passes through the transistor T3 operating in saturation mode, is substantially equal to said nominal value of the current I3.
  • the current flowing in the transistor T3 i.e., the current I3 remains unchanged, thereby enhancing the current accuracy, in response to such a change in the voltage present between the terminals D and S of this transistor.
  • the transistor T4 advantageously has a function of monitoring the control voltage V G of the transistor T3, and that it is arranged in a feedback loop for keeping the control voltage V substantially constant. G , which keeps the current I3 flowing in the transistor T3 to a substantially constant value.
  • the transistor T4 is made to have a structure having a symmetry identical to that of the transistor T3. This has the effect that the transistors T3 and T4 have common operating characteristics, such as the threshold voltage. This is usually called "matching" between the two transistors T3 and T4.
  • an external resistor Re1 is connected to the means 30 so that the value of the current I3 is equal to its nominal value, as will be described hereinafter.
  • the external resistor Re1 is connected between the terminal D of the transistor T4 and a terminal connected to receive the supply voltage Vdd of said voltage source.
  • the external resistor Re1 advantageously adjusts the value of the current I3. Indeed, considering the preferred case where the transistors T3 and T4 are "matched", the resistor Re1 is used to set the output voltage of the operational amplifier A2, that is to say the control voltage V G of transistors T4 and T3. As a result, the voltage present between the terminal D of the transistor T3 and its terminal S is thus set by the value of the external resistor Re1. In other words, the current value I3 passing through the transistor T3 is adjusted by the resistance value of the resistor Re1, to be substantially equal to its nominal value.
  • the accuracy of the current I3 is directly related to that of the resistor Re1.
  • the latter may advantageously have a usual resistance value, contrary to the prior art, as has already been described in connection with the figure 2 .
  • the resistance value of the resistor Re1 must be of the order of 1 k ⁇ , such a resistor is commonly found in the trade, with a precision of the order of ⁇ 1%. It is thus possible to provide the current I3 with an accuracy of the order of ⁇ 3%.
  • the figure 5 represents a circuit diagram of a circuit comprising a second embodiment of the current supply means 50 according to the present invention, in the case where the supply voltage Vdd is provided by a power source such as an accumulator.
  • the supply voltage Vdd depends on the charge present in the accumulator, that is to say that this voltage is not constant over time.
  • circuit represented in figure 5 is close to the one represented in figure 3 .
  • components represented in figure 5 and designated by the same references as those represented in figure 3 are similar to those designated in figure 3 .
  • the non-inverting terminal of the operational amplifier A2 of the circuit represented in FIG. figure 5 must be independent of the voltage Vdd.
  • the terminal D of the transistor T4 of the means 50 is connected to one of the terminals of an external resistor Re2, via a current mirror 51 known per se, the other terminal of the resistor Re2 being connected to ground.
  • the current flowing in the resistor Re2 is I4 / m, the reference m designating the ratio of the current mirror. Typically the ratio is of the order of 2.
  • the resistance value of the external resistor Re2 is of the order of 10 k ⁇ , this value having been obtained by calculations. It will be appreciated by those skilled in the art that resistors having such a value can commonly be found commercially, and guaranteeing a precision of the order of ⁇ 1%, as well as a low cost, unlike external resistance. Rext described in relation to the figure 2 .
  • the resistance value of the resistor Re2 depends in particular on the ratio m.
  • the current supply means may comprise a plurality of identical first transistors, each transistor being provided with a control terminal, and the control terminals of these transistors being all connected to the terminal of output of the operational amplifier.
  • the means 30 may comprise a transistor T4 and n transistors T3 identical to the transistor T4.
  • the dimensions of the active surface of the transistors T3 are identical to those of the transistor T4, and the current I3 supplied by the means 30 (respectively the means 50) is therefore equal to n times the current I4, which makes it possible to realize the supply of a high current I3.
  • the outer element 3 is capable of supplying a determined voltage between the terminals D and S of the transistor T3.
  • the dimensions of the active surface of the transistor T3 are then determined, so that the value of the current I3, when the transistor T3 operates in saturation mode, is equal to 1 mA. Therefore the value of the control signal V G (i.e., the gate voltage of the transistors T3 and T4) is determined by the drain-voltage drain-source current characteristic as a function of the gate voltage.
  • the value of the resistor Re1 is chosen so that the voltage present between its terminals is equal to the voltage present between the terminals D and S of the transistor T3, when the resistor Re1 is crossed by a value of the current I4 equal to 1 mA.
  • the operation of the circuit represented in figure 3 is then stable, when the voltage across the resistor Re1 is equal to the reference voltage Vref, that is to say when the value of the current I3 is equal to 50 times that of the current I4.
  • the operation of this circuit is stable when the current I4 passing through the transistor T4 is 1 mA, and the current I3 supplied by the means 30 is equal to 50 mA, with an accuracy of the order of ⁇ 3%, for a resistance Re1 worth 1 k ⁇ to ⁇ 1%.
  • the figure 6 represents a curve 60 illustrating the temporal evolution of the current supplied by the means according to the present invention, following a powering of these means.
  • the reference t0 designates the moment when the circuit represented in figure 3 is turned on, and the reference t1 designates the instant from which the operation of this circuit is stable. So, in assuming that the supply voltage Vdd is equal to 2 V, the Applicant of the present invention has measured that the stabilization time is then of the order of 2 ⁇ s.

Claims (4)

  1. Einrichtung (50) zum Liefern eines ersten Stroms (13) an ein externes Element (3), das dazu bestimmt ist, an diese Einrichtung angeschlossen zu werden, wobei dieser Strom unter hoher Genauigkeit mit einem gewünschten vorbestimmten Wert bzw. Nennwert geliefert werden soll, wobei die Stromliefereinrichtung, die von einer Spannungsquelle, etwa einem Akkumulator, gespeist wird, deren Spannungswert im Laufe der Zeit variieren kann, enthält:
    - zumindest einen ersten Transistor (T3), der mit einer Steueranschlussklemme (G) versehen ist, die dazu bestimmt ist, ein Steuersignal (VG) zu empfangen, damit der Transistor von dem ersten Strom durchflossen wird, wobei der Drain-Anschluss (D) des ersten Transistors (T3) über die Leitung (5) an das externe Element (3) und der Source-Anschluss (S) des Transistors (T3) an die Masse angeschlossen ist,
    - einen Operationsverstärker (A2) mit einer ersten nicht invertierenden Eingangsklemme, der über eine Einrichtung zum Liefern einer Referenzspannung eine Referenzspannung (Vref) geliefert wird, einer zweiten invertierenden Eingangsklemme, an die ein Außenwiderstand (Re2) angeschlossen ist, um den ersten Strom auf den Nennwert abzugleichen, und an dessen Ausgangsklemme das Signal zum Steuern des ersten Transistors geliefert wird, und
    - einen zweiten Transistor (T4), der mit einer das Steuersignal (VG) empfangenden Steueranschlussklemme (G) versehen und in die Rückkopplungsschleife des Operationsverstärkers geschaltet ist, damit der Auf3enwiderstand von einem zweiten Strom (I4/m) durchflossen wird, der proportional zum ersten Strom ist,
    wobei diese Einrichtung dadurch gekennzeichnet ist, dass die Rückkopplungsschleife auch einen Schaltkreis vom Typ Stromspiegel (51) aufweist, der zwischen einem Drain-Anschluss (D) des zweiten Transistors und der invertierenden Anschlussklemme des Verstärkers angeschlossen ist, wobei die Spannung an den Anschlüssen des von dem zweiten Strom durchflossenen Außenwiderstands unabhängig von der Spannungsschwankung der Spannungsklemme fest bleibt.
  2. Stromliefereinrichtung (50) nach Anspruch 1, dadurch gekennzeichnet, dass der erste und der zweite Transistor Feldeffekttransistoren sind, die so angeschlossen sind, dass sie in Sättigungsbetrieb laufen.
  3. Stromliefereinrichtung (50) nach einem der vorangehenden Ansprüche, dadurch gekennzeichnet, dass sie ferner eine Mehrzahl von identischen ersten Transistoren enthält, wobei jeder Transistor mit einer Steueranschlussklemme versehen ist, und dass die Steueranschlussklemmen dieser Transistoren alle an die Ausgangsklemme des Operationsverstärkers angeschlossen sind.
  4. Stromliefereinrichtung (50) nach irgendeinem der vorangehenden Ansprüche, dadurch gekennzeichnet, dass der zweite Transistor so ausgebildet ist, dass seine Wirkfläche im wesentlichen symmetrisch zu der des ersten Transistors ist.
EP97117804A 1997-10-15 1997-10-15 Verfahren zur Herstellung eines sehr genauen Stroms Expired - Lifetime EP0910002B1 (de)

Priority Applications (6)

Application Number Priority Date Filing Date Title
DE69739232T DE69739232D1 (de) 1997-10-15 1997-10-15 Verfahren zur Herstellung eines sehr genauen Stroms
AT97117804T ATE421723T1 (de) 1997-10-15 1997-10-15 Verfahren zur herstellung eines sehr genauen stroms
EP97117804A EP0910002B1 (de) 1997-10-15 1997-10-15 Verfahren zur Herstellung eines sehr genauen Stroms
TW087116619A TW437137B (en) 1997-10-15 1998-10-07 Means for supplying a high precision current
JP10290688A JPH11249751A (ja) 1997-10-15 1998-10-13 高精度電流供給手段
US09/173,162 US6137273A (en) 1997-10-15 1998-10-15 Circuit for supplying a high precision current to an external element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP97117804A EP0910002B1 (de) 1997-10-15 1997-10-15 Verfahren zur Herstellung eines sehr genauen Stroms

Publications (2)

Publication Number Publication Date
EP0910002A1 EP0910002A1 (de) 1999-04-21
EP0910002B1 true EP0910002B1 (de) 2009-01-21

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EP97117804A Expired - Lifetime EP0910002B1 (de) 1997-10-15 1997-10-15 Verfahren zur Herstellung eines sehr genauen Stroms

Country Status (6)

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US (1) US6137273A (de)
EP (1) EP0910002B1 (de)
JP (1) JPH11249751A (de)
AT (1) ATE421723T1 (de)
DE (1) DE69739232D1 (de)
TW (1) TW437137B (de)

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US6549071B1 (en) 2000-09-12 2003-04-15 Silicon Laboratories, Inc. Power amplifier circuitry and method using an inductance coupled to power amplifier switching devices
US6392488B1 (en) 2000-09-12 2002-05-21 Silicon Laboratories, Inc. Dual oxide gate device and method for providing the same
US6448847B1 (en) 2000-09-12 2002-09-10 Silicon Laboratories, Inc. Apparatus and method for providing differential-to-single ended conversion and impedance transformation
US6362606B1 (en) * 2000-09-12 2002-03-26 Silicon Laboratories, Inc Method and apparatus for regulating a voltage
US6462620B1 (en) 2000-09-12 2002-10-08 Silicon Laboratories, Inc. RF power amplifier circuitry and method for amplifying signals
US6917245B2 (en) 2000-09-12 2005-07-12 Silicon Laboratories, Inc. Absolute power detector
US6828859B2 (en) * 2001-08-17 2004-12-07 Silicon Laboratories, Inc. Method and apparatus for protecting devices in an RF power amplifier
US6894565B1 (en) 2002-12-03 2005-05-17 Silicon Laboratories, Inc. Fast settling power amplifier regulator
US6897730B2 (en) * 2003-03-04 2005-05-24 Silicon Laboratories Inc. Method and apparatus for controlling the output power of a power amplifier
GB2407721B (en) * 2003-10-28 2008-01-02 Micron Technology Europ Ltd MOS linear region impedance curvature correction.
JP4712398B2 (ja) * 2005-01-17 2011-06-29 ローム株式会社 半導体装置

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JPS52114250A (en) * 1976-03-22 1977-09-24 Nec Corp Transistor circuit
JPS55611A (en) * 1978-06-09 1980-01-07 Toshiba Corp Constant current circuit
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Also Published As

Publication number Publication date
TW437137B (en) 2001-05-28
EP0910002A1 (de) 1999-04-21
ATE421723T1 (de) 2009-02-15
US6137273A (en) 2000-10-24
DE69739232D1 (de) 2009-03-12
JPH11249751A (ja) 1999-09-17

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