EP0910002B1 - Method for providing a current of high accuracy - Google Patents

Method for providing a current of high accuracy Download PDF

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Publication number
EP0910002B1
EP0910002B1 EP97117804A EP97117804A EP0910002B1 EP 0910002 B1 EP0910002 B1 EP 0910002B1 EP 97117804 A EP97117804 A EP 97117804A EP 97117804 A EP97117804 A EP 97117804A EP 0910002 B1 EP0910002 B1 EP 0910002B1
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EP
European Patent Office
Prior art keywords
current
transistor
terminal
voltage
value
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EP97117804A
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German (de)
French (fr)
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EP0910002A1 (en
Inventor
Tim Bales
Serge Bitz
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EM Microelectronic Marin SA
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EM Microelectronic Marin SA
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Priority to EP97117804A priority Critical patent/EP0910002B1/en
Priority to DE69739232T priority patent/DE69739232D1/en
Priority to AT97117804T priority patent/ATE421723T1/en
Priority to TW087116619A priority patent/TW437137B/en
Priority to JP10290688A priority patent/JPH11249751A/en
Priority to US09/173,162 priority patent/US6137273A/en
Publication of EP0910002A1 publication Critical patent/EP0910002A1/en
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02Regulating voltage or current
    • G05F3/08Regulating voltage or current wherein the variable is dc
    • G05F3/10Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/24Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only

Definitions

  • the present invention relates to current supply means. More specifically, it relates to means for providing a high precision current, to an external element intended to be connected to these means.
  • the figure 1 represents a circuit comprising a first example of conventional current supply means 1 intended to be connected, by a connection line 5, to an element 3 outside this circuit.
  • the means 1 are arranged to supply the element 3 with a current I1 at a desired predetermined value or nominal value, this value being designated by the reference I1o.
  • the means 1 comprise an operational amplifier A1 and a field effect transistor T1.
  • the means 1 further include integrated resistors such as field effect transistors operating in ohmic mode, the reference Rint designating the resistance equivalent to all of these integrated resistors.
  • the various components of the means 1 are made by a CMOS type of manufacturing process widely used in the semiconductor industry. It goes without saying that these components also include a connection terminal to a voltage source (not shown) arranged to supply a supply voltage Vdd to these components.
  • the transistor T1 produced by a bushing of the aforementioned type typically comprises a drain terminal D, a source terminal S and a gate terminal G.
  • the terminal D of the transistor T1 is connected to the external element 3 via the line 5, and the terminal S of the transistor T1 is connected to one of the terminals of the resistor Rint.
  • the operational amplifier A1 typically comprises an inverting terminal, a non-inverting terminal and an output terminal.
  • the inverting terminal of the operational amplifier A1 is connected to voltage supply means (not shown) arranged to supply a reference voltage Vref, its non-inverting terminal is connected to the terminal S of the transistor T1, and the terminal of output of the operational amplifier A1 is connected to the terminal G of the transistor T1.
  • the latter becomes stable when the voltage at the non-inverting terminal of the operational amplifier A1 (that is to say the voltage present at the source terminal S) is substantially equal to that present at the non-inverting terminal. inverter of the operational amplifier A1 (that is to say the reference voltage Vref).
  • the output voltage of the operational amplifier A1 is substantially constant, so that this voltage supplied to the terminal G of the transistor T1, maintains the current I1 which passes through the transistor T1 equal to its nominal value.
  • the circuit represented in figure 1 allows an adjustment of the value of the current I1 to its nominal value, this adjustment is commonly called by the term "trimming". Indeed, the practical realization of the various components of this circuit inevitably leads to variations of technological parameters, in particular the value of the internal resistance Rint which varies up to ⁇ 30% with respect to its desired value. Such variations cause the supply of the current I1 to a value different from its nominal value.
  • the value of the current I1 supplied by the means 1 to which the integrated resistors which are initially short-circuited by connection lines is measured, as represented by FIG. figure 1 . Then, some of these connection lines are cut with a laser beam, which connects to the means 1 the integrated resistors initially short-circuited by these lines. This has the effect of increasing the value of the resistor Rint connected in series with the transistor T1, that is to say to modify the value of the current I1. Such an adjustment is made until the value of the current I1 is equal to its nominal value.
  • a disadvantage of the power supply means represented in figure 1 is that it requires the realization of a plurality of adjustment elements, which goes against the usual concerns in the semiconductor industry, complexity, size and cost .
  • the figure 2 represents a circuit comprising a second example of conventional current supply means 6. Note that this circuit is similar to that shown in figure 1 . Thus, the components represented in figure 2 and designated by the same references as those represented in figure 1 , are identical to those designated in figure 1 .
  • the means 6 are connected to an external resistor Rext to these means.
  • the resistor Rext is connected between the terminal S of the transistor T1 and the ground.
  • the resistance Rext represented in figure 2 allows the adjustment of the current I1 to its nominal value.
  • a disadvantage of the power supply means represented in figure 2 resides in the fact that it requires the realization of a resistor Rext having a low resistance value, in the case where the value of the current I1 to be supplied must be high. Indeed, considering that the supply voltage Vdd is known and constant, the voltage present between the terminal D of the transistor T1 and the mass is thus determined and substantially constant. As a result, a high value of the resistor Rext has the effect of reducing the voltage present between the terminal D of the transistor T1 and its terminal S, since the resistor Rext is connected in series with the external element 3 and the transistor T1 . It is therefore necessary to increase the dimensions of the active surface of the transistor T1 so that the current I1 passing through it is equal to said predetermined value.
  • resistor Rext having a low resistance value (typically of the order of a few ohms) is expensive, especially in the case where it is desired that this resistance has an accuracy of the order of ⁇ 5%.
  • a first precise current is provided by a first transistor 18, whose gate terminal 26 is connected to the output terminal of the operational amplifier 14.
  • a second transistor 16 has its gate terminal connected. also to the output terminal of the amplifier and its drain terminal connected to an external reference resistor and the non-inverting terminal of the amplifier.
  • An object of the present invention is to provide means for providing a high accuracy current without being influenced by a voltage variation of the supply voltage source of said means, these means thus overcoming the aforementioned drawbacks.
  • Another object of the present invention is to provide such power supply means, without it being necessary to integrate with these means additional adjustment elements.
  • Another object of the present invention is to provide such current supply means, without it being necessary to connect to these means an external adjustment resistor having a low resistance value, in the case where the value of the current to provide must be high.
  • Another object of the present invention is to provide such current supply means capable of providing a current with improved accuracy, especially in the case of variations of the electrical parameters of the external element connected to these means.
  • Another object of the present invention is to provide such means meeting the traditional criteria in the semiconductor industry, complexity, size and cost.
  • An advantage of the arrangement of the current supply means according to the present invention is to be able to adjust the first current value by the resistance value of the external resistor, without the need to connect additional adjustment elements on the line of resistance. conduction of the first current. This makes it possible to determine the dimensions of the various components of these means by optimizing the dimensions of the first transistor.
  • Another advantage of the arrangement of the current supply means according to the present invention is to be able to connect an external resistor having a usual resistance value, while guaranteeing a precision of this resistance of the order of ⁇ 1%, and a low cost of purchase.
  • An advantage of the first and second transistors is to be connected to operate in saturation mode, this has the effect of maintaining the current flowing in the first transistor at its nominal value, especially in the case where the voltage present between the terminal of drain of this transistor and its source terminal, is modified.
  • the figure 3 represents a circuit diagram of a circuit comprising a first embodiment of current supply means 30 according to the present invention.
  • the means 30 are intended to be connected, by a connection line 5, to an element 3 outside these means.
  • the means 30 are arranged to supply the element 3 with a first current I3 at a desired predetermined value or nominal value.
  • the means 30 comprise an operational amplifier A2 and at least a first transistor T3 arranged so that the value of the current I3 which passes through it is substantially equal to its nominal value.
  • the various components of the circuit represented in figure 3 are preferably carried out by a CMOS type of manufacturing process widely used in the semiconductor industry. It goes without saying that these components also include a connection terminal to a voltage source (not shown) arranged to supply a supply voltage Vdd to these components.
  • the voltage source provides a regulated supply voltage, i.e. a voltage Vdd which is substantially constant.
  • the transistor T3 produced by a bushing of the aforementioned type typically comprises a drain terminal D, a source terminal S and a gate terminal G. It is noted that the terminal G serves as a control terminal of the transistor T3, and is intended to receive a control signal V G.
  • the terminal D of the transistor T3 is connected to the outer element 3 by the line 5, and the terminal S of the transistor T3 is connected to ground.
  • the operational amplifier A2 typically comprises an inverting terminal, a non-inverting terminal and an output terminal connected to the terminal G of the transistor T3 to provide it with the control signal V G.
  • the inverting terminal of the operational amplifier A2 is connected to voltage supply means (not shown) arranged to provide a reference voltage Vref.
  • the figure 4 represents an example of a circuit diagram of the reference voltage supply means 40 intended to be connected to the circuit of the figure 3 .
  • the means 40 comprise first and second resistors designated R1 and R2, respectively.
  • One of the two terminals of the resistor R1 receives the supply voltage Vdd from the power supply also supplying the circuit of the figure 3 its other terminal is connected to one of the two terminals of resistor R2, and the other terminal of this resistor is grounded.
  • the point of connection of the resistors R1 and R2 provides the reference voltage Vref which is proportional to the supply voltage Vdd.
  • the resistance values of the resistors R1 and R2 should be chosen to provide a reference voltage value which is commonly in the vicinity of the middle of the dynamic operating range of the operational amplifier A2. In the case of a typical example, for a voltage Vdd equal to 2 V, the reference voltage Vref is of the order of 1V.
  • the operational amplifier A2 is chosen as a function of the value of the voltage V G to be supplied to the transistor T3, and of the impedance present on the terminal G.
  • the means 30 further comprise a second transistor T4 arranged so that a second current I4 passes through it.
  • the transistor T4 is produced by a CMOS type die, and typically comprises a drain terminal D, a source terminal S and a gate terminal G. It is noted that the terminal G serves as a control terminal of the transistor T4.
  • the terminal G of the transistor T4 is connected to that of the transistor T3, so that the control signal V G makes it possible to control both the transistor T3 and the transistor T4.
  • Terminal D of transistor T4 is connected to the non-inverting terminal of operational amplifier A2, and terminal S of transistor T4 is connected to ground.
  • the transistor T3 and the transistor T4 are advantageously connected to operate in saturation mode.
  • the transistor T3 is arranged so that the value of the current I3 which passes through the transistor T3 operating in saturation mode, is substantially equal to said nominal value of the current I3.
  • the current flowing in the transistor T3 i.e., the current I3 remains unchanged, thereby enhancing the current accuracy, in response to such a change in the voltage present between the terminals D and S of this transistor.
  • the transistor T4 advantageously has a function of monitoring the control voltage V G of the transistor T3, and that it is arranged in a feedback loop for keeping the control voltage V substantially constant. G , which keeps the current I3 flowing in the transistor T3 to a substantially constant value.
  • the transistor T4 is made to have a structure having a symmetry identical to that of the transistor T3. This has the effect that the transistors T3 and T4 have common operating characteristics, such as the threshold voltage. This is usually called "matching" between the two transistors T3 and T4.
  • an external resistor Re1 is connected to the means 30 so that the value of the current I3 is equal to its nominal value, as will be described hereinafter.
  • the external resistor Re1 is connected between the terminal D of the transistor T4 and a terminal connected to receive the supply voltage Vdd of said voltage source.
  • the external resistor Re1 advantageously adjusts the value of the current I3. Indeed, considering the preferred case where the transistors T3 and T4 are "matched", the resistor Re1 is used to set the output voltage of the operational amplifier A2, that is to say the control voltage V G of transistors T4 and T3. As a result, the voltage present between the terminal D of the transistor T3 and its terminal S is thus set by the value of the external resistor Re1. In other words, the current value I3 passing through the transistor T3 is adjusted by the resistance value of the resistor Re1, to be substantially equal to its nominal value.
  • the accuracy of the current I3 is directly related to that of the resistor Re1.
  • the latter may advantageously have a usual resistance value, contrary to the prior art, as has already been described in connection with the figure 2 .
  • the resistance value of the resistor Re1 must be of the order of 1 k ⁇ , such a resistor is commonly found in the trade, with a precision of the order of ⁇ 1%. It is thus possible to provide the current I3 with an accuracy of the order of ⁇ 3%.
  • the figure 5 represents a circuit diagram of a circuit comprising a second embodiment of the current supply means 50 according to the present invention, in the case where the supply voltage Vdd is provided by a power source such as an accumulator.
  • the supply voltage Vdd depends on the charge present in the accumulator, that is to say that this voltage is not constant over time.
  • circuit represented in figure 5 is close to the one represented in figure 3 .
  • components represented in figure 5 and designated by the same references as those represented in figure 3 are similar to those designated in figure 3 .
  • the non-inverting terminal of the operational amplifier A2 of the circuit represented in FIG. figure 5 must be independent of the voltage Vdd.
  • the terminal D of the transistor T4 of the means 50 is connected to one of the terminals of an external resistor Re2, via a current mirror 51 known per se, the other terminal of the resistor Re2 being connected to ground.
  • the current flowing in the resistor Re2 is I4 / m, the reference m designating the ratio of the current mirror. Typically the ratio is of the order of 2.
  • the resistance value of the external resistor Re2 is of the order of 10 k ⁇ , this value having been obtained by calculations. It will be appreciated by those skilled in the art that resistors having such a value can commonly be found commercially, and guaranteeing a precision of the order of ⁇ 1%, as well as a low cost, unlike external resistance. Rext described in relation to the figure 2 .
  • the resistance value of the resistor Re2 depends in particular on the ratio m.
  • the current supply means may comprise a plurality of identical first transistors, each transistor being provided with a control terminal, and the control terminals of these transistors being all connected to the terminal of output of the operational amplifier.
  • the means 30 may comprise a transistor T4 and n transistors T3 identical to the transistor T4.
  • the dimensions of the active surface of the transistors T3 are identical to those of the transistor T4, and the current I3 supplied by the means 30 (respectively the means 50) is therefore equal to n times the current I4, which makes it possible to realize the supply of a high current I3.
  • the outer element 3 is capable of supplying a determined voltage between the terminals D and S of the transistor T3.
  • the dimensions of the active surface of the transistor T3 are then determined, so that the value of the current I3, when the transistor T3 operates in saturation mode, is equal to 1 mA. Therefore the value of the control signal V G (i.e., the gate voltage of the transistors T3 and T4) is determined by the drain-voltage drain-source current characteristic as a function of the gate voltage.
  • the value of the resistor Re1 is chosen so that the voltage present between its terminals is equal to the voltage present between the terminals D and S of the transistor T3, when the resistor Re1 is crossed by a value of the current I4 equal to 1 mA.
  • the operation of the circuit represented in figure 3 is then stable, when the voltage across the resistor Re1 is equal to the reference voltage Vref, that is to say when the value of the current I3 is equal to 50 times that of the current I4.
  • the operation of this circuit is stable when the current I4 passing through the transistor T4 is 1 mA, and the current I3 supplied by the means 30 is equal to 50 mA, with an accuracy of the order of ⁇ 3%, for a resistance Re1 worth 1 k ⁇ to ⁇ 1%.
  • the figure 6 represents a curve 60 illustrating the temporal evolution of the current supplied by the means according to the present invention, following a powering of these means.
  • the reference t0 designates the moment when the circuit represented in figure 3 is turned on, and the reference t1 designates the instant from which the operation of this circuit is stable. So, in assuming that the supply voltage Vdd is equal to 2 V, the Applicant of the present invention has measured that the stabilization time is then of the order of 2 ⁇ s.

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Abstract

The current source uses an additional transistor to provide precise control of current about nominal value. The current is provided by a first transistor (T3) through which the first current passes. An operational amplifier (A2) has a first input to which a reference voltage (Vref) is applied, and at the output of which is a signal for controlling the first transistor. An external resistance (Re1) is also connected to the second input. A further transistor (T4) is provided through which a second current passes (I4), passing also through the external resistor.

Description

La présente invention concerne des moyens de fourniture de courant. Elle concerne plus précisément des moyens pour fournir un courant de grande précision, à un élément extérieur destiné à être connecté à ces moyens.The present invention relates to current supply means. More specifically, it relates to means for providing a high precision current, to an external element intended to be connected to these means.

Il existe classiquement divers types de moyens de fourniture de courant. On notera d'ailleurs que la présente description ne concerne pas ce que l'on appelle communément les sources de courant.There are typically various types of power supply means. It will be noted moreover that the present description does not relate to what is commonly called the current sources.

La figure 1 représente un circuit comprenant un premier exemple de moyens de fourniture de courant 1 classiques destinés à être connectés, par une ligne de connexion 5, à un élément 3 extérieur à ce circuit. Les moyens 1 sont agencés pour fournir à l'élément 3 un courant I1 à une valeur prédéterminée désirée ou valeur nominale, cette valeur étant désignée par la référence I1o. A cet effet, les moyens 1 comprennent un amplificateur opérationnel A1, et un transistor à effet de champ T1. Les moyens 1 comprennent en outre des résistances intégrées telles que des transistors à effet de champ fonctionnant en régime ohmique, la référence Rint désignant la résistance équivalent à la totalité de ces résistances intégrées. Typiquement, les différents composants des moyens 1 sont réalisés par une filière de fabrication de type CMOS largement répandue dans l'industrie des semi-conducteurs. Il va de soi que ces composants comprennent également une borne de connexion à une source de tension (non représentée) agencée pour fournir une tension d'alimentation Vdd à ces composants.The figure 1 represents a circuit comprising a first example of conventional current supply means 1 intended to be connected, by a connection line 5, to an element 3 outside this circuit. The means 1 are arranged to supply the element 3 with a current I1 at a desired predetermined value or nominal value, this value being designated by the reference I1o. For this purpose, the means 1 comprise an operational amplifier A1 and a field effect transistor T1. The means 1 further include integrated resistors such as field effect transistors operating in ohmic mode, the reference Rint designating the resistance equivalent to all of these integrated resistors. Typically, the various components of the means 1 are made by a CMOS type of manufacturing process widely used in the semiconductor industry. It goes without saying that these components also include a connection terminal to a voltage source (not shown) arranged to supply a supply voltage Vdd to these components.

Le transistor T1 réalisé par une filière du type susmentionné, comprend typiquement une borne de drain D, une borne de source S et une borne de grille G. La borne D du transistor T1 est connectée à l'élément extérieur 3 par la ligne 5, et la borne S du transistor T1 est connectée à l'une des bornes de la résistance Rint. En outre, l'amplificateur opérationnel A1 comprend typiquement une borne inverseuse, une borne non-inverseuse et une borne de sortie. La borne inverseuse de l'amplificateur opérationnel A1 est connectée à des moyens de fourniture de tension (non représentés) agencés pour fournir une tension de référence Vref, sa borne non-inverseuse est connectée à la borne S du transistor T1, et la borne de sortie de l'amplificateur opérationnel A1 est connectée à la borne G du transistor T1.The transistor T1 produced by a bushing of the aforementioned type typically comprises a drain terminal D, a source terminal S and a gate terminal G. The terminal D of the transistor T1 is connected to the external element 3 via the line 5, and the terminal S of the transistor T1 is connected to one of the terminals of the resistor Rint. In addition, the operational amplifier A1 typically comprises an inverting terminal, a non-inverting terminal and an output terminal. The inverting terminal of the operational amplifier A1 is connected to voltage supply means (not shown) arranged to supply a reference voltage Vref, its non-inverting terminal is connected to the terminal S of the transistor T1, and the terminal of output of the operational amplifier A1 is connected to the terminal G of the transistor T1.

Pour l'essentiel, suite à la mise sous tension du circuit représenté en figure 1, ce dernier devient stable quand la tension présente à la borne non-inverseuse de l'amplificateur opérationnel A1 (c'est-à-dire la tension présente à la borne de source S) est sensiblement égale à celle présente à la borne non- inverseuse de l'amplificateur opérationnel A1 (c'est-à-dire la tension de référence Vref). Dans ce cas, la tension de sortie de l'amplificateur opérationnel A1 est sensiblement constante, de sorte que cette tension fournie à la borne G du transistor T1, maintient le courant I1 qui traverse ce transistor T1 égal à sa valeur nominale.For the most part, following the power up of the circuit represented in figure 1 , the latter becomes stable when the voltage at the non-inverting terminal of the operational amplifier A1 (that is to say the voltage present at the source terminal S) is substantially equal to that present at the non-inverting terminal. inverter of the operational amplifier A1 (that is to say the reference voltage Vref). In this case, the output voltage of the operational amplifier A1 is substantially constant, so that this voltage supplied to the terminal G of the transistor T1, maintains the current I1 which passes through the transistor T1 equal to its nominal value.

Le circuit représenté en figure 1 permet de réaliser un ajustement de la valeur du courant I1 à sa valeur nominale, cet ajustement étant communément appelé par le terme anglais "trimming". En effet, la réalisation pratique des différents composants de ce circuit conduit inévitablement à des variations de paramètres technologiques, notamment la valeur de la résistance interne Rint qui varier jusqu'à ±30 % par rapport à sa valeur désirée. De telles variations provoquent la fourniture du courant I1 à une valeur différente de sa valeur nominale. Pour pallier ces variations intempestives, on mesure ensuite la valeur du courant I1 fourni par les moyens 1 auxquels sont connectés les résistances intégrées qui sont initialement court-circuitées par des lignes de connexion, comme le représente la figure 1. Ensuite on coupe par faisceau laser certaines de ces lignes de connexion, ce qui connecte aux moyens 1 les résistances intégrées initialement court-circuitées par ces lignes. Ceci a pour effet d'augmenter la valeur de la résistance Rint connectée en série avec le transistor T1, c'est-à-dire de modifier la valeur du courant I1. On réalise un tel ajustement jusqu'à ce que la valeur du courant I1 soit égale à sa valeur nominale.The circuit represented in figure 1 allows an adjustment of the value of the current I1 to its nominal value, this adjustment is commonly called by the term "trimming". Indeed, the practical realization of the various components of this circuit inevitably leads to variations of technological parameters, in particular the value of the internal resistance Rint which varies up to ± 30% with respect to its desired value. Such variations cause the supply of the current I1 to a value different from its nominal value. To compensate for these untimely variations, the value of the current I1 supplied by the means 1 to which the integrated resistors which are initially short-circuited by connection lines is measured, as represented by FIG. figure 1 . Then, some of these connection lines are cut with a laser beam, which connects to the means 1 the integrated resistors initially short-circuited by these lines. This has the effect of increasing the value of the resistor Rint connected in series with the transistor T1, that is to say to modify the value of the current I1. Such an adjustment is made until the value of the current I1 is equal to its nominal value.

Un inconvénient des moyens de fourniture de courant représenté en figure 1, réside dans le fait qu'elle nécessite la réalisation d'une pluralité d'éléments d'ajustement, ce qui va à l'encontre des préoccupations habituelles dans l'industrie des semi-conducteurs, de complexité, d'encombrement et de coût.A disadvantage of the power supply means represented in figure 1 , is that it requires the realization of a plurality of adjustment elements, which goes against the usual concerns in the semiconductor industry, complexity, size and cost .

Un autre inconvénient des moyens de fourniture de courant représenté en figure 1, réside dans le fait que l'ajustement peut être réalisé de façon irréversible, de sorte que ces moyens ne sont adaptés qu'à l'élément extérieur auquel les moyens 1 étaient connectés lors de cet ajustement.Another disadvantage of the current supply means represented by figure 1 resides in the fact that the adjustment can be made irreversibly, so that these means are adapted only to the outer element to which the means 1 were connected during this adjustment.

Pour pallier cet inconvénient, la figure 2 représente un circuit comprenant un second exemple de moyens de fourniture de courant 6 classiques. On note que ce circuit est similaire à celui représenté en figure 1. Ainsi, les composants représentés en figure 2 et désignés par les mêmes références que ceux représentés en figure 1, sont identiques à ceux désignés en figure 1.To overcome this drawback, the figure 2 represents a circuit comprising a second example of conventional current supply means 6. Note that this circuit is similar to that shown in figure 1 . Thus, the components represented in figure 2 and designated by the same references as those represented in figure 1 , are identical to those designated in figure 1 .

Toutefois, les moyens 6 sont connectés à une résistance externe Rext à ces moyens. La résistance Rext est connectée entre la borne S du transistor T1 et la masse.However, the means 6 are connected to an external resistor Rext to these means. The resistor Rext is connected between the terminal S of the transistor T1 and the ground.

A l'instar de la résistance Rint décrite en relation avec la figure 1, la résistance Rext représentée en figure 2 permet de réaliser l'ajustement du courant I1 à sa valeur nominale. A cet effet, on détermine d'abord la valeur du courant I1 devant être fourni par les moyens 1 du circuit tel que représenté en figure 1. En considérant que la tension Vref est déterminée en fonction du choix de l'amplificateur opérationnel A1, et que le circuit est stable quand la tension présente à la borne non-inverseuse de cet amplificateur (c'est-à-dire la tension égale au produit de la valeur de résistance de la résistance Rext par le courant I1) est égale à la tension présente à sa borne inverseuse (c'est-à-dire la tension Vref), on peut déterminer la valeur de la résistance Rext comme suit : Rext = Vref I 1 o

Figure imgb0001
Like the Rint resistance described in relation to the figure 1 , the resistance Rext represented in figure 2 allows the adjustment of the current I1 to its nominal value. For this purpose, the value of the current I1 to be supplied by the means 1 of the circuit as represented in FIG. figure 1 . Considering that the voltage Vref is determined according to the choice of the operational amplifier A1, and that the circuit is stable when the voltage at the non-inverting terminal of this amplifier (i.e., the voltage equal to the product of the resistance value of resistor Rext by current I1) is equal to the voltage at its terminal inverter (that is to say the voltage Vref), the value of the resistor Rext can be determined as follows: Rext = Vref I 1 o
Figure imgb0001

On détermine ainsi la valeur de la résistance externe Rext destinée à être connectée aux moyens 6, cette connexion devant avoir pour effet d'ajuster la valeur du courant I1 à sa valeur nominale.The value of the external resistor Rext intended to be connected to the means 6 is thus determined, this connection having the effect of adjusting the value of the current I1 to its nominal value.

Un inconvénient des moyens de fourniture de courant représentés en figure 2, réside dans le fait qu'elle nécessite la réalisation d'une résistance Rext ayant une faible valeur de résistance, dans le cas où la valeur du courant I1 à fournir doit être élevée. En effet, en considérant que la tension d'alimentation Vdd est connue et constante, la tension présente entre la borne D du transistor T1 et la masse est ainsi déterminée et sensiblement constante. Il en résulte qu'une valeur élevée de la résistance Rext a pour effet de diminuer la tension présente entre la borne D du transistor T1 et sa borne S, puisque la résistance Rext est connectée en série avec l'élément extérieur 3 et le transistor T1. Il est donc nécessaire d'augmenter les dimensions de la surface active du transistor T1, pour que le courant I1 qui le traverse soit égal à ladite valeur prédéterminée.A disadvantage of the power supply means represented in figure 2 resides in the fact that it requires the realization of a resistor Rext having a low resistance value, in the case where the value of the current I1 to be supplied must be high. Indeed, considering that the supply voltage Vdd is known and constant, the voltage present between the terminal D of the transistor T1 and the mass is thus determined and substantially constant. As a result, a high value of the resistor Rext has the effect of reducing the voltage present between the terminal D of the transistor T1 and its terminal S, since the resistor Rext is connected in series with the external element 3 and the transistor T1 . It is therefore necessary to increase the dimensions of the active surface of the transistor T1 so that the current I1 passing through it is equal to said predetermined value.

L'homme de l'art note que la mise en oeuvre d'une résistance Rext ayant une faible valeur de résistance (typiquement de l'ordre de quelques ohms) est coûteux, notamment dans le cas où l'on souhaite que cette résistance ait une précision de l'ordre de ±5 %.Those skilled in the art note that the implementation of a resistor Rext having a low resistance value (typically of the order of a few ohms) is expensive, especially in the case where it is desired that this resistance has an accuracy of the order of ± 5%.

On notera alors qu'une telle solution ne répond pas aux critères traditionnels dans l'industrie des semi-conducteurs, de complexité, d'encombrement et de coût.It will be noted that such a solution does not meet the traditional criteria in the semiconductor industry, complexity, size and cost.

Le brevet US 5,291,123 décrit un générateur de courant précis de référence comme le schéma électrique décrit en relation avec la figure 2 ci-dessus. Selon une des formes d'exécution, un premier courant précis est fourni par un premier transistor 18, dont la borne de grille 26 est reliée à la borne de sortie de l'amplificateur opérationnel 14. Un second transistor 16 a sa borne de grille reliée également à la borne de sortie de l'amplificateur et sa borne de drain reliée à une résistance de référence externe et à la borne non-inverseuse de l'amplificateur.The patent US 5,291,123 describes an accurate reference current generator as the electric diagram described in relation to the figure 2 above. According to one of the embodiments, a first precise current is provided by a first transistor 18, whose gate terminal 26 is connected to the output terminal of the operational amplifier 14. A second transistor 16 has its gate terminal connected. also to the output terminal of the amplifier and its drain terminal connected to an external reference resistor and the non-inverting terminal of the amplifier.

En plus des inconvénients du circuit présenté en figure 2, la valeur du premier courant précis n'est pas indépendant de la variation de tension d'alimentation du générateur ce qui est un autre inconvénient.In addition to the disadvantages of the circuit presented in figure 2 , the value of the first precise current is not independent of the supply voltage variation of the generator which is another drawback.

On peut citer également le brevet US 5,124,632 , qui décrit un circuit de fourniture de sources de courant accordés. Ce circuit est alimenté par une source de tension, qui ne varie pas au cours du temps. Le circuit comprend des amplificateurs opérationnels, au moins un miroir de courant et des éléments commutateurs sur le trajet du miroir de courant pour pouvoir fournir des courants du type source ou du type puits. Cependant, le miroir de courant n'est pas destiné à renvoyer un courant dans une résistance externe de manière que la tension aux bornes de cette résistance soit fixe indépendamment de la variation de tension de la source de tension ce qui est un inconvénient.We can also mention the patent US 5,124,632 which describes a current source supply circuit. This circuit is powered by a voltage source, which does not change over time. The circuit includes operational amplifiers, at least one current mirror and switch elements in the path of the current mirror to be able to supply source or well type currents. However, the current mirror is not intended to return a current in an external resistor so that the voltage across this resistor is fixed independently of the voltage variation of the voltage source which is a disadvantage.

Un objet de la présente invention est de prévoir des moyens pour fournir un courant de grande précision sans être influencés par une variation de tension de la source de tension d'alimentation desdits moyens, ces moyens palliant ainsi les inconvénients susmentionnés.An object of the present invention is to provide means for providing a high accuracy current without being influenced by a voltage variation of the supply voltage source of said means, these means thus overcoming the aforementioned drawbacks.

Un autre objet de la présente invention est de prévoir de tels moyens de fourniture de courant, sans qu'il soit nécessaire d'intégrer avec ces moyens des éléments d'ajustement supplémentaires.Another object of the present invention is to provide such power supply means, without it being necessary to integrate with these means additional adjustment elements.

Un autre objet de la présente invention est de prévoir de tels moyens de fourniture de courant, sans qu'il soit nécessaire de connecter à ces moyens une résistance externe d'ajustement ayant une faible valeur de résistance, dans le cas où la valeur du courant à fournir doit être élevée.Another object of the present invention is to provide such current supply means, without it being necessary to connect to these means an external adjustment resistor having a low resistance value, in the case where the value of the current to provide must be high.

Un autre objet de la présente invention est de prévoir de tels moyens de fourniture de courant susceptible de fournir un courant ayant une précision améliorée, notamment dans le cas de variations des paramètres électriques de l'élément extérieur connecté à ces moyens.Another object of the present invention is to provide such current supply means capable of providing a current with improved accuracy, especially in the case of variations of the electrical parameters of the external element connected to these means.

Un autre objet de la présente invention est de prévoir de tels moyens répondant aux critères traditionnels dans l'industrie des semi-conducteurs, complexité, d'encombrement et de coût.Another object of the present invention is to provide such means meeting the traditional criteria in the semiconductor industry, complexity, size and cost.

Ces objets, ainsi que d'autres, sont atteints par les moyens de fourniture de courant selon la revendication 1.These and other objects are achieved by the current supply means according to claim 1.

Un avantage de l'agencement des moyens de fourniture de courant selon la présente invention est de pouvoir ajuster la valeur de premier courant par la valeur de résistance de la résistance externe, sans avoir besoin de connecter des éléments d'ajustement supplémentaires sur la ligne de conduction du premier courant. Ceci permet de pouvoir déterminer les dimensions des différents composants de ces moyens en optimisant les dimensions du premier transistor.An advantage of the arrangement of the current supply means according to the present invention is to be able to adjust the first current value by the resistance value of the external resistor, without the need to connect additional adjustment elements on the line of resistance. conduction of the first current. This makes it possible to determine the dimensions of the various components of these means by optimizing the dimensions of the first transistor.

Un autre avantage de l'agencement des moyens de fourniture de courant selon la présente invention est de pouvoir connecter une résistance externe ayant une valeur de résistance usuelle, tout en garantissant une précision de cette résistance de l'ordre de ±1 %, et un faible coût d'achat.Another advantage of the arrangement of the current supply means according to the present invention is to be able to connect an external resistor having a usual resistance value, while guaranteeing a precision of this resistance of the order of ± 1%, and a low cost of purchase.

Un avantage des premier et second transistors est d'être connectés pour fonctionner en régime de saturation, ce ci a pour effet de maintenir le courant circulant dans le premier transistor à sa valeur nominale, notamment dans le cas où la tension présente entre la borne de drain de ce transistor et sa borne de source, est modifiée.An advantage of the first and second transistors is to be connected to operate in saturation mode, this has the effect of maintaining the current flowing in the first transistor at its nominal value, especially in the case where the voltage present between the terminal of drain of this transistor and its source terminal, is modified.

Ces objets, caractéristiques et avantages, ainsi que d'autres, de la présente invention apparaîtront plus clairement à la lecture de la description détaillée de deux modes de réalisation préférés de la présente invention, donnés à titre d'exemple uniquement, en relation avec les figures jointes, parmi lesquelles :

  • la figure 1 déjà citée représente un schéma électrique d'un premier circuit comprenant des moyens de fourniture de courant selon l'art antérieur;
  • la figure 2 déjà citée représente un schéma électrique d'un second circuit comprenant des moyens de fourniture de courant selon l'art antérieur;
  • la figure 3 représente un schéma électrique d'un circuit comprenant un premier mode de réalisation de moyens de fourniture de courant selon la présente invention;
  • la figure 4 représente un schéma électrique de moyens de fourniture de tension de référence du circuit de la figure 3;
  • la figure 5 représente un schéma électrique d'un circuit comprenant un second mode de réalisation de moyens de fourniture de courant selon la présente invention; et
  • la figure 6 représente une courbe illustrant l'évolution temporelle du courant fourni par les moyens de fourniture de courant du circuit de la figure 5, suite à une mise sous tension de ces moyens.
These and other objects, features, and advantages of the present invention will become more apparent upon reading the detailed description of two preferred embodiments of the present invention, given by way of example only, in connection with the attached figures, among which:
  • the figure 1 already cited represents a circuit diagram of a first circuit comprising current supply means according to the prior art;
  • the figure 2 already cited represents a circuit diagram of a second circuit comprising current supply means according to the prior art;
  • the figure 3 represents a circuit diagram of a circuit comprising a first embodiment of current supply means according to the present invention;
  • the figure 4 represents a circuit diagram of reference voltage supply means of the circuit of the figure 3 ;
  • the figure 5 shows a circuit diagram of a circuit comprising a second embodiment of current supply means according to the present invention; and
  • the figure 6 represents a curve illustrating the temporal evolution of the current supplied by the current supply means of the circuit of the figure 5 after energizing these means.

La figure 3 représente un schéma électrique d'un circuit comprenant un premier mode de réalisation de moyens de fourniture de courant 30 selon la présente invention.The figure 3 represents a circuit diagram of a circuit comprising a first embodiment of current supply means 30 according to the present invention.

Les moyens 30 sont destinés à être connectés, par une ligne de connexion 5, à un élément 3 extérieur à ces moyens. Les moyens 30 sont agencés pour fournir à l'élément 3 un premier courant I3 à une valeur prédéterminée désirée ou valeur nominale.The means 30 are intended to be connected, by a connection line 5, to an element 3 outside these means. The means 30 are arranged to supply the element 3 with a first current I3 at a desired predetermined value or nominal value.

A cet effet, les moyens 30 comprennent un amplificateur opérationnel A2 et au moins un premier transistor T3 agencé de sorte que la valeur du courant I3 qui le traverse est sensiblement égale à sa valeur nominale.For this purpose, the means 30 comprise an operational amplifier A2 and at least a first transistor T3 arranged so that the value of the current I3 which passes through it is substantially equal to its nominal value.

On notera que les divers composants du circuit représenté en figure 3 sont réalisés de préférence par une filière de fabrication de type CMOS largement répandue dans l'industrie des semi-conducteurs. Il va de soi que ces composants comprennent également une borne de connexion à une source de tension (non représentée) agencée pour fournir une tension d'alimentation Vdd à ces composants. Dans le mode de réalisation représenté en figure 3, la source de tension fournit une tension d'alimentation régulée, c'est-à-dire une tension Vdd qui est sensiblement constante.It will be noted that the various components of the circuit represented in figure 3 are preferably carried out by a CMOS type of manufacturing process widely used in the semiconductor industry. It goes without saying that these components also include a connection terminal to a voltage source (not shown) arranged to supply a supply voltage Vdd to these components. In the embodiment shown in figure 3 the voltage source provides a regulated supply voltage, i.e. a voltage Vdd which is substantially constant.

Le transistor T3 réalisé par une filière du type susmentionné, comprend typiquement une borne de drain D, une borne de source S et une borne de grille G. On note que la borne G sert de borne de commande du transistor T3, et est destinée à recevoir un signal de commande VG. La borne D du transistor T3 est connectée à l'élément extérieur 3 par la ligne 5, et la borne S du transistor T3 est connectée à la masse.The transistor T3 produced by a bushing of the aforementioned type typically comprises a drain terminal D, a source terminal S and a gate terminal G. It is noted that the terminal G serves as a control terminal of the transistor T3, and is intended to receive a control signal V G. The terminal D of the transistor T3 is connected to the outer element 3 by the line 5, and the terminal S of the transistor T3 is connected to ground.

L'amplificateur opérationnel A2 comprend typiquement une borne inverseuse, une borne non-inverseuse et une borne de sortie connectée à la borne G du transistor T3 pour lui fournir le signal de commande VG. La borne inverseuse de l'amplificateur opérationnel A2 est connectée à des moyens de fourniture de tension (non représentés) agencés pour fournir une tension de référence Vref.The operational amplifier A2 typically comprises an inverting terminal, a non-inverting terminal and an output terminal connected to the terminal G of the transistor T3 to provide it with the control signal V G. The inverting terminal of the operational amplifier A2 is connected to voltage supply means (not shown) arranged to provide a reference voltage Vref.

La figure 4 représente un exemple d'un schéma électrique des moyens de fourniture de tension de référence 40 destinés à être connectés au circuit de la figure 3. Les moyens 40 comprennent des première et seconde résistances désignées R1 et R2, respectivement. L'une des deux bornes de la résistance R1 reçoit la tension d'alimentation Vdd de la source d'alimentation alimentant également le circuit de la figure 3, son autre borne est connectée avec l'une des deux bornes de la résistance R2, et l'autre borne de cette résistance est mise à la masse. Le point de raccordement des résistances R1 et R2 fournit la tension de référence Vref qui est proportionnelle à la tension d'alimentation Vdd. Les valeurs de résistance des résistances R1 et R2 doivent être choisies pour fournir une valeur de tension de référence qui se trouve communément au voisinage du milieu de la plage de fonctionnement dynamique de l'amplificateur opérationnel A2. Dans le cas d'un exemple typique, pour une tension Vdd égale à 2 V, la tension de référence Vref est de l'ordre de 1V.The figure 4 represents an example of a circuit diagram of the reference voltage supply means 40 intended to be connected to the circuit of the figure 3 . The means 40 comprise first and second resistors designated R1 and R2, respectively. One of the two terminals of the resistor R1 receives the supply voltage Vdd from the power supply also supplying the circuit of the figure 3 its other terminal is connected to one of the two terminals of resistor R2, and the other terminal of this resistor is grounded. The point of connection of the resistors R1 and R2 provides the reference voltage Vref which is proportional to the supply voltage Vdd. The resistance values of the resistors R1 and R2 should be chosen to provide a reference voltage value which is commonly in the vicinity of the middle of the dynamic operating range of the operational amplifier A2. In the case of a typical example, for a voltage Vdd equal to 2 V, the reference voltage Vref is of the order of 1V.

Il va de soi que les diverses valeurs numériques fournies au cours de la présente description, ne sont fournies qu'à titre illustratif uniquement.It goes without saying that the various numerical values provided during the present description are provided for illustrative purposes only.

L'homme de l'art notera que l'amplificateur opérationnel A2 est choisi en fonction de la valeur de la tension VG à fournir au transistor T3, et de l'impédance présente sur la borne G.Those skilled in the art will note that the operational amplifier A2 is chosen as a function of the value of the voltage V G to be supplied to the transistor T3, and of the impedance present on the terminal G.

Comme le représente la figure 3, les moyens 30 comprennent en outre un second transistor T4 agencé de sorte qu'il est traversé par un second courant I4.As represented by figure 3 the means 30 further comprise a second transistor T4 arranged so that a second current I4 passes through it.

Le transistor T4 est réalisé par une filière de type CMOS, et comprend typiquement une borne de drain D, une borne de source S et une borne de grille G. On note que la borne G sert de borne de commande du transistor T4.The transistor T4 is produced by a CMOS type die, and typically comprises a drain terminal D, a source terminal S and a gate terminal G. It is noted that the terminal G serves as a control terminal of the transistor T4.

La borne G du transistor T4 est connectée à celle du transistor T3, de sorte que le signal de commande VG permet de commander à la fois le transistor T3 et le transistor T4.The terminal G of the transistor T4 is connected to that of the transistor T3, so that the control signal V G makes it possible to control both the transistor T3 and the transistor T4.

La borne D du transistor T4 est connectée à la borne non-inverseuse de l'amplificateur opérationnel A2, et la borne S du transistor T4 est connectée à la masse.Terminal D of transistor T4 is connected to the non-inverting terminal of operational amplifier A2, and terminal S of transistor T4 is connected to ground.

En outre, le transistor T3 et le transistor T4 sont avantageusement connectés pour fonctionner en régime de saturation. Et le transistor T3 est agencé de sorte que la valeur du courant I3 qui traverse le transistor T3 fonctionnant en régime de saturation, est sensiblement égale à ladite valeur nominale du courant I3.In addition, the transistor T3 and the transistor T4 are advantageously connected to operate in saturation mode. And the transistor T3 is arranged so that the value of the current I3 which passes through the transistor T3 operating in saturation mode, is substantially equal to said nominal value of the current I3.

En effet, supposons que la tension présente entre la borne D du transistor T3 et sa borne S, soit légèrement modifiée pour une raison quelconque, par exemple suite à une variation de la tension d'alimentation qui est fournie à l'élément extérieur 3. Il en résulte que le courant circulant dans le transistor T3 (c'est-à-dire le courant I3) demeure inchangé, ce qui renforce ainsi la précision de courant, en réponse à une telle modification de la tension présente entre les bornes D et S de ce transistor.Indeed, suppose that the voltage present between the terminal D of the transistor T3 and its terminal S is slightly modified for any reason, for example following a variation of the supply voltage which is supplied to the external element 3. As a result, the current flowing in the transistor T3 (i.e., the current I3) remains unchanged, thereby enhancing the current accuracy, in response to such a change in the voltage present between the terminals D and S of this transistor.

L'homme de l'art note que le transistor T4 a avantageusement une fonction de surveillance de la tension de commande VG du transistor T3, et qu'il est agencé dans une boucle de rétroaction permettant de maintenir sensiblement constante la tension de commande VG, ce qui permet de maintenir le courant I3 circulant dans le transistor T3 à une valeur sensiblement constante.Those skilled in the art note that the transistor T4 advantageously has a function of monitoring the control voltage V G of the transistor T3, and that it is arranged in a feedback loop for keeping the control voltage V substantially constant. G , which keeps the current I3 flowing in the transistor T3 to a substantially constant value.

De préférence, le transistor T4 est réalisés pour avoir une structure ayant une symétrie identique à celle du transistor T3. Ceci a pour effet que les transistors T3 et T4 ont des caractéristiques de fonctionnement communes, telles que la tension de seuil. On parle alors usuellement de "matching" entre les deux transistors T3 et T4.Preferably, the transistor T4 is made to have a structure having a symmetry identical to that of the transistor T3. This has the effect that the transistors T3 and T4 have common operating characteristics, such as the threshold voltage. This is usually called "matching" between the two transistors T3 and T4.

Lors de la réalisation pratique des différents composants des moyens 30, on est amené à dimensionner ces composants en fonction de la valeur nominale du courant I3 à fournir.In the practical embodiment of the various components of the means 30, it is necessary to dimension these components as a function of the nominal value of the current I3 to be supplied.

A cet effet, on connecte une résistance externe Re1 aux moyens 30 de sorte que la valeur du courant I3 est égale à sa valeur nominale, comme cela va être décrit ci-après. Comme le représente la figure 3, la résistance externe Re1 est connectée entre la borne D du transistor T4 et une borne connectée pour recevoir la tension d'alimentation Vdd de ladite source de tension.For this purpose, an external resistor Re1 is connected to the means 30 so that the value of the current I3 is equal to its nominal value, as will be described hereinafter. As represented by figure 3 , the external resistor Re1 is connected between the terminal D of the transistor T4 and a terminal connected to receive the supply voltage Vdd of said voltage source.

L'homme de l'art note que la résistance externe Re1 permet d'ajuster avantageusement la valeur du courant I3. En effet, en considérant le cas préféré où les transistors T3 et T4 sont "matchés", la résistance Re1 permet de fixer la tension de sortie de l'amplificateur opérationnel A2, c'est-à-dire la tension de commande VG des transistors T4 et T3. Il en résulte que la tension présente entre la borne D du transistor T3 et sa borne S, est ainsi fixée par la valeur de la résistance externe Re1. Autrement dit, la valeur de courant I3 traversant le transistor T3 est ajustée par la valeur de résistance de la résistance Re1, pour être sensiblement égale à sa valeur nominale.Those skilled in the art note that the external resistor Re1 advantageously adjusts the value of the current I3. Indeed, considering the preferred case where the transistors T3 and T4 are "matched", the resistor Re1 is used to set the output voltage of the operational amplifier A2, that is to say the control voltage V G of transistors T4 and T3. As a result, the voltage present between the terminal D of the transistor T3 and its terminal S is thus set by the value of the external resistor Re1. In other words, the current value I3 passing through the transistor T3 is adjusted by the resistance value of the resistor Re1, to be substantially equal to its nominal value.

Il en ressort que la précision du courant I3 est directement liée à celle de la résistance Re1. Or cette dernière peut avoir avantageusement une valeur de résistance usuelle, contrairement à l'art antérieur, comme cela a déjà été décrit en relation avec la figure 2. En reprenant l'exemple cité précédemment, après calculs, on trouver que la valeur de résistance de la résistance Re1 doit être de l'ordre de 1 kΩ, une telle résistance se trouvant communément dans le commerce, avec une précision de l'ordre de ±1 %. On peut ainsi fournir le courant I3 avec une précision de l'ordre de ±3 %.It follows that the accuracy of the current I3 is directly related to that of the resistor Re1. However, the latter may advantageously have a usual resistance value, contrary to the prior art, as has already been described in connection with the figure 2 . Using the example cited above, after calculations, we find that the resistance value of the resistor Re1 must be of the order of 1 kΩ, such a resistor is commonly found in the trade, with a precision of the order of ± 1%. It is thus possible to provide the current I3 with an accuracy of the order of ± 3%.

L'homme de l'art note également que le fait d'avoir agencé la résistance d'ajustement externe en-dehors de la ligne de circulation (c'est-à-dire la ligne 5) du courant I3 permet au transistor T3 de disposer de la totalité de la tension présente entre sa borne D et la masse, puisque la borne S du transistor T1 est directement connectée à la masse, contrairement au circuit représenté en figure 2.Those skilled in the art also note that having arranged the external adjustment resistor outside the circulation line (i.e., line 5) of current I3 allows transistor T3 to have the totality of the voltage present between its terminal D and the ground, since the terminal S of the transistor T1 is directly connected to the ground, unlike the circuit represented by figure 2 .

Il en ressort que l'on peut avantageusement diminuer les dimensions de la surface active de ce transistor puisque l'on dispose d'une tension plus grande entre les bornes D et S de ce transistor. On rappelle que les dimensions de la surface active sont typiquement la longueur et la largeur du canal de conduction, dans le cas d'un transistor MOS classique.It follows that we can advantageously reduce the size of the active surface of this transistor since we have a greater voltage between the terminals D and S of this transistor. It is recalled that Active surface dimensions are typically the length and width of the conduction channel, in the case of a conventional MOS transistor.

A titre de variante, la figure 5 représente un schéma électrique d'un circuit comprenant un second mode de réalisation des moyens de fourniture de courant 50 selon la présente invention, dans le cas où la tension d'alimentation Vdd est fournie par une source d'alimentation telle qu'un accumulateur. Dans ce cas, la tension d'alimentation Vdd dépend de la charge présente dans l'accumulateur, c'est-à-dire que cette tension n'est pas constante au cours du temps.Alternatively, the figure 5 represents a circuit diagram of a circuit comprising a second embodiment of the current supply means 50 according to the present invention, in the case where the supply voltage Vdd is provided by a power source such as an accumulator. In this case, the supply voltage Vdd depends on the charge present in the accumulator, that is to say that this voltage is not constant over time.

On note que le circuit représenté en figure 5 est proche de celui représenté en figure 3. Ainsi, les composants représentés en figure 5 et désignés par les mêmes références que ceux représentés en figure 3, sont semblables à ceux désignés en figure 3.We note that the circuit represented in figure 5 is close to the one represented in figure 3 . Thus, the components represented in figure 5 and designated by the same references as those represented in figure 3 , are similar to those designated in figure 3 .

Toutefois, l'homme de l'art note que la borne non-inverseuse de l'amplificateur opérationnel A2 du circuit représenté en figure 5, doit être indépendante de la tension Vdd. A cet effet, la borne D du transistor T4 des moyens 50 est connectée à l'une des bornes d'une résistance externe Re2, par l'intermédiaire d'un miroir de courant 51 connu en soi, l'autre borne de la résistance Re2 étant connectée à la masse. Il en ressort que le courant circulant dans la résistance Re2 vaut I4/m, la référence m désignant le rapport du miroir de courant. Typiquement le rapport est de l'ordre de 2.However, those skilled in the art note that the non-inverting terminal of the operational amplifier A2 of the circuit represented in FIG. figure 5 , must be independent of the voltage Vdd. For this purpose, the terminal D of the transistor T4 of the means 50 is connected to one of the terminals of an external resistor Re2, via a current mirror 51 known per se, the other terminal of the resistor Re2 being connected to ground. It follows that the current flowing in the resistor Re2 is I4 / m, the reference m designating the ratio of the current mirror. Typically the ratio is of the order of 2.

En reprenant le cas de l'exemple précédemment cité, pour obtenir une valeur du courant I3 égale à 50 mA, la valeur de résistance de la résistance externe Re2 est de l'ordre de 10 kΩ, cette valeur ayant été obtenue par calculs. L'homme de l'art note que l'on peut trouver communément dans le commerce des résistances ayant une telle valeur, et garantissant une précision de l'ordre de ±1 %, ainsi qu'un faible coût, contrairement à la résistance externe Rext décrite en relation avec la figure 2.Taking again the case of the above-mentioned example, to obtain a value of the current I3 equal to 50 mA, the resistance value of the external resistor Re2 is of the order of 10 kΩ, this value having been obtained by calculations. It will be appreciated by those skilled in the art that resistors having such a value can commonly be found commercially, and guaranteeing a precision of the order of ± 1%, as well as a low cost, unlike external resistance. Rext described in relation to the figure 2 .

Il va de soi que les différentes valeurs numériques citées ci-dessus ne sont données qu'à titre illustratif uniquement. En particulier, la valeur de résistance de la résistance Re2 dépend notamment du rapport m.It goes without saying that the different numerical values mentioned above are given for illustrative purposes only. In particular, the resistance value of the resistor Re2 depends in particular on the ratio m.

A titre de perfectionnement, les moyens de fourniture de courant selon la présente invention peuvent comprendre une pluralité de premiers transistors identiques, chaque transistor étant pourvu d'une borne de commande, et les bornes de commande de ces transistors étant toutes connectées à la borne de sortie de l'amplificateur opérationnel.By way of improvement, the current supply means according to the present invention may comprise a plurality of identical first transistors, each transistor being provided with a control terminal, and the control terminals of these transistors being all connected to the terminal of output of the operational amplifier.

Un tel agencement des moyens de fourniture de courant selon la présente invention est particulièrement avantageux, puisqu'ils peuvent fournir avec une grande précision un courant élevé à un élément extérieur. En effet, tous les transistors de ces moyens peuvent être identiquement réalisés au cours des mêmes étapes d'une filière de fabrication de type CMOS connue en soi. Ainsi, en se référant à la figure 3 (respectivement, à la figure 5), les moyens 30 (respectivement, les moyens 50) peuvent comprendre un transistor T4 et n transistors T3 identiques au transistor T4. Ainsi, les dimensions de la surface active des transistors T3 sont identiques à celles du transistor T4, et le courant I3 fourni par les moyens 30 (respectivement, les moyens 50) est donc égal à n fois le courant I4, ce qui permet de réaliser la fourniture d'un courant I3 élevé.Such an arrangement of the current supplying means according to the present invention is particularly advantageous since they can provide high current to an external element with high precision. Indeed, all the transistors of these means can be identically made during the same steps of a CMOS production process known per se. So, referring to the figure 3 (respectively, at figure 5 ), the means 30 (respectively the means 50) may comprise a transistor T4 and n transistors T3 identical to the transistor T4. Thus, the dimensions of the active surface of the transistors T3 are identical to those of the transistor T4, and the current I3 supplied by the means 30 (respectively the means 50) is therefore equal to n times the current I4, which makes it possible to realize the supply of a high current I3.

On va décrire la mise en oeuvre des moyens de fourniture de courant selon la présente invention, dans le cas où l'on souhaite fournir à un élément externe 3 un courant I3 ayant une valeur nominale prédéterminée. Cette mise en oeuvre sera illustrée à partir des moyens 30 de la figure 3. Il va de soi que les différentes valeurs numériques ne sont données ci-après qu'à titre illustratif uniquement.The implementation of the current supply means according to the present invention will be described in the case where it is desired to supply an external element 3 with a current I3 having a predetermined nominal value. This implementation will be illustrated from the means 30 of the figure 3 . It goes without saying that the different numerical values are given below for illustrative purposes only.

Considérons que la valeur nominale du courant I3 soit 50 mA, et que l'on souhaite réaliser 50 transistors T3 susceptibles de pouvoir fournir chacun une valeur de 1 mA. Par ailleurs, on sait que l'élément extérieur 3 est susceptible de fournir une tension déterminée entre les bornes D et S du transistor T3.Consider that the nominal value of the current I3 is 50 mA, and that it is desired to make 50 transistors T3 likely to be able to each provide a value of 1 mA. Moreover, it is known that the outer element 3 is capable of supplying a determined voltage between the terminals D and S of the transistor T3.

On détermine alors les dimensions de la surface active du transistor T3, de sorte que la valeur du courant I3, quand le transistor T3 fonctionne en régime de saturation, est égale à 1 mA. Par conséquent la valeur du signal de commande VG (c'est-à-dire de la tension de grille des transistors T3 et T4) est déterminée par la caractéristique courant de drain-tension drain-source en fonction de la tension de grille.The dimensions of the active surface of the transistor T3 are then determined, so that the value of the current I3, when the transistor T3 operates in saturation mode, is equal to 1 mA. Therefore the value of the control signal V G (i.e., the gate voltage of the transistors T3 and T4) is determined by the drain-voltage drain-source current characteristic as a function of the gate voltage.

Ainsi les différentes tensions présentes aux bornes S, D et G des transistors T3 et T4 sont déterminées, en considérant que les 50 transistors T3 et le transistor T4 sont identiques.Thus the different voltages present at the terminals S, D and G of the transistors T3 and T4 are determined, considering that the 50 transistors T3 and the transistor T4 are identical.

La valeur de la résistance Re1 est choisie pour que la tension présente entre ses bornes soit égale à la tension présente entre les bornes D et S du transistor T3, quand la résistance Re1 est traversée par une valeur du courant I4 égale à 1 mA.The value of the resistor Re1 is chosen so that the voltage present between its terminals is equal to the voltage present between the terminals D and S of the transistor T3, when the resistor Re1 is crossed by a value of the current I4 equal to 1 mA.

Le fonctionnement du circuit représenté en figure 3 est alors stable, quand la tension aux bornes de la résistance Re1 est égale à la tension de référence Vref, c'est-à-dire quand la valeur du courant I3 est égale à 50 fois celle du courant I4. Autrement dit, le fonctionnement de ce circuit est stable quand le courant I4 traversant le transistor T4 vaut 1 mA, et que le courant I3 fourni par les moyens 30 est égal 50 mA, avec une précision de l'ordre de ±3 %, pour une résistance Re1 valant 1 kΩ à ±1 %.The operation of the circuit represented in figure 3 is then stable, when the voltage across the resistor Re1 is equal to the reference voltage Vref, that is to say when the value of the current I3 is equal to 50 times that of the current I4. In other words, the operation of this circuit is stable when the current I4 passing through the transistor T4 is 1 mA, and the current I3 supplied by the means 30 is equal to 50 mA, with an accuracy of the order of ± 3%, for a resistance Re1 worth 1 kΩ to ± 1%.

A titre d'exemple, la figure 6 représente une courbe 60 illustrant l'évolution temporelle du courant fourni par les moyens selon la présente invention, suite à une mise sous tension de ces moyens.For example, the figure 6 represents a curve 60 illustrating the temporal evolution of the current supplied by the means according to the present invention, following a powering of these means.

La référence t0 désigne l'instant où le circuit représenté en figure 3 est mis sous tension, et la référence t1 désigne l'instant à partir duquel le fonctionnement de ce circuit est stable. Ainsi, en supposant que la tension d'alimentation Vdd vaut 2 V, la Demanderesse de la présente invention a mesuré que le temps de stabilisation est alors de l'ordre de 2 µs.The reference t0 designates the moment when the circuit represented in figure 3 is turned on, and the reference t1 designates the instant from which the operation of this circuit is stable. So, in assuming that the supply voltage Vdd is equal to 2 V, the Applicant of the present invention has measured that the stabilization time is then of the order of 2 μs.

Il va de soi pour l'homme de l'art que la description détaillée ci-dessus peut subir diverses modifications sans sortir du cadre de la présente invention.It is obvious to those skilled in the art that the detailed description above may undergo various modifications without departing from the scope of the present invention.

Claims (4)

  1. Means (50) for supplying a first current (13) to an external element (3) intended to be connected to said means, said current having to be supplied with high precision at a desired predetermined value or nominal value, said current supply means being power supplied by a power supply, such as an accumulator, whose the voltage value can vary during the time, and including :
    - at least one first transistor (T3) provided with a control terminal (G) intended to receive a control signal (VG), said transistor being arranged so that said first current flows through it, a drain terminal (D) of said first transistor (T3) being connected to the external element (3) by a line (5), and a source terminal (S) of said first transistor (T3) being connected to earth,
    - an operational amplifier (A2) having a first non-inverting input terminal, to which a reference voltage (Vref) is supplied by reference voltage supply means, a second inverting input terminal, to which an external resistor (Re2) is connected for trimming the first current to the nominal value, and an output terminal from which is supplied the control signal of the first transistor, and
    - a second transistor (T4) provided with a control terminal (G) receiving the control signal (VG), and connected in a feedback control loop of the operational amplifier so that a second current (I4/m) proportional with the first current flows through the external resistor,
    said means being characterized in that the feedback control loop further includes a current mirror circuit (51) connected across a drain terminal (D) of the second transistor and the inverting terminal of the amplifier, the voltage on the terminals of said external resistor, through which flows the second current, remaining steady independently of a voltage change in the power supply.
  2. Current supply means (50) according to claim 1, characterized in that said first and second transistors are field effect transistors connected so as to operate in saturation state.
  3. Current supply means (50) according to any one of the preceding claims, characterized in that they further include a plurality of identical first transistors, each transistor being provided with a control terminal, and in that the control terminals of said transistors are all connected to the output terminal of said operational amplifier.
  4. Current supply means (50) according to any one of the preceding claims, characterized in that the second transistor is made so that its active surface is substantially symmetrical to that of said first transistor.
EP97117804A 1997-10-15 1997-10-15 Method for providing a current of high accuracy Expired - Lifetime EP0910002B1 (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
EP97117804A EP0910002B1 (en) 1997-10-15 1997-10-15 Method for providing a current of high accuracy
DE69739232T DE69739232D1 (en) 1997-10-15 1997-10-15 Process for producing a very precise current
AT97117804T ATE421723T1 (en) 1997-10-15 1997-10-15 METHOD FOR PRODUCING A VERY PRECISE CURRENT
TW087116619A TW437137B (en) 1997-10-15 1998-10-07 Means for supplying a high precision current
JP10290688A JPH11249751A (en) 1997-10-15 1998-10-13 High-accuracy current supplying means
US09/173,162 US6137273A (en) 1997-10-15 1998-10-15 Circuit for supplying a high precision current to an external element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP97117804A EP0910002B1 (en) 1997-10-15 1997-10-15 Method for providing a current of high accuracy

Publications (2)

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EP0910002A1 EP0910002A1 (en) 1999-04-21
EP0910002B1 true EP0910002B1 (en) 2009-01-21

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EP (1) EP0910002B1 (en)
JP (1) JPH11249751A (en)
AT (1) ATE421723T1 (en)
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TW (1) TW437137B (en)

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US6462620B1 (en) 2000-09-12 2002-10-08 Silicon Laboratories, Inc. RF power amplifier circuitry and method for amplifying signals
US6448847B1 (en) 2000-09-12 2002-09-10 Silicon Laboratories, Inc. Apparatus and method for providing differential-to-single ended conversion and impedance transformation
US6917245B2 (en) 2000-09-12 2005-07-12 Silicon Laboratories, Inc. Absolute power detector
US6392488B1 (en) 2000-09-12 2002-05-21 Silicon Laboratories, Inc. Dual oxide gate device and method for providing the same
US6549071B1 (en) * 2000-09-12 2003-04-15 Silicon Laboratories, Inc. Power amplifier circuitry and method using an inductance coupled to power amplifier switching devices
US6362606B1 (en) * 2000-09-12 2002-03-26 Silicon Laboratories, Inc Method and apparatus for regulating a voltage
US6828859B2 (en) * 2001-08-17 2004-12-07 Silicon Laboratories, Inc. Method and apparatus for protecting devices in an RF power amplifier
US6894565B1 (en) 2002-12-03 2005-05-17 Silicon Laboratories, Inc. Fast settling power amplifier regulator
US6897730B2 (en) * 2003-03-04 2005-05-24 Silicon Laboratories Inc. Method and apparatus for controlling the output power of a power amplifier
GB2407721B (en) * 2003-10-28 2008-01-02 Micron Technology Europ Ltd MOS linear region impedance curvature correction.
JP4712398B2 (en) * 2005-01-17 2011-06-29 ローム株式会社 Semiconductor device

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EP0910002A1 (en) 1999-04-21
ATE421723T1 (en) 2009-02-15
US6137273A (en) 2000-10-24
DE69739232D1 (en) 2009-03-12
TW437137B (en) 2001-05-28
JPH11249751A (en) 1999-09-17

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