EP0675422B1 - Regelschaltung zur Erzeugung einer temperatur- und versorgungsspannungsunabhängigen Referenzspannung - Google Patents

Regelschaltung zur Erzeugung einer temperatur- und versorgungsspannungsunabhängigen Referenzspannung Download PDF

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Publication number
EP0675422B1
EP0675422B1 EP95200704A EP95200704A EP0675422B1 EP 0675422 B1 EP0675422 B1 EP 0675422B1 EP 95200704 A EP95200704 A EP 95200704A EP 95200704 A EP95200704 A EP 95200704A EP 0675422 B1 EP0675422 B1 EP 0675422B1
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EP
European Patent Office
Prior art keywords
transistor
emitter
collector
resistor
base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
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EP95200704A
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English (en)
French (fr)
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EP0675422A1 (de
Inventor
Timothy Ridgers
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Koninklijke Philips NV
Original Assignee
Philips Composants et Semiconducteurs SAS
Koninklijke Philips Electronics NV
Philips Electronics NV
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/26—Current mirrors
    • G05F3/265—Current mirrors using bipolar transistors only
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/30—Regulators using the difference between the base-emitter voltages of two bipolar transistors operating at different current densities

Definitions

  • the present invention relates to a regulator circuit providing a stabilized voltage, circuit which is connected between a supply terminal and a reference terminal and includes in particular four transistors of the same polarity each having a transmitter, a base and a collector, a first transistor whose emitter is coupled to the reference terminal through a first resistor, a second transistor whose emitter is connected to the reference terminal, the bases and the collectors of the first and second transistors being connected in cross coupling, a third transistor whose emitter is connected to the collector of the first transistor, its base and its collector connected together at one end of a second resistance, and a fourth transistor whose emitter is connected to the collector of the second transistor, and the base connected to the base and to the collector of the third transistor, circuit in which the surface emitter of the first transistor is larger than that of the third transistor.
  • Such a regulator circuit based on a four cell transistors of the same polarity is known from document EP-A-0329232.
  • this basic four-transistor cell can supply either a plurality of stabilized current sources or else a voltage source independent of the supply voltage and the temperature.
  • stabilized current or voltage can be achieved using bipolar transistors only of NPN type. It follows that such circuit can react quickly to variations in supply voltage or to variations in the current consumed at the output.
  • the known regulator circuit does not take into account the base currents of the transistors so the accuracy of the stabilized voltage obtained remains affected by qualified errors second-order errors.
  • the invention proposes to provide an improvement to a regulator providing a stabilized voltage which is less sensitive still at the value of the supply voltage on either side of a rated voltage, which exhibits high rejection of noise from the supply voltage and which remains stable compared to temperature variations.
  • a regulating circuit of the type indicated in the introductory paragraph is characterized in that the circuit further comprises a fifth bipolar transistor similarly polarity than the aforementioned transistors, having a transmitter connected to the collector of the fourth transistor, a base coupled to its collector at through a basic resistance of value at least equal to twice the value of the second resistance, and in that the knot connecting this basic resistance to the collector of this fifth transistor is on the one hand coupled to the other end of the second resistor and secondly, coupled to the power supply terminal through a current source.
  • the presence of the fifth transistor provides compensation for certain base currents, compensation which had been neglected in the circuit known.
  • the basic resistance of the fifth transistor is chosen from a value which is related to the value of the second resistance.
  • connection between the emitter of the fifth transistor and the collector of the fourth transistor constitutes an output of the stabilized voltage.
  • This stabilized voltage is particularly independent of the supply voltage and has a rejection rate high noise contained in the supply voltage.
  • the second, fourth and fifth transistors have an identical emitter surface.
  • the third transistor it is known that its emitter surface must be provided as being a submultiple of the emitter surface of the first transistor, this the latter being, in practice, constituted by the association of a plurality of identical transistors, connected in parallel, each of which is equivalent construction and matched to the third transistor.
  • the third transistor can also have a emitter area equal to that of the second, fourth or fifth transistors.
  • the circuit regulator is characterized in that it further comprises a sixth transistor and a seventh transistor, with the same polarity as the transistors previous, the sixth transistor, connected in diode being inserted in the direct direction between the other end of the second resistor and the source of current while the seventh transistor has its base connected to the emitter of the fourth transistor, its collector coupled to the terminal power supply, and its transmitter, which provides an output of the voltage stabilized, is coupled to the reference terminal through a resistor transmitter.
  • This embodiment has an output impedance of the lower stabilized voltage and therefore allows current consumption higher output, compared with the implementation mode previous.
  • the collector of the seventh transistor can also be another circuit output regulator providing a stabilized reference current with respect to the supply voltage and temperature.
  • the regulator circuit according to the invention can be realized only using NPN type bipolar transistors, it is able to react at high frequency, in particular to reject the output supply voltage fluctuations, high frequency. For further increase this rejection power, vis-à-vis the voltage noise power supply, the regulator circuit according to the invention is advantageously completed with a capacity connected in parallel between the bases of the fifth transistor and the second transistor.
  • the capacity in question may be of low value (a few pF per example) to be integrated with the regulator circuit, its effect is finding multiplied by the gain of the second transistor.
  • the rejection power vis-à-vis the noise of the supply voltage in as a function of the frequency of this noise increases with frequency from of a certain frequency value, of the order of 1 MHz.
  • This property contrast with the behavior of regulating circuits of the prior art using a high gain error amplifier which must be stabilized in frequency.
  • such regulating circuits have a power noise rejection which decreases beyond a limit frequency, actually corresponding to the frequency from which the amplifier error is voluntarily limited in gain.
  • the current source supplying the regulator circuit to from the supply terminal is reduced to a resistance.
  • the current source supplying the regulator circuit to from the supply terminal is reduced to a resistance.
  • the regulator circuit of FIG. 1 is supplied between a positive supply voltage terminal 1 having a voltage Vcc and a reference terminal 2 carrying a voltage VEE (ground).
  • This circuit comprises a first transistor T1 whose emitter is coupled to the terminal of reference 2 through an emitter resistor R1, a second transistor T2 whose transmitter is also connected to reference terminal 2, the transistors T1 and T2 have their bases and their collectors interconnected in cross-coupling.
  • a third transistor T3 has its emitter connected to the collector of the first transistor T1, its base and its collector combined to form a diode configuration are connected on the one hand, to a first end of a second resistor R2, as well as at the base of a fourth transistor T4 whose emitter is connected to the collector of the second transistor T2.
  • the four transistors T1 to T4 have the same polarity, here NPN type, and the emitter area of the first transitor T1 is n times larger than that of the third transistor T3.
  • T2 and T4 transistors preferably have an identical emitter surface which can also be equal to that of transistor T3.
  • the other end of the second resistor R2 is coupled to the positive supply terminal 1 through a source of current 11 which here is simply constituted by a resistor, in this example.
  • the connection between the current source 11 and the resistor R2 forms a line 12 to which is connected a resistor R5 supplying the base of a fifth transistor T5, which has its collector connected to the line 12 and its emitter connected to the collector of the fourth transistor T4.
  • I1 kT qR1 Ln (( J (( T 3 ) J (( T1 ) )
  • n the ratio of the emitter surfaces of these transistors, traversed by the same current I1
  • Expression (2) checks the proportionality between I1 and the absolute temperature T.
  • the current source 11 constitutes a very current source imperfect in which flows a current which varies with the voltage Vcc supply.
  • the tension of line 12 being practically fixed by the sum of the base / emitter voltages of transistors T2 and T3 increased by the voltage drop in resistor R2 due to the current I1, the current I2 simply results from the difference between the current delivered by the current source 11 and the current I1.
  • the transistor T5 presents to its transmitter a voltage deduced from the voltage Vx by subtracting a base / emitter voltage of this transistor which outputs the current I2.
  • transistor T5 is chosen as having a surface emitter equal to the emitter surfaces of the transistors T2 or T4 so that the base / emitter voltage drop in transistor T5 compensates for the voltage drop in transistor T2. It follows that the tension of Vref output of the circuit is substantially equal to the sum of a fall of voltage I1.R2 with a positive coefficient of temperature and a base / emitter voltage of transistor T3 traversed by a current I1, which base / emitter voltage has a negative temperature coefficient.
  • the resistance value R2 is chosen so that the two components of the sum of the voltages have temperature coefficients that cancel each other out. In practice it is usual to use a voltage drop I1.R2 whose value is around 500mV.
  • the base current of transistor T5 being, firstly approximation, substantially equal to the base current of transistor T4 or of base current of transistor T2, compensation for the aforementioned effect on the voltage Vx of line 12 should be obtained when the resistance R5 inserted in the base of transistor T5 is equal to twice the value of resistance R2. Thus the increase in voltage Vx should be compensated at the output of the regulator circuit.
  • the regulator circuit is able to react to fluctuations in supply voltages even when these fluctuations are at high frequencies.
  • the rejection of the noise contained in the supply voltage Vcc can be further improved in a preferred embodiment according to which the base of transistor T5 is coupled to the base of transistor T2 at using a capacity C.
  • This capacity can be easily integrated from the makes a low value enough. Its effect, as a first approximation, is multiplied by the gain of transistor T2.
  • the rejection rate R of noise at the output of the regulator circuit from the noise presented by the supply voltage Vcc is represented in FIG. 2 curve A, in function of the frequency F of this noise.
  • Figure 3 shows very schematically the principle behind many known regulator circuits.
  • a cell 30 with two transistors whose emitter surfaces are uneven, intended for deliver a current proportional to the temperature on a resistance of compensation R.
  • the collectors of the transistors debit on loads paired, symbolically represented by a set 31.
  • the circuit also comprises a differential amplifier 32, with high gain, of which the output feeds the combined bases of the two transistors, all arranged so that the collector currents of the transistors are equal.
  • the amplifier 32 is therefore an error amplifier and thus, the voltage the reference Vref at the output of this amplifier is all the more precise that the amplifier gain is high. He is well known, that such an amplifier needs to be frequency stabilized and has therefore a gain curve G whose shape is represented in the figure 4.
  • the power of noise noise rejection R power supply for a regulator circuit of this type, has a shape inverse to that of gain, such as that indicated by curve B in dashes, of figure 2. It is clear that from the point of view of the rejection of the noise, the circuit according to the invention is very advantageous in applications where high frequency noise is present.
  • FIG. 5 represents the diagram of a second mode of implementation of the invention.
  • the circuit of FIG. 5 shows all the elements of the circuit of FIG. 1 to which are added a sixth transistor T6 and a seventh transistor T7 of the same polarity as the transistors T1 to T5.
  • the transistor T6 is connected as a diode, its emitter-collector path is inserted between the resistor R2 and the line 12.
  • the voltage Vx of the line 12 is thus increased by the value of a V BE compared to the example previously described .
  • the transistor T7 has its base connected to the node joining the emitter of the transistor T5 at the collector of transistor T4. Its transmitter is coupled to the reference terminal 2 through an emitter load resistor R7.
  • the transistor T7 is therefore arranged as a follower emitter and provides on its transmitter stabilized voltage Vref.
  • the base / emitter voltage drop of T7 compensates, as a first approximation, for the voltage drop in the transistor T6 so that the voltage Vref is again practically identical to that obtained previously with the circuit of FIG. 1.
  • the output impedance of the circuit is lower than before and a higher current can be drawn to the output.
  • the collector of the transistor is represented as being supplied by a terminal 17. This can be connected directly to line 12 or to supply terminal 1. However, the circuit shown can also provide a stabilized reference current Io, absorbed by the collector of transistor T7. Terminal 17 then constitutes such an output of the regulator circuit.
  • the current source 11 presented as a resistor so-called limitation in Figure 1 is only a simplified example and we could also use any other current source provided with means ensuring, for example, even rough pre-regulation of the current supplying the two branches of the regulator circuit. In applications where the voltage regulator circuit is not used continuously, it it is desirable to be able to deactivate the regulator circuit when its use is not required, so as to save power consumption.
  • Figure 6 shows an example of substitution of the source of current 11 of FIG. 1 by a resistor 21 and transistor assembly MOS field effect 22.
  • a current source can be produced switchable which has a resistance equal to the sum of the value of the resistor 21 and the internal resistance of transistor 22 when it is driver.
  • FIG. 7 represents another example of current source 11, provided with means ensuring a pre-regulation of the supply current the entire regulator circuit.
  • Two resistors 31 and 32 are connected in series between the supply terminal 1 and the line 12.
  • the common point between these resistors has its voltage V D regulated by the effect of four diodes D1 to D4, connected in series between this point and the reference terminal 2.
  • Figure 8 shows yet another example of a current source 11 using at least one PNP type transistor T8, ensuring by all known means, a pre-regulation of the current delivered by its path transmitter / collector.
  • PNP type transistor has the disadvantage that the parasitic capacitance of such a transistor is generally large which is unfavorable from the point of view of voltage noise rejection feed.
  • a resistor 41 is inserted between the collector of transistor T8 and line 12 so as to reduce the effect of the stray capacitance of transistor T8.

Claims (9)

  1. Regelschaltung zum Erzeugen einer stabilisierten Spannung (Vref), wobei diese Regelschaltung zwischen einer Speiseklemme (1) und einer Bezugsklemme (2) angeschlossen ist, insbesondere vier Transistoren gleicher Polarität mit je einem Emitter, einer Basis und einem Kollektor enthält, wobei der Emitter eines ersten Transistors (T1) mit der Bezugsklemme (2) über einen ersten Widerstand (R1) verbunden ist, der Emitter eines zweiten Transistors (T2) mit der Bezugsklemme (2) verbunden ist, und die Basen und Kollektoren der ersten und zweiten Transistoren in Kreuzkopplung verbunden sind, der Emitter eines dritten Transistors (T3) mit dem Kollektor des ersten Transistors (T1) verbunden ist, und seine Basis und sein Kollektor zusammen mit einem der Ausläufer eines zweiten Widerstands (R2) verbunden sind, der andere Ausläufer dieses Widerstands mit der Speiseklemme (1) verbunden ist, und der Emitter eines vierten Transistors (T4) mit dem Kollektor des zweiten Transistors (T2) verbunden ist, die Basis mit der Basis und mit dem Kollektor des dritten Transistors (T3) verbunden ist, und die Emitteroberfläche des ersten Transistors der Regelschaltung viel größer ist als die des dritten Transistors,
    dadurch gekennzeichnet, daß die Schaltung außerdem einen fünften Bipolartransistor (T5) derselben Polarität enthält, wie die der bereits erwähnten Transistoren, von dem ein Emitter mit dem Kollektor des vierten Transistors (T4) verbunden ist, eine Basis mit seinem Kollektor über einen Basiswiderstand (R5) mit einem Wert wenigstens gleich dem doppelten Wert des zweiten Widerstands (R5) verbunden ist, und daß der Knotenpunkt (12), der diesen Basiswiderstand mit dem Kollektor des fünften Transistors verbindet, einerseits mit dem anderen Ausläufer des zweiten Widerstands (R2) und andererseits mit der Speiseklemme (1) über eine Stromquelle (11) gekoppelt ist.
  2. Regelschaltung nach Anspruch 1, dadurch gekennzeichnet, daß der zweite, der vierte und der fünfte Transistor gleiche Emitteroberflächen haben.
  3. Regelschaltung nach Anspruch 1 oder 2, dadurch gekennzeichnet, daß die Verbindung zwischen dem Emitter des fünften Transistors (T5) und dem Kollektor des vierten Transistors (T4) einen Ausgang für die stabilisierte Spannung (Vref) bildet.
  4. Regelschaltung nach Anspruch 1 oder 2, dadurch gekennzeichnet, daß sie außerdem einen sechsten Transistor (T6) und einen siebten Transistor (T7) mit derselben Polarität wie die der vorangehenden Transistoren enthält, wobei der sechste Transistor (T6) in Diodenschaltung direkt zwischen dem anderen Ausläufer des zweiten Widerstands (R2) und der Stromquelle (11) eingeschaltet ist, während der siebte Transistor (T7) mit der Basis an den Emitter des fünften Transistors (T5) angeschlossen ist, mit seinem Kollektor an die Speiseklemme (1) gekoppelt ist, und mit seinem Emitter, der einen Ausgang für die stabilisierte Spannung (Vref) bildet, über einen Emitterwiderstand (R7) an die Bezugsklemme gekoppelt ist.
  5. Regelschaltung nach Anspruch 4, dadurch gekennzeichnet, daß der Kollektor des siebten Transistors (T7) außerdem einen Ausgang der Regelschaltung bildet und einen stabilisierten Bezugsstrom (Io) liefert.
  6. Regelschaltung nach einem oder mehreren der Ansprüche 1 bis 5, dadurch gekennzeichnet, daß eine Kapazität (C ) außerdem zwischen der Basis des fünften Transistors (T5) und der Basis des zweiten Transistors (T2) angeschlossen ist.
  7. Regelschaltung nach einem oder mehreren der Ansprüche 1 bis 6, dadurch gekennzeichnet, daß die Stromquelle (11) einen sog Begrenzungswiderstand (21), (31), (41) enthält.
  8. Regelschaltung nach Anspruch 7, dadurch gekennzeichnet, daß zwischen dem Begrenzungswiderstand (21) und der Speiseklemme (1) ein MOS-Feldeffekt-Unterbrechertransistor (22) angeordnet ist.
  9. Regelschaltung nach einem der Ansprüche 7 oder 8, dadurch gekennzeichnet, daß die Stromquelle außerdem mit Mitteln zum Gewährleisten einer Vorregelung des die Regelschaltung speisenden Stroms versehen ist.
EP95200704A 1994-03-30 1995-03-22 Regelschaltung zur Erzeugung einer temperatur- und versorgungsspannungsunabhängigen Referenzspannung Expired - Lifetime EP0675422B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR9403775 1994-03-30
FR9403775A FR2718259A1 (fr) 1994-03-30 1994-03-30 Circuit régulateur fournissant une tension indépendante de l'alimentation et de la température.

Publications (2)

Publication Number Publication Date
EP0675422A1 EP0675422A1 (de) 1995-10-04
EP0675422B1 true EP0675422B1 (de) 1999-09-08

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EP95200704A Expired - Lifetime EP0675422B1 (de) 1994-03-30 1995-03-22 Regelschaltung zur Erzeugung einer temperatur- und versorgungsspannungsunabhängigen Referenzspannung

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US (1) US5576616A (de)
EP (1) EP0675422B1 (de)
JP (1) JPH07271461A (de)
KR (1) KR950033755A (de)
CN (1) CN1118461A (de)
DE (1) DE69511923T2 (de)
FR (1) FR2718259A1 (de)
TW (1) TW255073B (de)

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JP2874634B2 (ja) * 1996-03-01 1999-03-24 日本電気株式会社 基準電圧回路
FR2757964B1 (fr) * 1996-12-31 1999-03-05 Sgs Thomson Microelectronics Regulateur de tension serie
US6002293A (en) * 1998-03-24 1999-12-14 Analog Devices, Inc. High transconductance voltage reference cell
DE19821906C1 (de) * 1998-05-15 2000-03-02 Siemens Ag Klemmschaltung
CN1154032C (zh) * 1999-09-02 2004-06-16 深圳赛意法微电子有限公司 预调节器、产生参考电压的电路和方法
US6285244B1 (en) * 1999-10-02 2001-09-04 Texas Instruments Incorporated Low voltage, VCC incentive, low temperature co-efficient, stable cross-coupled bandgap circuit
FR2806489B1 (fr) * 2000-03-15 2002-06-28 St Microelectronics Sa Circuit de fourniture de tension de reference
US7259626B2 (en) * 2004-12-28 2007-08-21 Broadcom Corporation Apparatus and method for biasing cascode devices in a differential pair using the input, output, or other nodes in the circuit
CN1896900B (zh) * 2005-07-13 2010-10-06 辉达公司 能阶参考电路
TW200810231A (en) 2006-08-11 2008-02-16 Hon Hai Prec Ind Co Ltd Antenna device
TWI355772B (en) 2006-12-29 2012-01-01 Advanced Semiconductor Eng Carrier with solid antenna structure and manufactu
US8669754B2 (en) * 2011-04-06 2014-03-11 Icera Inc. Low supply regulator having a high power supply rejection ratio
CN103163935B (zh) * 2011-12-19 2015-04-01 中国科学院微电子研究所 一种cmos集成电路中基准电流源产生电路
US9921596B2 (en) * 2013-12-23 2018-03-20 Marvell Israel (M.I.S.L) Ltd Power supply noise reduction circuit and power supply noise reduction method
CN115268551B (zh) * 2021-04-30 2024-04-09 炬芯科技股份有限公司 基准电压生成电路、集成芯片和方法

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CN1118461A (zh) 1996-03-13
TW255073B (en) 1995-08-21
JPH07271461A (ja) 1995-10-20
DE69511923T2 (de) 2000-03-30
DE69511923D1 (de) 1999-10-14
FR2718259A1 (fr) 1995-10-06
EP0675422A1 (de) 1995-10-04
US5576616A (en) 1996-11-19
KR950033755A (ko) 1995-12-26

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