EP0889526A2 - Leistungshalbleitermodul mit geschlossenen Submodulen - Google Patents
Leistungshalbleitermodul mit geschlossenen Submodulen Download PDFInfo
- Publication number
- EP0889526A2 EP0889526A2 EP98810529A EP98810529A EP0889526A2 EP 0889526 A2 EP0889526 A2 EP 0889526A2 EP 98810529 A EP98810529 A EP 98810529A EP 98810529 A EP98810529 A EP 98810529A EP 0889526 A2 EP0889526 A2 EP 0889526A2
- Authority
- EP
- European Patent Office
- Prior art keywords
- submodules
- power semiconductor
- semiconductor module
- power
- gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
- H01L25/11—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L29/00
- H01L25/115—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48475—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball
- H01L2224/48476—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area
- H01L2224/48477—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding)
- H01L2224/48478—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding) the connecting portion being a wedge bond, i.e. wedge on pre-ball
- H01L2224/48479—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding) the connecting portion being a wedge bond, i.e. wedge on pre-ball on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85909—Post-treatment of the connector or wire bonding area
- H01L2224/8592—Applying permanent coating, e.g. protective coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1301—Thyristor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30107—Inductance
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
Definitions
- Power semiconductor modules with a closed housing are, for. B. from DE - PS - 36 69 017 known. They have a relatively complicated structure with several Semiconductor components, internal wiring, external connection lugs, ceramic supports, etc. They are of a housing, typically made of plastic, with bushings for the connections and inside with soft gel, hard epoxy or a combination.
- the object of the present invention is to provide an improved power semiconductor module to specify with several submodules, which is characterized by a very simple and flexible structure, robustness and easy interchangeability Submodules and very good electrical and thermal resistance. According to the invention, this object is achieved by the features of claim 1.
- Another exemplary embodiment represents a preferred construction of a power semiconductor module in which by protrusions and recesses in a stacked arrangement of conductor tracks clamping contacts are formed, which hold and contact the submodules.
- An advantage of the power semiconductor module according to the invention is its improved modularity, ease of maintenance and scalability to higher ones or lower switching powers.
- An improved alternating load strength is particularly advantageous due to the Pressure contacting of the submodules and, in the event of a fault, an inexpensive, low-resistance Short circuit behavior.
- Fig. 1 shows a preferred embodiment of a submodule 1, as is the subject of the invention.
- a ceramic substrate 2 is with a usual Process, e.g. B. DCB (direct copper bonding), a metallization 3 applied.
- Power semiconductor chips 5a, 5b are connected to a power contact C via a Solder layer 4 with the metallization 3 and on the opposite flat side with a power contact E via a further solder layer 6 with a molybdenum disk 7 soldered together.
- a control or gate contact G of the chip 5b is connected to a bonding wire 9.
- Chip 5a and 5b are so with Plastic 8 potted that they all around or at least largely through the ceramic substrate 2, the molybdenum disk 7 and the encapsulation 8 are enclosed.
- the submodule 1 forms a mechanically stable, counter external influences protected unit.
- FIG. 2 shows a preferred embodiment of a power semiconductor module shown with such encapsulated submodules.
- a bottom plate 11 On a bottom plate 11 a stacked arrangement of two conductors 12, 14 with insulating layers in between 13a, 13b, 13c mounted. Cutouts in the stacking arrangement are as Slots 19 designed for the submodules 1.
- the submodules 1 are held by spring contacts 15, 16 on the connecting surfaces 20.
- the bonding wires 9 are over Terminal contacts 21 to a common, in a symmetrical central position Arranged gate block (gate runner) 18 connected to the z. B. as PCB (printed circuit board) is executed.
- gate runner Arranged gate block
- Fig. 3 shows a known circuit diagram for the interaction of an IGBT 22 with a power semiconductor diode 23.
- This combination of power semiconductor chips 5a, 5b represents a preferred assembly for an encapsulated one Submodule 1.
- the invention also includes further embodiments of submodules 1 and Power semiconductor modules 10, some of which are explained in more detail below become.
- the assembly of a submodule 1 comprises at least one power semiconductor component, such as B. thyristor, GTO, MCT, power diode, IGBT or MOSFETS, the gate contact G, bonding wire 9 and gate block 18 are eliminated.
- a submodule 1 can also other wiring components include.
- a submodule 1 should only have a few elements included to maintain the advantage of modularity and flexibility. Especially It is desirable to have a minimal assembly, with a full one Functionality and testability of a submodule 1 is guaranteed, but multiple configurations to increase the performance of a submodule 1 can be avoided.
- the substrate 2 can be made of any electrically insulating and sufficient heat-conducting material, in particular made of AlN.
- the disc 7 can made of molybdenum, other metals, alloys or other materials Metallic conductivity exist, provided the thermal expansion coefficient is sufficiently similar to that of the semiconductor material.
- solder layers 4, 6 and the bonding wires 9 are other connection techniques applicable, provided mechanically stable contacting of the chips 5a, 5b is reached.
- a submodule 1 can also have a plurality of bonding wires 9 and generally a plurality of gate terminals 9 for one or more gate contacts G.
- the contacting on the gate block 18 can instead of with clamp contacts 21 also realized with plugs or other easily detachable contacts be.
- the potting 8 can also be made of another electrically insulating material instead of plastic Potting compound consist and is preferably by an injection molding process (transfer molding).
- the potting 8 should also Protect the bonded gate contact G and also the lead-out Mechanically support the bonding wire or gate connection 9.
- the shape the potting 8 and thus the submodule 1 is selected so that the specified Creepage distances and insulation distances in air or gas are observed can.
- the substrate 2 and the metal plate 7 are components of the submodule encapsulation and should contribute to the mechanical stability of the encapsulation. Therefore it is advantageous if the substrate 2 and the metal plate 7 are so large be chosen so that they form a substantial part of the at least one chip Cover 5a, 5b.
- the gate block 18 can be covered by a third layer Conductors z. B. in PCB technology.
- the conductor tracks can extend in planes or be angled and tabs for connection of busbars. It is especially for submodule 1 with fast switching chips 5a, 5b such. B. IGBTs 22 important that the traces 12, 14, but also all connections are designed to be low-inductance.
- the pads 20 themselves should be flexible and resilient, and the Spring contacts 15, 16 can be omitted.
- the base plate 11 advantageously designed as a cooler or with a cooler in thermal Connection. The cooler can be used as a heat sink with fins, as a liquid cooler or be constructed similarly.
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Die Bonding (AREA)
- Power Conversion In General (AREA)
Abstract
Description
- Fig. 1
- einen Schnitt durch ein erfindungsgemässes Submodul;
- Fig. 2
- einen Schnitt durch ein erfindungsgemässes Leistungshalbleitermodul mit Submodulen gemäss Fig. 1;
- Fig. 3
- ein bekanntes Schaltschema eines IGBT mit Freilaufdiode für eine bevorzugte Bestückung eines Submoduls gemäss Fig. 1.
- 1
- geschlossenes Submodul
- 2
- Keramiksubstrat
- 3, 7
- Aussenelektroden (eines Submoduls)
- 3
- Metallisierung
- 4, 6
- Lotschicht
- 5a, 5b
- Leistungshalbleiterchips
- 7
- Molybdänscheibe
- 8
- Plastikverguss, isolierende Vergussmasse
- 9
- Bondierungsdraht, Gateanschluss
- 10
- Leistungshalbleitermodul
- 11
- Bodenplatte, Kühler
- 12, 14
- Leiter
- 13a, 13b, 13c
- Feststoffisolation, Isolierschichten
- 15, 16
- Federkontakte, Kontakte
- 17
- Luftisolation, Gasisolation
- 18
- Gateblock (gate runner)
- 19
- Steckplätze für Submodule
- 20
- Anschlussflächen
- 21
- Klemmkontakte
- 22
- IGBT
- 23
- Leistungshalbleiterdiode
- C, E
- Leistungskontakte
- c
- Kollektor, Kathode
- E
- Emitter, Anode
- G
- Steuerkontakt, Gatekontakt
Claims (8)
- Leistungshalbleitermodul (10) mit einer Mehrzahl von Submodulen (1) mit jeweils mindestens einem Halbleiterchip (5a, 5b), welche Submodule (1) auf einer gemeinsamen, wärmeabführenden Bodenplatte (11) gehaltert und mit von aussen anschliessbaren Leitern (12, 14, 18) elektrisch kontaktiert sind, dadurch gekennzeichnet, dassa) der mindestens eine Halbleiterchip (5a, 5b) eines Submoduls (1) in einem Gehäuse gekapselt ist,b) die Kapselung der Submodule (1) Aussenelektroden (3, 7) für Leistungskontakte (C, E) des mindestens einen Halbleiterchips (5a, 5b) aufweist undc) die Halterung und Kontaktierung jedes gekapselten Submoduls (1) auf dem Leistungshalbleitermodul (10) leicht lösbar sind.
- Leistungshalbleitermodul nach Anspruch 1, dadurch gekennzeichnet, dassa) die Kapselung der Submodule (1) einen Verguss (8) aus einer elektrisch isolierenden Masse umfasst,b) die Aussenelektroden (3, 7) flächenhaft ausgebildet sind undc) insbesondere ein Gateanschluss (9) für einen Gatekontakt (G) des mindestens einen Halbleiterchips (5a, 5b) durch den Verguss (8) herausgeführt ist.
- Leistungshalbleitermodul nach einem der Ansprüche 1 oder 2, dadurch gekennzeichnet, dassa) die Kapselung der Submodule (1) ein elektrisch isolierendes Substrat (2) mit einer Metallisierung (3) und eine Metallplatte (7) umfasst,b) der mindestens eine Halbleiterchip (5a, 5b) mit seinen Leistungskontakten (C, E) vorzugsweise über Lotschichten (4, 6) mit der Metallisierung (3) und der Metallplatte (7) elektrisch verbunden ist undc) die Aussenelektroden (3, 7) einen überstehenden Teil des metallisierten Substrats (2) und die Metallplatte (7) umfassen.
- Leistungshalbleitermodul nach Anspruch 3, dadurch gekennzeichnet, dassa) ein Submodul (1) eine minimale Bestückung mit Halbleiterchips (5a, 5b), insbesondere einen IGBT (22) und/oder eine Leistungsdiode (23), aufweist,b) das Substrat (2) ein keramisches Material enthält,c) die Metallplatte (7) Molybdän enthält,d) die Vergussmasse (8) aus Plastik besteht unde) ein Gateanschluss (9) ein Bondierungsdraht ist.
- Leistungshalbleitermodul nach einem der Ansprüche 1 - 4, dadurch gekennzeichnet, dassa) die Leiter (12, 14) über der Bodenplatte (11) in einem Stapel induktionsarm angeordnet und untereinander für eine elektrische Isolation (13a, 13b, 13c, 17) ausreichend beabstandet sind,b) Ausschnitte in der Stapelanordnung mit zungenförmig hervorstehenden oder nutenförmig ausgenommenen Leiterbereichen als Steckplätze (19) und Anschlussflächen (20) für gekapselte Submodule (1) ausgestaltet sind undc) insbesondere Gatekontakte der gekapselten Submodule (1) über Gateanschlüsse (9) mit einem Gateblock (18) verbunden sind.
- Leistungshalbleitermodul nach Anspruch 6, dadurch gekennzeichnet, dassa) die Leiter (12, 14) durch eine Feststoffisolation (13a, 13b, 13c) und im Bereich der Steckplätze (19) durch eine Luft- oder Gasisolation (17) beabstandet sind,b) eine Druckkontaktierung der Aussenelektroden (3, 7) der Submodule (1) durch die Anschlussflächen (20) vorgesehen ist undc) insbesondere die Anschlussflächen (20) mit Federkontakten (15, 16) ausgestattet sind.
- Leistungshalbleitermodul nach einem der Ansprüche 3 - 6, dadurch gekennzeichnet, dassa) die Bodenplatte (11) als Kühler ausgebildet ist oder mit einem Kühler in thermischer Verbindung steht,b) das Substrat (2) eine gute Wärmeleitfähigkeit aufweist undc) die Submodule (1) nebeneinander mit einem guten Wärmekontakt zur Bodenplatte (11) befestigbar sind.
- Leistungshalbleitermodul nach einem der Ansprüche 1 - 7, dadurch gekennzeichnet, dass eine Anzahl von Submodulen (1) nach Massgabe einer geforderten Schaltleistung des Leistungshalbleitermoduls (10) gewählt ist.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19726534 | 1997-06-23 | ||
DE19726534A DE19726534A1 (de) | 1997-06-23 | 1997-06-23 | Leistungshalbleitermodul mit geschlossenen Submodulen |
Publications (2)
Publication Number | Publication Date |
---|---|
EP0889526A2 true EP0889526A2 (de) | 1999-01-07 |
EP0889526A3 EP0889526A3 (de) | 1999-07-07 |
Family
ID=7833330
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP98810529A Ceased EP0889526A3 (de) | 1997-06-23 | 1998-06-10 | Leistungshalbleitermodul mit geschlossenen Submodulen |
Country Status (7)
Country | Link |
---|---|
US (1) | US5982031A (de) |
EP (1) | EP0889526A3 (de) |
JP (1) | JP4051135B2 (de) |
CN (1) | CN1196195C (de) |
DE (1) | DE19726534A1 (de) |
RU (1) | RU2210837C2 (de) |
UA (1) | UA60298C2 (de) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10109330C1 (de) * | 2001-02-27 | 2002-06-06 | Siemens Ag | Schaltungsanordnung und Verfahren zur Reparatur einer solchen Schaltungsanordnung |
Families Citing this family (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19725836C2 (de) * | 1997-06-18 | 2001-10-04 | Infineon Technologies Ag | Leistungshalbleiter-Anordnung auf DCB-Substrat |
DE19942770A1 (de) * | 1999-09-08 | 2001-03-15 | Ixys Semiconductor Gmbh | Leistungshalbleiter-Modul |
JP3919398B2 (ja) * | 1999-10-27 | 2007-05-23 | 三菱電機株式会社 | 半導体モジュール |
EP1318547B1 (de) * | 2001-12-06 | 2013-04-17 | ABB Research Ltd. | Leistungshalbleiter-Modul |
US6885562B2 (en) | 2001-12-28 | 2005-04-26 | Medtronic Physio-Control Manufacturing Corporation | Circuit package and method for making the same |
DE10213648B4 (de) * | 2002-03-27 | 2011-12-15 | Semikron Elektronik Gmbh & Co. Kg | Leistungshalbleitermodul |
US6940712B2 (en) * | 2002-07-17 | 2005-09-06 | International Business Machines Corporation | Electronic device substrate assembly with multilayer impermeable barrier and method of making |
DE102004046800B4 (de) * | 2004-09-27 | 2016-07-21 | Infineon Technologies Ag | Verfahren zum Testen eines Kontaktbereichs eines Halbleitermoduls |
CA2643110C (en) * | 2006-02-23 | 2014-09-16 | Siemens Aktiengesellschaft | Device for short-circuiting of power semiconductor modules |
DE102007046969B3 (de) | 2007-09-28 | 2009-04-02 | Siemens Ag | Elektronische Schaltung aus Teilschaltungen und Verfahren zu deren Herstellung und demgemäßer Umrichter oder Schalter |
CN102349363B (zh) * | 2009-03-13 | 2014-10-22 | 西门子公司 | 带有层状构造的绝缘侧壁的功率半导体模块 |
US8009429B1 (en) | 2010-03-22 | 2011-08-30 | Honeywell International Inc. | Electrical component thermal management |
KR101544332B1 (ko) * | 2011-08-30 | 2015-08-12 | 도요타 지도샤(주) | 반도체 장치 |
US8847384B2 (en) | 2012-10-15 | 2014-09-30 | Toyota Motor Engineering & Manufacturing North America, Inc. | Power modules and power module arrays having a modular design |
US9623993B2 (en) | 2013-03-01 | 2017-04-18 | The Procter & Gamble Company | Method and apparatus for taping containers |
JP6075128B2 (ja) * | 2013-03-11 | 2017-02-08 | 株式会社ジェイテクト | 駆動回路装置 |
CN104867887A (zh) * | 2015-05-04 | 2015-08-26 | 嘉兴斯达半导体股份有限公司 | 一种双层灌封的功率模块及封装方法 |
RU2656302C1 (ru) * | 2017-06-26 | 2018-06-04 | Общество с ограниченной ответственностью "ЧЭАЗ-ЭЛПРИ" | Подмодуль полумостовой силового полупроводникового модуля |
DE102019206823A1 (de) * | 2019-05-10 | 2020-11-12 | Robert Bosch Gmbh | Verfahren zur Ausbildung einer Hochvoltleistungsmodulfamilie |
CN111261619A (zh) * | 2019-11-22 | 2020-06-09 | 湖北台基半导体股份有限公司 | 悬浮压接功率半导体模块 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0012019A1 (de) * | 1978-12-01 | 1980-06-11 | Hitachi, Ltd. | Elektrode für eine Halbleiteranordnung und Verfahren zum Herstellen einer solchen Elektrode |
US5200640A (en) * | 1991-08-12 | 1993-04-06 | Electron Power Inc. | Hermetic package having covers and a base providing for direct electrical connection |
EP0637080A1 (de) * | 1993-07-27 | 1995-02-01 | Fuji Electric Co. Ltd. | Halbleiterbauelement mit Druckkontakt und dessen Montageverfahren |
WO1996015577A1 (en) * | 1994-11-15 | 1996-05-23 | Kenetech Windpower, Inc. | Laminated bus assembly and coupling apparatus for a high power electrical swtiching converter |
Family Cites Families (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3521572A1 (de) * | 1985-06-15 | 1986-12-18 | Brown, Boveri & Cie Ag, 6800 Mannheim | Leistungshalbleitermodul mit keramiksubstrat |
DE9114516U1 (de) * | 1991-11-21 | 1992-01-16 | Siemens AG, 8000 München | Stromrichtergerät mit mehreren nebeneinander angeordneten Halbleitermodulen |
JP2848068B2 (ja) * | 1991-12-10 | 1999-01-20 | 富士電機株式会社 | 半導体装置 |
JPH05167218A (ja) * | 1991-12-17 | 1993-07-02 | Oki Electric Ind Co Ltd | 電力増幅器の実装構造 |
JPH0629459A (ja) * | 1992-07-08 | 1994-02-04 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
DE4418426B4 (de) * | 1993-09-08 | 2007-08-02 | Mitsubishi Denki K.K. | Halbleiterleistungsmodul und Verfahren zur Herstellung des Halbleiterleistungsmoduls |
EP0597144A1 (de) * | 1992-11-12 | 1994-05-18 | IXYS Semiconductor GmbH | Hybride leistungselektronische Anordnung |
US5259781A (en) * | 1992-11-18 | 1993-11-09 | International Business Machines Corporation | Electrical connector alignment and actuation assembly |
US5559374A (en) * | 1993-03-25 | 1996-09-24 | Sanyo Electric Co., Ltd. | Hybrid integrated circuit |
JP3157362B2 (ja) * | 1993-09-03 | 2001-04-16 | 株式会社東芝 | 半導体装置 |
JP3471880B2 (ja) * | 1994-02-23 | 2003-12-02 | 三菱電機株式会社 | 圧接型半導体装置 |
JPH07249719A (ja) * | 1994-03-14 | 1995-09-26 | Omron Corp | 電子機器 |
JPH07263622A (ja) * | 1994-03-25 | 1995-10-13 | Toshiba Corp | 半導体装置 |
JP3235452B2 (ja) * | 1995-03-20 | 2001-12-04 | 松下電器産業株式会社 | 高周波集積回路装置 |
US5541453A (en) * | 1995-04-14 | 1996-07-30 | Abb Semiconductors, Ltd. | Power semiconductor module |
DE19530264A1 (de) * | 1995-08-17 | 1997-02-20 | Abb Management Ag | Leistungshalbleitermodul |
US5705848A (en) * | 1995-11-24 | 1998-01-06 | Asea Brown Boveri Ag | Power semiconductor module having a plurality of submodules |
JPH09213878A (ja) * | 1996-01-29 | 1997-08-15 | Toshiba Corp | 半導体装置 |
DE19617055C1 (de) * | 1996-04-29 | 1997-06-26 | Semikron Elektronik Gmbh | Halbleiterleistungsmodul hoher Packungsdichte in Mehrschichtbauweise |
WO1998012748A1 (fr) * | 1996-09-18 | 1998-03-26 | Hitachi, Ltd. | Module a semiconducteur de jonction |
-
1997
- 1997-06-23 DE DE19726534A patent/DE19726534A1/de not_active Withdrawn
-
1998
- 1998-06-10 EP EP98810529A patent/EP0889526A3/de not_active Ceased
- 1998-06-22 RU RU98111744/28A patent/RU2210837C2/ru not_active IP Right Cessation
- 1998-06-22 JP JP17468598A patent/JP4051135B2/ja not_active Expired - Fee Related
- 1998-06-22 UA UA98063233A patent/UA60298C2/uk unknown
- 1998-06-23 CN CNB981029949A patent/CN1196195C/zh not_active Expired - Fee Related
- 1998-06-23 US US09/102,368 patent/US5982031A/en not_active Expired - Lifetime
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0012019A1 (de) * | 1978-12-01 | 1980-06-11 | Hitachi, Ltd. | Elektrode für eine Halbleiteranordnung und Verfahren zum Herstellen einer solchen Elektrode |
US5200640A (en) * | 1991-08-12 | 1993-04-06 | Electron Power Inc. | Hermetic package having covers and a base providing for direct electrical connection |
EP0637080A1 (de) * | 1993-07-27 | 1995-02-01 | Fuji Electric Co. Ltd. | Halbleiterbauelement mit Druckkontakt und dessen Montageverfahren |
WO1996015577A1 (en) * | 1994-11-15 | 1996-05-23 | Kenetech Windpower, Inc. | Laminated bus assembly and coupling apparatus for a high power electrical swtiching converter |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10109330C1 (de) * | 2001-02-27 | 2002-06-06 | Siemens Ag | Schaltungsanordnung und Verfahren zur Reparatur einer solchen Schaltungsanordnung |
Also Published As
Publication number | Publication date |
---|---|
JPH1174454A (ja) | 1999-03-16 |
DE19726534A1 (de) | 1998-12-24 |
UA60298C2 (uk) | 2003-10-15 |
RU2210837C2 (ru) | 2003-08-20 |
JP4051135B2 (ja) | 2008-02-20 |
CN1213179A (zh) | 1999-04-07 |
EP0889526A3 (de) | 1999-07-07 |
CN1196195C (zh) | 2005-04-06 |
US5982031A (en) | 1999-11-09 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP0889526A2 (de) | Leistungshalbleitermodul mit geschlossenen Submodulen | |
DE112007001249B4 (de) | Kühlbares Halbleitergehäuse | |
DE102013207804B4 (de) | Verfahren zum Herstellen eines Leistungsmoduls mit mittels Lichtbogenschweissen direkt verbundenen, wärmeleitenden Strukturen | |
EP0841843B1 (de) | Leistungsmodul zur Ansteuerung von Elektromotoren | |
EP0901166B1 (de) | Leistungshalbleitermodul mit in Submodulen integrierten Kühlern | |
DE112007000919B4 (de) | Gemeinsames Gehäuse für eine hohe Leistungsdichte aufweisende Bauteile, insbesondere für IGBTs und Dioden, mit niedriger Induktivität und drahtfreien Bondverbindungen | |
DE10310809B4 (de) | Leistungshalbleitereinrichtung | |
DE102007006447B4 (de) | Elektronisches Modul und Verfahren zur Herstellung des elektronischen Moduls | |
DE102007024413A1 (de) | Bonddrahtloses Leistungsmodul mit doppelseitiger Einzelbauelementkühlung und Tauchbadkühlung | |
DE69216016T2 (de) | Halbleiteranordnung | |
DE112016001711T5 (de) | Leistungselektronikmodul | |
EP0776042A2 (de) | Leistungshalbleitermodul mit einer Mehrzahl von Submodulen | |
EP0597144A1 (de) | Hybride leistungselektronische Anordnung | |
EP1445799B1 (de) | Kühleinrichtung für Halbleiter auf Leiterplatte | |
DE69624284T2 (de) | Verfahren zur Herstellung von Viel-Chip-Packungen | |
EP1672692B1 (de) | Leistungshalbleiter-Modul | |
EP0750452A1 (de) | Elektronischer Lastschalter für ein Kraftfahrzeug | |
DE102012211446B4 (de) | Explosionsgeschütztes halbleitermodul | |
EP0738008A2 (de) | Leistungshalbleitermodul | |
WO2018202509A1 (de) | Halbleitermodul | |
DE10309302B4 (de) | Leistungshalbleitermodul mit Sensorbauteil | |
DE10303103B4 (de) | Halbleiterbauteil, insbesondere Leistungshalbleiterbauteil | |
DE102004030443A1 (de) | Steuergerät | |
DE10200372A1 (de) | Leistungshalbleitermodul | |
DE19648492A1 (de) | Multi-Chip-Modul |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
AK | Designated contracting states |
Kind code of ref document: A2 Designated state(s): DE FR GB |
|
AX | Request for extension of the european patent |
Free format text: AL;LT;LV;MK;RO;SI |
|
PUAL | Search report despatched |
Free format text: ORIGINAL CODE: 0009013 |
|
AK | Designated contracting states |
Kind code of ref document: A3 Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE |
|
AX | Request for extension of the european patent |
Free format text: AL;LT;LV;MK;RO;SI |
|
RIC1 | Information provided on ipc code assigned before grant |
Free format text: 6H 01L 25/07 A, 6H 01L 25/16 B, 6H 01L 25/11 B |
|
17P | Request for examination filed |
Effective date: 19991229 |
|
AKX | Designation fees paid |
Free format text: DE FR GB |
|
RAP1 | Party data changed (applicant data changed or rights of an application transferred) |
Owner name: ABB (SCHWEIZ) AG |
|
RAP1 | Party data changed (applicant data changed or rights of an application transferred) |
Owner name: ABB SEMICONDUCTORS AG |
|
RAP1 | Party data changed (applicant data changed or rights of an application transferred) |
Owner name: ABB SCHWEIZ AG |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION HAS BEEN REFUSED |
|
18R | Application refused |
Effective date: 20071223 |