EP0836173B1 - Méthode de commande multiplexée pour un dispositif électrooptique à cristaux liquides du type matriciel - Google Patents

Méthode de commande multiplexée pour un dispositif électrooptique à cristaux liquides du type matriciel Download PDF

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Publication number
EP0836173B1
EP0836173B1 EP97120078A EP97120078A EP0836173B1 EP 0836173 B1 EP0836173 B1 EP 0836173B1 EP 97120078 A EP97120078 A EP 97120078A EP 97120078 A EP97120078 A EP 97120078A EP 0836173 B1 EP0836173 B1 EP 0836173B1
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Prior art keywords
row
voltage
electrodes
column
row electrodes
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German (de)
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EP0836173A3 (fr
EP0836173A2 (fr
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Akihiko Ito
Shoichi Iino
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Seiko Epson Corp
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Seiko Epson Corp
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3622—Control of matrices with row and column drivers using a passive matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3622—Control of matrices with row and column drivers using a passive matrix
    • G09G3/3625—Control of matrices with row and column drivers using a passive matrix using active addressing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3681—Details of drivers for scan electrodes suitable for passive matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202—Addressing of scan or signal lines
    • G09G2310/0205—Simultaneous scanning of several lines in flat panels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2011—Display of intermediate tones by amplitude modulation
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2014—Display of intermediate tones by modulation of the duration of a single pulse during which the logic level remains constant
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2018—Display of intermediate tones by time modulation using two or more time intervals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers

Definitions

  • the present invention relates to a multiplex driving method and a drive circuit of a matrix type liquid crystal electro-optical device such as a liquid crystal display panel, for example.
  • the present invention further relates to a liquid crystal display device.
  • Multiplex driving based on the amplitude selective addressing scheme is one known driving method for liquid crystal devices such as those referred to above.
  • Fig. 19 is an applied voltage waveform diagram showing one example of a prior art driving method of multiplex driving a simple matrix type liquid crystal electro-optical device as shown in Fig. 20 by means of an amplitude selective addressing scheme;
  • Fig. 19 (a) and (b) are the voltage waveforms applied to row electrodes X 1 , X 2 , respectively,
  • Fig. 19 (c) is the voltage waveform applied to column electrode Y 1
  • Fig. 19 (d) is the voltage waveform applied to the pixel at the intersection of row electrode X 1 and column electrode Y 1 .
  • This example sequentially selects row electrodes X 1 , X 2 ,..., X n , one at a time, and depending on whether each pixel on the selected row electrode is ON or OFF applies a corresponding column voltage waveform to each of the column electrodes Y 1 , Y 2 ,..., Y m .
  • Fig. 21 is an applied voltage waveform diagram showing an example of this prior art driving method of simultaneously selecting and driving plural row electrodes, Fig. 21 (a) being the row voltage waveforms applied to the row electrodes X 1 , X 2 , and X 3 , (b) the row voltage waveforms applied to row electrodes X 4 , X 5 , and X 6 , (c) the column voltage waveform applied to column electrode Y 1 , and (d) the voltage waveform applied to the pixel at the intersection of row electrode X 1 and column electrode Y 1 .
  • This example simultaneously selects three sequential row electrodes (or lines) at a time for a display pattern as shown in Fig. 20. Specifically, three row electrodes X 1 , X 2 , and X 3 are first selected by row voltages as shown in Fig. 21 (a) applied to these row electrodes X 1 , X 2 , and X 3 , and a specified column voltage is simultaneously applied to each of the column electrodes Y1 to Y m as described in more detail below. Next, row electrodes X 4 , X 5 , and X 6 in Fig. 20 are selected by row voltages such as shown in Fig. 21 (b) applied as described above, and a column voltage is simultaneously applied to each of the column electrodes Y 1 to Y m . One frame is completed when all row electrodes X 1 to X n have been selected, and this operation is then repeated.
  • the row select patterns i.e., when a positive pulse of a voltage waveform applied to a row electrode is defined as an ON state and a negative pulse as an OFF state, the voltage ON/OFF patterns applied to the three simultaneously selected row electrodes X 1 , X 2 , and X 3 are shown in the following table using values of 1 and 0 to represent an ON state and an OFF state, respectively.
  • X 1 0 0 0 0 1 1 1 1 1 X 2 0 0 1 1 0 0 1 1 X 3 0 1 0 1 0 1 0 1 0 1 0 1 0 1
  • Fig. 22 (a) The voltage waveforms generated based on these values for application to the row electrodes are shown in Fig. 22 (a).
  • the waveforms shown in Fig. 22 (a) contain several different frequency components, which can result in display ununiformity when applied.
  • Waveforms modified by reordering the row select patterns in the array shown above to reduce the differences in the frequency components are shown in Fig. 22 (b).
  • the prior art example shown in Fig. 21 also uses these waveforms.
  • the column voltages applied to each of the column electrodes Y 1 to Y m have the same number of patterns as the row voltages, and the voltage level of each pulse in the column voltage waveform has a value corresponding to the ON/OFF states of the selected row electrodes.
  • an ON state is when the row voltage waveform applied to any of the simultaneously selected row electrodes X1, X2, and X3 is a positive pulse and an OFF state is when it is a negative pulse.
  • the ON/OFF states of the display data (the display data pattern) for the pixels formed at the intersections of the column electrode and each of the simultaneously selected row electrodes, are compared pixel by pixel or bit by bit with the ON/OFF states of the selected row electrodes, and the level of the column voltage waveform is set according to the number of mismatches.
  • pulse voltages -V Y2 , -V Y1 , V Y1 , and V Y2 are applied when the number of mismatches is 0, 1, 2, and 3, respectively.
  • V X1 corresponds to ON and -V X1 to OFF in the voltage waveforms applied to row electrodes X1, X2, and X3 in Fig. 21
  • ON and OFF pixels are represented with a solid and a white dot, respectively, in Fig. 20
  • the pixels at the intersections of row electrodes X 1 , X 2 , and X 3 and column electrode Y 1 are ON-ON-OFF, respectively, and the initial row select pattern of the voltage applied to these row electrodes X 1 , X 2 , and X 3 is OFF-OFF-OFF.
  • voltage V Y1 as shown in Fig. 21 (c) is applied as the first pulse to the column electrode Y 1 .
  • the second row select pattern of the voltage applied to the row electrodes X 1 , X 2 , and X 3 is OFF-OFF-ON; because each of these is a mismatch when compared sequentially with the previous ON-ON-OFF display data pattern and the number of mismatches is therefore three, voltage V Y2 is applied as the second pulse to column electrode Y 1 .
  • V Y1 is applied as the third pulse, -V Y1 as the fourth pulse, and the following pulses are, in sequence, -V Y2 , V Y1 , -V Y1 , - V Y1 .
  • the next group of three row electrodes X 4 to X 6 are then selected, and when the voltages shown in Fig. 21 (b) are applied to these row electrodes X 4 to X 6 , a column voltage of the voltage level corresponding to the number of mismatches between the ON/OFF states of the pixels at the intersections of row electrodes X 4 to X 6 and the column electrode, i.e. the display data pattern, and the ON/OFF states of the voltages applied to the row electrodes X 4 to X 6 , i.e. the row select pattern, is applied as shown in Fig. 21 (c).
  • the values 1 and 0 are used for the positive and negative selection pulses, respectively, of the row voltage waveforms, and 1 and 0 are used for the ON and OFF display data states of pixels, respectively, and the column voltage waveform is set according to the number of mismatches
  • the values of 1 and 0 can be exchanged for each other and further the column voltage waveform can also be set according the number of matches or according to the difference between the number of matches and the number of mismatches.
  • this method of simultaneously selecting and driving plural sequential row electrodes allows to reduce the drive voltage while achieving the same on/off contrast ratio as the single line selection method explained with reference to Fig. 19.
  • the number of Ci is determined by the number of bits in one word, and not by the row select pattern.
  • V pixel (V column - V row ) or (V row - V column ) where V row is the row voltage and V column is the column voltage.
  • V pixel +Vr - V (i) or -Vr - V (i)
  • V pixel Vr - V (i) , Vr + V (i) , -Vr - V (i) , or -Vr + V (i) .
  • V pixel
  • the specific voltage level applied to a pixel is -(Vr + V (i) ) or (Vr - V (i) ) for a selected line (row electrode), and V (i) for unselected lines (row electrodes).
  • the voltage applied to a given pixel be as high as possible with ON pixels and as low as possible with OFF pixels.
  • V pixel V row - V column will decrease with the increase in the number of mismatches.
  • the number of mismatches will provide the number of unfavorable voltages (column voltages).
  • Ci ⁇ (h-i)/h ⁇ Ci
  • Ci Ci
  • Ci - Bi ⁇ (h-1)! ⁇ / ⁇ i ⁇ (h-i-1)! ⁇ where h ⁇ + 1.
  • V ON (rms) ⁇ (S 1 + S 2 + S 3 )/S 4 ⁇ 1/2
  • V OFF (rms) ⁇ (S 5 + S 6 + S 3 )/S 4 ⁇ 1/2
  • Vr/V (o) N 1/2 /h row selection voltage
  • US-A-5,075,683 discloses a method and device for controlling a matrix screen displaying grey levels using time modulation. Single rows of the matrix configuration are successively selected, each for one line or selection period. The selection period is divided into subperiods and, depending on the respective grey scale level, a column voltage is or is not applied in each subperiod. In other words, grey levels are displayed by changing the time during which within each selection period a certain voltage is applied.
  • the object of the present invention is to provide a driving method and a drive circuit of a matrix type liquid crystal device, and a liquid crystal display device capable of achieving a good gray scale display even when simultaneously selecting and driving plural row electrodes.
  • This object is achieved with a driving method, a driving circuit and a display device, respectively, as claimed.
  • Fig. 1 is an applied voltage waveform diagram used to describe a first embodiment of a driving method, Fig. 1 (a) being the voltage waveforms applied to row electrodes X 1 , X 2 , and X 3 , (b) being the voltage waveforms applied to row electrodes X 4 , X 5 , and X 6 , (c) being the voltage waveform applied to column electrode Y 1 , and (d) being the (composite) voltage waveform applied to the pixel at the intersection of row electrode X 1 and column electrode Y 1 .
  • the present embodiment simultaneously selects three sequential row electrodes to achieve the display as shown in Fig. 2.
  • each pulse width becomes narrower.
  • the pulse width would be even narrower, resulting in crosstalk.
  • the voltage waveforms applied to the row electrodes are set as described below so that the pulse width is wider.
  • the voltage waveforms applied to the row electrodes are decided based on the conditions that:
  • the pattern of the applied voltages is appropriately determined from a natural binary, Walsh, Hadamard, or other systems of orthogonal functions considering the above conditions.
  • the first is absolute. To satisfy this condition the voltage waveforms applied to each row electrode are generated so that they are orthogonal to each other.
  • the applied voltage waveforms shown in Figs. 3 (a) and (b) were determined considering the above conditions.
  • the applied voltage waveforms in Fig. 3 (a) contain different frequency components, namely
  • the applied voltage waveforms in Fig. 3 (b) contain different frequency components, namely
  • Fig. 3 (a) and (b) are one example and can be changed as appropriate, and that the row electrode selection sequence and sequence of the row select patterns applied to the row electrodes can also be changed using the properties of the systems of orthogonal functions.
  • the row voltage waveforms shown in Fig. 1 (a) and (b) form the voltage waveforms applied to the three simultaneously selected row electrodes based on the waveform in Fig. 3 (b).
  • the selection period is divided into four separate selection subperiods t 1 , t 2 , t 3 , t 4 in each frame.
  • Each of the selection subperiods t 1 , t 2 , t 3 , t 4 divided as described above is subdivided into plural intervals as shown in Fig. 1 (c), and in each of these intervals a weighted voltage is applied to the column electrodes Y1 to Y m to obtain a desired display.
  • subperiod t 1 is subdivided into two equal intervals a and b.
  • the display data for each pixel are composed of two bits representing a binary code for a gray scale display with four gradations.
  • a column voltage specifically weighted for each bit based on the display data shown in Fig. 2 is applied, during interval a for the high or most significant bit and during interval b for the low or least significant bit as shown in Fig. 1.
  • V X1 applied to a row electrode represents the ON states and -V X1 the OFF state
  • the display data value 0 represents OFF and 1 ON
  • the ON/OFF states of the simultaneously selected row electrodes and the ON/OFF state of the display data are compared bit by bit to calculate the number of mismatches
  • the voltages applied for the high bit when the number of mismatches is 3, 2, 1, and 0, respectively are V Y4 , V Y2 , -V Y2 , and -V Y4
  • the voltages applied for the low bit when the number of mismatches is 3, 2, 1, and 0, respectively are V Y3 , V Y1 , -V Y1 , and -V Y3 .
  • the selected pulses applied to row electrodes X 1 , X 2 , and X 3 are ON, ON, OFF, respectively, and the display data for the pixels at the intersections of column electrode Y 1 and row electrodes X 1 , X 2 , and X 3 are (00), (01), (10), i.e. the high bits represent OFF, OFF, ON.
  • Comparison shows the number of mismatches is three, and voltage V Y4 is therefore applied to the column electrode Y 1 in interval a. Since the low bits represent OFF, ON, OFF, the number of mismatches compared with the row select pattern is one, and voltage - V Y1 is therefore applied in interval b.
  • the display data for the pixels on the row electrodes X 1 , X 2 , and X 3 is compared with the selected pulses applied to the row electrodes (the row select pattern), and a column voltage corresponding to the number of mismatches is applied.
  • row electrodes X 4 , X 5 , and X 6 are simultaneously selected and the corresponding column electrode waveforms are applied to the column electrodes.
  • the operation returns to the first group of row electrodes X 1 , X 2 , and X 3 and the specified voltages are sequentially applied following the above sequence in subperiods t 2 , t 3 , and t 4 .
  • a good gray scale display with minimal crosstalk can thus be achieved by driving as described above.
  • the sequence of the row voltage waveforms applied to the row electrodes in the above subperiods t 1 to t 4 can be changed for all frames or in single frames, and the waveforms shown in Fig. 3 (a) or other waveforms satisfying the conditions described above can be used as the row voltage waveforms applied to the row electrodes.
  • two kinds of waveforms can be alternately used for each group of simultaneously selected row electrodes, for example the kind of waveforms shown in Fig. 3 (a) for row electrodes X 1 to X 3 and the kind of waveforms shown in Fig. 3 (b) for row electrodes X 4 to X 6 , or a sequence of three or more kinds of waveforms can be used alternately.
  • the subperiods t 1 to t 4 can be separate in each frame period as in the above embodiment, or can be consecutive in each frame, if the subperiods of the selection period are separate, i.e. distributed within one frame as in the present embodiment, the period during which a row electrode continuously stays unselected becomes shorter and the contrast can be improved.
  • the selection period is divided into four subperiods t 1 to t 4 in the above embodiment, any number of divisions can be used; further, each of the subperiods t1 to t4 can be subdivided into two intervals as explained above, or it can be subdivided into more than two intervals allowing more gradations.
  • row electrodes sequential in position, are selected at a time in the above embodiment, but the number of the selected row electrodes can be any appropriate number and the row electrodes forming a group of simultaneously selected row electrodes do not necessarily need to be sequential in position.
  • a drive circuit executing the driving method described above is described based on Figs. 4 to Fig. 6.
  • Fig. 4 is a block diagram showing one example of a drive circuit.
  • 1 is a row electrode driver
  • 2 is a column electrode driver
  • 3 is a frame memory
  • 4 is an arithmetic operation circuit
  • 5 is a row data generating circuit
  • 6 is a latch.
  • Fig. 5 is a block diagram of the row electrode driver
  • Fig. 6 is a block diagram of the column electrode driver
  • 11 and 21 are shift registers
  • 12 and 22 are latches
  • 13 and 33 are decoders
  • 14 and 24 are level shifters.
  • each row electrode waveform is generated based on a scan data signal S3 indicating a positive selection, negative selection, or no selection, the scan data signal being generated from the row data generating circuit 5 and sent to the row electrode driver 1.
  • the scan data signal S3 from the row data generating circuit 5 is sent to the shift register 11 at the scan shift clock signal S5, and after the data for each of the row electrodes in one scanning period have been entered into the shift register, the data are latched in the latch 12 at latch signal S6 , the data expressing the state of each row electrode are then decoded by decoder 13, and the decoded outputs are used, via level shifter 14, to switch on one of three analog switches 15 provided for each output, and voltage V X1 , -V X1 , or 0 is selected and output to the respective row electrode when the selection is positive, negative, or no selection, respectively.
  • the display data signal S1 for the three simultaneously selected row electrodes X 1 , X 2 , and X 3 is read from frame memory 3, and the display data signal S1 and scanning data signal S3, latched in latch 6, are converted by the arithmetic operation circuit 4. This data conversion is performed as described above, and the converted data are transferred to the column electrode driver 2 as column data signal.
  • the column data signal S2 from the arithmetic operation circuit 4 is sent to shift register 21 at shift clock signal S7, and after the data for each column electrode in one scanning period have been input, the data are latched in latch 22 at the latch signal S8, the data expressing the state of each column electrode are then decoded by decoder 23 whose outputs are used, via level shifter 24, to switch on one of the eight analog switches 25 provided for each output, and one of the eight voltages V Y4 , V Y3 , V Y2 , V Y1 , -V Y1 ,-V Y2 , -V Y3 , and -V Y4 is output to each column electrode.
  • a driving method as described above can thus be simply and reliably achieved by using a drive circuit as described above.
  • a display apparatus comprising a display device as described above comprises a drive circuit as described above to execute the driving method as described above, a display apparatus capable of achieving a good gray scale display with minimal crosstalk generated can be achieved.
  • one of four voltages is selected according to the display data and applied to the column electrodes for each bit of the display data, but by providing a virtual electrode the number of voltage levels applied to the column electrodes can be reduced.
  • Fig. 7 is a voltage waveform diagram for an embodiment that is capable of driving by a reduced number of voltage levels applied to the column electrodes by providing a virtual row electrode in each group of simultaneously selected row electrodes
  • Fig. 8 illustrates the basis for reducing the number of voltage levels applied to the column electrodes by providing a virtual electrode.
  • This embodiment provides, for example, virtual row electrodes X n+1 , X n+2 ,... each after a corresponding group of simultaneously selected row electrodes as shown in Fig. 8, such that virtual row electrode X n+1 is selected simultaneously with row electrodes X 1 , X 2 , and X 3 , for example.
  • the number of mismatches is calculated as in the first embodiment assuming voltage V X1 is applied to the row electrode in each ON state, -V X1 is applied in each OFF state, and the display data value 0 represents OFF and 1 ON. In this case, the number of mismatches is always 1 or 3 by appropriately changing the ON/OFF state of the virtual row electrode.
  • the display shown in Fig. 2 is achieved by the waveforms in Fig. 7 applying the above principle.
  • the selected pulses applied to row electrodes X 1 , X 2 , X 3 and virtual row electrode X n+1 are ON, ON, OFF, ON, respectively
  • the display data for the pixels at the intersections of column electrode Y 1 and row electrodes X 1 , X 2 , X 3 and virtual row electrode X n+1 are (00), (01), (10), (11), and the high bits represent OFF, OFF, ON, ON.
  • Sequential comparison shows the number of mismatches is three; conversion data S2 is therefore generated according to this number of mismatches, and voltage V Y2 is therefore applied to the column electrode Y 1 in interval a.
  • the low bits represent OFF, ON, OFF, ON, and the number of mismatches if compared with the row select pattern is one; conversion data S2 is therefore generated according to this number of mismatches, and voltage -V Y1 is therefore applied in period b.
  • the display data for the pixels on the row electrodes X 1 , X 2 , X 3 and virtual electrode X n+1 i.e. the display data pattern
  • the selected pulses applied to the row electrodes i.e. the row select pattern
  • a column voltage corresponding to the number of mismatches is applied.
  • row electrodes X 4 , X 5 , X 6 and virtual row electrode X n+2 are simultaneously selected and the corresponding column electrode waveforms are applied to the column electrodes.
  • the operation returns to the first group of row electrodes X 1 , X 2 , and X 3 and sequential scanning using the row select pattern shown in t 2 continues.
  • One frame period is completed by scanning four times with the row select patterns shown in t 1 , t 2 , t 3 , and t 4 , and the same operation is repeated in the next frame.
  • the number of voltage levels applied to the column electrodes can be made less than that of the first embodiment.
  • the same drive circuit as that used in the first embodiment can be used in the present embodiment and each of the embodiments described below.
  • the arithmetic operation circuit 4 in Fig. 4 is adapted to execute data processing according to each of the embodiments, the voltage levels of the row electrode driver in Fig. 5 and the column electrode driver in Fig. 6 are provided according to each embodiment, and one of the voltage levels is selected by analog switches 15, 25.
  • the arithmetic operation circuit 4 in Fig. 4 and the row electrode driver in Fig. 5 are the same as those of the first embodiment, but while eight voltage levels V Y4 , V Y3 , V Y2 , V Y1 , -V Y1 , -V Y2 , -V Y3 , and -V Y4 are provided in the column electrode driver of the first embodiment in Fig. 6, it is sufficient to provide four voltage levels V Y2 , V Y1 , -V Y1 , and -V Y2 in the present embodiment.
  • the above embodiment achieves a gray scale display by changing the voltage value according to the display data, but a gray scale display can also be achieved by changing the pulse width.
  • Fig. 9 is an applied voltage waveform diagram of an embodiment achieving a gray scale display by changing the pulse width.
  • the period ⁇ t of each pulse is divided into f subperiods of unequal duration to achieve a gray scale display by means of pulse width modulation.
  • d 1 (d 1.f , d 1,f-1 ,..., d 1.1 )
  • d 2 (d 2.f , d 2,f-1 ,..., d 2,1 )
  • d h (d h,f , d h,f-1 ,..., d h,1 ) ...
  • the row select pattern and the display data pattern are then compared bit by bit, separately for each bit position of the display data, at an interval of ⁇ t g .
  • the low or least significant bits (d 1,1 , d 2.1 ,%) of the display data pattern (d 1 , d 2 ,%) and the bits of the row select pattern are first compared and column voltage waveforms corresponding to the result is applied for display for subperiod ⁇ t 1 .
  • next to least significant bits d 1,2 , d 2.2 ,... and the row select pattern are then compared and corresponding column voltage waveforms applied for subperiod ⁇ t 2 .
  • Fig. 9 based on the present embodiment achieves a four gradation gray scale display as shown in Fig. 2 using pulse width modulation as described above.
  • the row voltage waveforms applied to the row electrodes X 1 to X n are the same as in the prior art example illustrated in Fig. 21, and the pulse widths of the column voltage waveforms applied to the corresponding column electrodes Y 1 to Y m are modulated according to the gray scale display as above.
  • each pulse width ⁇ t is divided into three equal parts, and a gray scale display with four gradations 0 to 3 is expressed using the 2-bit binary display data expressions ( ⁇ ), (01), (10), (11).
  • the signal voltage level of two of the three pulse width parts is determined based on the number of mismatches between the ON/OFF state of the simultaneously selected row electrodes and the high bit states of the display data pattern.
  • the signal voltage level of the remaining one part is determined based on the number of mismatches between the ON/OFF state of the row electrodes and the low bit states. Variations in the brightness of the gray scale display can be corrected by equally reducing the three parts.
  • the voltage for the high bit is applied during the latter two of the three pulse width parts, and the voltage for the low bit is applied during the first of the three pulse width parts.
  • the selection period can also be divided into plural separate selection subperiods each frame as described in the first embodiment above to drive a gray scale display.
  • FIG. 11 An example of such application is shown in Fig. 11.
  • the voltage waveforms of eight row select patterns (blocks) applied to the row electrodes and column electrodes in the embodiment shown in Fig. 9 are divided into eight equal selection subperiods one for each row select pattern.
  • the contrast can be improved as in the previous embodiment.
  • the four voltage levels V Y2 , V Y1 , -V Y1 , and -V Y2 are used as the column electrode voltage levels in the third and fourth embodiments above, but this number of voltage levels can be further reduced by providing virtual row electrodes as in the second embodiment.
  • Fig. 12 shows an example that makes use of the virtual electrodes of the third embodiment to reduce the number of voltage levels applied to a column electrode, and is driven by dividing the selection period in to plural separate selection subperiods within each frame as in the fourth embodiment.
  • e column electrodes are operated as virtual row electrodes (virtual lines).
  • virtual row electrodes virtual lines.
  • V column has h + 1 levels.
  • Original voltage level Original number of mismatches
  • Virtual row electrode Number of mismatches after correction Voltage level after correction -V Y2 0 Match 0 V a -V Y1 1 Mismatch 2 V b V Y1 2 Match 2 V b V Y2 3 Mismatch 4 V d
  • the original four voltage levels can be reduced to three. If the number of mismatches is controlled to be odd, the number of mismatches after correction will change in the above table to 1, 1, 3, 3 (from the top), and there will be only two voltage levels (Va, Va, Vb, Vb from the top) after correction.
  • the original number of voltage levels can thus be reduced from five to three. Note that the voltage levels can also be set by controlling the number of mismatches to be odd.
  • the virtual row electrodes can be provided in an area not affecting the display.
  • the virtual row electrodes X n+1 are provided outside the display area R as defined in Fig. 13.
  • any extra row electrodes outside the normal display area R can also be used as virtual row electrodes.
  • the number of voltage levels can be further reduced by increasing the number e of virtual row electrodes.
  • the present embodiment as shown in Fig. 12 simultaneously selects three row electrodes and one virtual electrode to reduce the number of voltage levels applied to the column electrodes, and drives by dividing the selection period into plural separate subperiods in each frame.
  • the present embodiment divides the selection period into four separate subperiods a frame, and the number of mismatches between the row select pattern and the display data pattern is counted bit by bit for four row electrodes, including the virtual row electrode, in each of the four subperiods to adjust the number of mismatches to an odd number.
  • the number of mismatches is thus either 1 or 3, and the voltage level of the column voltage waveform is therefore one of two levels, V Y1 or -V Y1 .
  • the virtual row electrode X n+1 even though shown outside of the display area R, is part of the first group of simultaneously selected row electrodes including the first three selected row electrodes X 1 , X 2 , and X 3 and the virtual row electrode X n+1 as shown in Fig. 8. Again, it is not essential for the virtual row electrode to be actually existent, but when it exists, it is preferably provided outside the display area R.
  • each of the selection subperiods ⁇ t is subdivided into three intervals, and the display data for the pixels on the simultaneously selected row electrodes X 1 , X 2 , and X 3 is (00), (01), (10) as shown in Fig. 13, then the display data for the virtual row electrode is (11) as shown in Fig. 8.
  • the number of mismatches between the row select pattern and the display data pattern is then counted separately for each bit position (high and low in case of 2-bit display data) to determine either voltage level V Y1 or -V Y1 , and the voltages for the high bits are applied for the latter two of the three intervals and the voltage for the low bit is applied for the first one interval. Note that, as in the third embodiment, it is also possible to apply the voltages for the high bits in the first two intervals and to apply the voltages for the low bits in the last one interval.
  • the present embodiment can reduce the number of voltage levels applied to the column electrodes, specifically to two in the above embodiment, by always setting the number of mismatches between the display data pattern and the row select pattern to 1, 3, or some other odd number. Note that an even number of mismatches can be alternatively used.
  • a display with a larger number of gradations is also possible.
  • eight gradations can be achieved by using 3-bit display data and subdividing each selection period or subperiod into three intervals the width of each weighted according to the position of a corresponding one of the display data bits.
  • a display with 16 gradations can be achieved by using 4-bit display data and subdividing each selection period or subperiod into four correspondingly weighted intervals.
  • different numbers of gradations of a gray scale display are possible by adapting the number of intervals each selection period or subperiod is subdivided into.
  • the above described fifth embodiment employs the type of voltage waveforms shown in Fig. 22 (bl.
  • providing virtual row electrodes as in the fifth embodiment above to reduce the number of voltage levels applied to the column electrodes while also using pulse width modulation to achieve a gray scale display can also be applied to the case wherein the same type of row voltage waveforms as in the first embodiment is applied to the simultaneously selected row electrodes, and an example of this is shown in Fig. 14.
  • the voltage waveforms applied to the simultaneously selected row electrodes are the same as that of the first embodiment shown in Fig. 1, and each of the selection subperiods t 1 to t 4 , t 5 to t 8 is subdivided into three intervals.
  • the display data for the pixels on the simultaneously selected row electrodes X 1 , X 2 , and X 3 are (00), (01), (10) as shown in Fig. 13, the data of the virtual row electrode may be (11) as shown in Fig. 8.
  • V Y1 or -V Y1 is applied as the voltage for the high bits in two of the three intervals and the voltage for the low bits in one interval.
  • selection subperiods t 1 to t 4 may be provided consecutively (forming one continuous selection period) or separately in each frame F. The same is true of selection subperiods t 5 to t 8 .
  • a gray scale display by means of a so-called frame rate control modulation is performed in addition to dividing the selection period and reducing the number of applied voltage levels as described above
  • Fig. 15 shows an embodiment wherein the number of voltage levels applied to the column electrodes is reduced using three sequential row electrodes and one virtual row electrode similarly to the sixth embodiment, the selection period is divided into plural separate subperiods each frame, and a gray scale display is achieved by means of frame rate control modulation.
  • waveforms shown in Fig. 3 (b) are used as the voltage waveforms applied to the simultaneously selected row electrodes in this embodiment, the waveforms shown in Fig. 3 (a) or Fig. 22 (a) or (b) can also be used.
  • a gray scale display based on frame rate control modulation turns pixels ON in some frames and OFF in other frames during any given picture period, and in the example shown in Fig. 16, a gradation between on and off is displayed by applying an ON voltage during one frame F1 and an OFF voltage during another frame F2 assuming a picture period comprising two frames.
  • the brightness difference between frames F1 and F2 is reduced and flicker becomes less noticeable because the selection period is divided into four separate subperiods each frame.
  • the position of the selection pulses i.e. the row select pattern
  • the position of the selection pulses can be changed within the plural frames, and the difference between frames can be reduced by interchanging the row select patterns of subperiods t 3 and t 7 , for example, in Fig. 15.
  • a picture period may be defined to have a block of more frames, for example 7 (15) frames, to achieve 8 (16) gradations by changing the number of ON and OFF frames within the block.
  • a display with the desired number of gradations is possible depending on the number of frames of one block.
  • a gray scale display by means of frame rate control modulation is also possible in addition to dividing the selection period into separate subperiods and reducing the number of applied voltage levels as in the fifth embodiment above, and Fig. 17 shows an embodiment in which the number of voltage levels applied to the column electrodes is reduced using three sequential row electrodes and one virtual row electrode similarly to the fifth embodiment the selection period is divided into plural subperiods each frame, and a gray scale display is achieved by means of frame rate control modulation in combination with pulse width control.
  • Display flicker can be reduced and a multiple gray scale display can be achieved by thus dividing the selection period and reducing the number of applied voltage levels, and combining pulse width modulation with frame rate control modulation for the gray scale display. Note also that the order of the row select patterns can be changed as in the sixth embodiment above.
  • a gray scale display can still be achieved by means of frame rate control modulation or by a combination of frame rate control modulation and pulse width modulation even when no virtual row electrode is used.

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Liquid Crystal (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Claims (6)

  1. Procédé pour attaquer par multiplexage un dispositif électro-optique à cristal liquide du type matriciel comportant une couche à cristaux liquides disposée entre un premier substrat portant des électrodes (X1, X2, ...) de rangées et un second substrat portant des électrodes (Y1, Y2, ...) de colonnes, les électrodes de rangées et de colonnes définissant une matrice de pixels, le procédé comportant les étapes qui consistent à :
    diviser des électrodes de rangées en des groupes (X1, X2, X3 ; X4, X5, X6 ; X1, X2, X3, Xn+1 ; X4, X5, X6, Xn+2),
    simultanément sélectionner, pendant une période de sélection, les électrodes de rangées d'un groupe en appliquant une forme d'onde de tension de rangée respective à chacune d'entre elles tout en appliquant une tension de non-sélection aux électrodes de rangées de tous les autres groupes, et sélectionner en séquence chaque groupe, les formes d'ondes de tension de rangées étant constituées d'une pluralité d'impulsions de sélection de rangées définissant une pluralité correspondante de configurations de sélection de rangées, et
    appliquer une tension de colonne respective à chaque électrode de colonne, à savoir la tension de colonne déterminée en réponse à chaque configuration de sélection de rangées et données d'affichage,
       caractérisé en ce que:
    la période de sélection est divisée en plusieurs sous-périodes (t1 à t8) et, lorsqu'une trame est définie comme la période de temps égale à la période de sélection fois le nombre de groupes d'électrodes de rangées, et qu'une période d'images comprend un certain nombre de trames, les tensions de colonne sont modulées pendant la période d'images de manière à obtenir un affichage à échelle de gris.
  2. Procédé suivant la revendication 1, dans lequel les sous-périodes (t1 à t8) de chaque période de sélection forment une période continue.
  3. Procédé suivant la revendication 1, dans lequel les sous-périodes sont séparées dans le temps de sorte que, lorsque des groupes d'électrodes de rangées (X1,X2,X3;X4,X5,X6;X1,X2,X3,Xn+1;X4,X5,X6,Xn+2) sont sélectionnées en séquence, chacun des groupes est sélectionné pour la durée d'une sous-période, ceci étant répété pour chacune des autres sous-périodes.
  4. Procédé suivant l'une quelconque des revendications précédentes, dans lequel chaque groupe d'électrodes (X1,X2, ...) de rangées sélectionnées simultanément comporte au moins une électrode (Xn+1) de rangées virtuelle et l'état d'affichage de pixels imaginaires correspondants à l'électrode de rangées virtuelle est réglé conformément à la configuration de sélection de rangées et aux données d'affichage correspondant aux électrodes de rangées réelles de manière à réduire le nombre de niveaux de tension de colonnes nécessités.
  5. Procédé suivant l'une quelconque des revendications précédentes, dans lequel l'ordre des configurations de sélection de rangées est modifié parmi les groupes à l'intérieur de chaque trame ou est modifié parmi les trames.
  6. Procédé suivant l'une quelconque des revendications précédentes, dans lequel la polarité des tensions appliquée aux électrodes (X1,X2,...) de rangées et aux électrodes (Y1,Y2, ...) de colonnes est inversée chaque trame ou à l'intérieur de chaque trame.
EP97120078A 1992-05-08 1993-05-10 Méthode de commande multiplexée pour un dispositif électrooptique à cristaux liquides du type matriciel Expired - Lifetime EP0836173B1 (fr)

Applications Claiming Priority (10)

Application Number Priority Date Filing Date Title
JP14348292 1992-05-08
JP143482/92 1992-05-08
JP14348292 1992-05-08
JP12362392 1992-05-15
JP12362392 1992-05-15
JP123623/92 1992-05-15
JP19907792 1992-07-02
JP19907792 1992-07-02
JP199077/92 1992-07-02
EP93911979A EP0598913B1 (fr) 1992-05-08 1993-05-10 Procede et circuit d'attaque pour un dispositif a cristaux liquides, et dispositif d'affichage

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EP0836173A2 EP0836173A2 (fr) 1998-04-15
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EP93911979A Expired - Lifetime EP0598913B1 (fr) 1992-05-08 1993-05-10 Procede et circuit d'attaque pour un dispositif a cristaux liquides, et dispositif d'affichage

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JP (2) JP3508115B2 (fr)
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KR100344861B1 (ko) * 1994-08-23 2002-11-23 아사히 가라스 가부시키가이샤 액정 디스플레이 장치의 구동 방법
JP2796619B2 (ja) * 1994-12-27 1998-09-10 セイコーインスツルメンツ株式会社 液晶表示パネルの階調駆動装置
KR100337865B1 (ko) * 1995-09-05 2002-12-16 삼성에스디아이 주식회사 액정 표시 소자의 구동방법
FR2784489B1 (fr) 1998-10-13 2000-11-24 Thomson Multimedia Sa Procede d'affichage de donnees sur un afficheur matriciel
WO2000055837A1 (fr) 1999-03-15 2000-09-21 Seiko Epson Corporation Affichage a cristaux liquides et procede d'actionnement de celui-ci
US7209129B2 (en) 2001-06-13 2007-04-24 Kawasaki Microelectronics, Inc. Method and apparatus for driving passive matrix liquid crystal
JP3642328B2 (ja) * 2001-12-05 2005-04-27 セイコーエプソン株式会社 電気光学装置、その駆動回路、駆動方法及び電子機器
EP1365384A1 (fr) * 2002-05-23 2003-11-26 STMicroelectronics S.r.l. Procédé de commande pour dispositifs d'affichage à écran plat
JP2004287118A (ja) 2003-03-24 2004-10-14 Hitachi Ltd 表示装置
EP1471496A1 (fr) * 2003-04-23 2004-10-27 STMicroelectronics S.r.l. Méthode de commande d'un dispositif d'affichage à cristaux liquides
EP1636784A1 (fr) * 2003-06-12 2006-03-22 Koninklijke Philips Electronics N.V. Dispositif d'affichage a matrice passive, a faible consommation d'energie, et son procede de commande
JP4945119B2 (ja) * 2005-11-16 2012-06-06 株式会社ブリヂストン 情報表示用パネルの駆動方法
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EP0836173A3 (fr) 1999-04-07
JP3508115B2 (ja) 2004-03-22
EP0598913B1 (fr) 1999-10-13
EP0836173A2 (fr) 1998-04-15
DE69331812D1 (de) 2002-05-16
DE69331812T2 (de) 2002-11-14
JP2000347163A (ja) 2000-12-15
WO1993023844A1 (fr) 1993-11-25
JP3391334B2 (ja) 2003-03-31
DE69326740T2 (de) 2000-04-06
TW280874B (fr) 1996-07-11
DE69326740D1 (de) 1999-11-18
EP0598913A4 (fr) 1994-10-26
EP0598913A1 (fr) 1994-06-01

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