EP0683920B2 - Flacher bildschirm mit innerer tragstruktur - Google Patents
Flacher bildschirm mit innerer tragstruktur Download PDFInfo
- Publication number
- EP0683920B2 EP0683920B2 EP94908603A EP94908603A EP0683920B2 EP 0683920 B2 EP0683920 B2 EP 0683920B2 EP 94908603 A EP94908603 A EP 94908603A EP 94908603 A EP94908603 A EP 94908603A EP 0683920 B2 EP0683920 B2 EP 0683920B2
- Authority
- EP
- European Patent Office
- Prior art keywords
- spacer
- coating
- side surfaces
- backplate
- faceplate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J61/00—Gas-discharge or vapour-discharge lamps
- H01J61/02—Details
- H01J61/30—Vessels; Containers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J29/00—Details of cathode-ray tubes or of electron-beam tubes of the types covered by group H01J31/00
- H01J29/02—Electrodes; Screens; Mounting, supporting, spacing or insulating thereof
- H01J29/028—Mounting or supporting arrangements for flat panel cathode ray tubes, e.g. spacers particularly relating to electrodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J29/00—Details of cathode-ray tubes or of electron-beam tubes of the types covered by group H01J31/00
- H01J29/02—Electrodes; Screens; Mounting, supporting, spacing or insulating thereof
- H01J29/08—Electrodes intimately associated with a screen on or from which an image or pattern is formed, picked-up, converted or stored, e.g. backing-plates for storage tubes or collecting secondary electrons
- H01J29/085—Anode plates, e.g. for screens of flat panel displays
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J29/00—Details of cathode-ray tubes or of electron-beam tubes of the types covered by group H01J31/00
- H01J29/02—Electrodes; Screens; Mounting, supporting, spacing or insulating thereof
- H01J29/10—Screens on or from which an image or pattern is formed, picked up, converted or stored
- H01J29/18—Luminescent screens
- H01J29/30—Luminescent screens with luminescent material discontinuously arranged, e.g. in dots, in lines
- H01J29/32—Luminescent screens with luminescent material discontinuously arranged, e.g. in dots, in lines with adjacent dots or lines of different luminescent material, e.g. for colour television
- H01J29/327—Black matrix materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J29/00—Details of cathode-ray tubes or of electron-beam tubes of the types covered by group H01J31/00
- H01J29/46—Arrangements of electrodes and associated parts for generating or controlling the ray or beam, e.g. electron-optical arrangement
- H01J29/467—Control electrodes for flat display tubes, e.g. of the type covered by group H01J31/123
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J29/00—Details of cathode-ray tubes or of electron-beam tubes of the types covered by group H01J31/00
- H01J29/86—Vessels; Containers; Vacuum locks
- H01J29/864—Spacers between faceplate and backplate of flat panel cathode ray tubes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J31/00—Cathode ray tubes; Electron beam tubes
- H01J31/08—Cathode ray tubes; Electron beam tubes having a screen on or from which an image or pattern is formed, picked up, converted, or stored
- H01J31/10—Image or pattern display tubes, i.e. having electrical input and optical output; Flying-spot tubes for scanning purposes
- H01J31/12—Image or pattern display tubes, i.e. having electrical input and optical output; Flying-spot tubes for scanning purposes with luminescent screen
- H01J31/123—Flat display tubes
- H01J31/125—Flat display tubes provided with control means permitting the electron beam to reach selected parts of the screen, e.g. digital selection
- H01J31/127—Flat display tubes provided with control means permitting the electron beam to reach selected parts of the screen, e.g. digital selection using large area or array sources, i.e. essentially a source for each pixel group
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J9/00—Apparatus or processes specially adapted for the manufacture, installation, removal, maintenance of electric discharge tubes, discharge lamps, or parts thereof; Recovery of material from discharge tubes or lamps
- H01J9/02—Manufacture of electrodes or electrode systems
- H01J9/18—Assembling together the component parts of electrode systems
- H01J9/185—Assembling together the component parts of electrode systems of flat panel display devices, e.g. by using spacers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J9/00—Apparatus or processes specially adapted for the manufacture, installation, removal, maintenance of electric discharge tubes, discharge lamps, or parts thereof; Recovery of material from discharge tubes or lamps
- H01J9/24—Manufacture or joining of vessels, leading-in conductors or bases
- H01J9/241—Manufacture or joining of vessels, leading-in conductors or bases the vessel being for a flat panel display
- H01J9/242—Spacers between faceplate and backplate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J2329/00—Electron emission display panels, e.g. field emission display panels
- H01J2329/02—Electrodes other than control electrodes
- H01J2329/08—Anode electrodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J2329/00—Electron emission display panels, e.g. field emission display panels
- H01J2329/18—Luminescent screens
- H01J2329/32—Means associated with discontinuous arrangements of the luminescent material
- H01J2329/323—Black matrix
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J2329/00—Electron emission display panels, e.g. field emission display panels
- H01J2329/86—Vessels
- H01J2329/8625—Spacing members
- H01J2329/864—Spacing members characterised by the material
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J2329/00—Electron emission display panels, e.g. field emission display panels
- H01J2329/86—Vessels
- H01J2329/8625—Spacing members
- H01J2329/8645—Spacing members with coatings on the lateral surfaces thereof
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J2329/00—Electron emission display panels, e.g. field emission display panels
- H01J2329/86—Vessels
- H01J2329/8625—Spacing members
- H01J2329/865—Connection of the spacing members to the substrates or electrodes
- H01J2329/8655—Conductive or resistive layers
Definitions
- This invention relates to flat panel devices such as flat cathode ray tube (CRT) displays. This invention also relates to techniques used in fabricating flat panel devices:
- U.S. Patent 4,451,759 discloses a flat panel CRT display in which a group of spacers are situated between a pair of glass plates. Each spacer consists of (a) a hollow cylinder integral with, and protruding from the interior surface of, one of the plates and (b) a cylindrical pin integral with, and protruding from the interior surface of, the other plate. The pins are respectively inserted into the hollow cylinders to form the spacers.
- U. S. Patent 4,451,759 mentions that a resistive coating can be provided on at least one of the pins and cylinders.
- European Patent Publication 523,702 Al discloses a flat panel CRT display In which a face plate and a rear plate are separated by at least one spacer wall configured to avoid electrification (charging) of the outer wall surfaces.
- Each spacer wall typically consists of a main glass wall and an electroconductive film situated over both side surfaces of the main wall so as to contact the rear plate or electroconductive material situated over the rear plate.
- the electroconductive film of each spacer wall extends over the main wall's end surface adjacent to the rear plate.
- the electroconductive film of each spacer is furnished with an electrical potential no greater than the potential supplied to electron-emissive elements formed over the rear plate.
- European Patent Application EP 0,580,244 A discloses a flat-panel type picture display device comprising the features as defined in the preamble of claim 1.
- flat CRT display also known as a "flat panel display”
- plasma displays have also been developed.
- a faceplate, a backplate, and connecting walls around the periphery of the faceplate and backplate form an enclosure.
- the interior surface of the faceplate is coated with light emissive elements such as phosphor or phosphor pattems which define the active region of the display.
- the light emissive elements are caused to emit light, e.g., cathodic elements located adjacent the backplate are excited to release electrons which are accelerated toward the phosphoron the faceplate, causing the phosphor to emit light which is seen by a viewer at the exterior surface of the faceplate (the "viewing surface").
- the electron-emissive elements are selectively excited to cause certain of the elements to emit electrons that move towards phosphors on the faceplate. These phosphors, upon being struck by the impinging electrons, emit light that is visible at the exterior surface of the faceplate.
- the faceplate and backplate are particularty susceptible to this type of mechanical failure due to their high aspect ratio.
- “aspect ratio” is defined as either the width, i.e., distance between the interior surfaces of opposing connecting walls, or the height, I. e., distance between the interior surface of the faceplate and the interior surface of the backplate, divided by the thickness.
- the faceplate or backplate of a flat panel display may also fall due to external forces resulting from impacts sustained by the flat panel display.
- spacers have been used to internally support the faceplate and/or backplate. Previous spacers have been walls or posts located between pixels (phosphor regions that define the smallest individual picture element of the display) in the active region of the display.
- the presence of the spacers may adversely affect the flow of electrons toward the faceplate in the vicinity of the spacer.
- stray electrons may electrostatically charge the surface of the spacer, changing the voltage distribution near the spacer from the desired distribution and resulting in distortion of the electron flow, thereby causing distortions in the image produced by the display.
- a flat panel device includes a spacer for providing internal support of the device.
- the spacer prevents the device from collapsing as a result of stresses arising from the differential pressure between the internal vacuum pressure (i.e., any pressure less than atmospheric pressure) and the external atmospheric pressure.
- the spacer also internally supports the device against stresses arising from external impact forces.
- surfaces of the spacer within the enclosure are treated to prevent or minimize charge buildup on thespacersurfaces. Consequently, the presence of the spacer does not adversely affect the flow of electrons near the spacer, so that the image produced by the device is not distorted.
- a coating is formed on spacer surfaces, the coating being a material having a secondary emission ratio ⁇ less than 4 and a sheet resistance between 10 9 and 10 14 ohms/ ⁇
- the coating is selected from a group of materials including chromium oxide, copper oxide, carbon, titanium oxide and vanadium oxide.
- a first coating is formed on spacer surfaces.
- a second coating is formed over the first coating.
- the first coating is a material having a sheet resistance between 10 9 and 10 14 ohms/ ⁇ .
- the second coating is a material having a secondary emission ratio ⁇ less than 4.
- spacer surfaces are first surface-doped to produce a sheet resistance between 10 9 and 10 14 ohms/ ⁇ , then a coating is formed over the doped spacer surfaces, the coating being a material having a secondary emission ratio ⁇ less than 4.
- the coating is selected from a group of materials including chromium oxide, copper oxide, carbon, titanium oxide and vanadium oxide.
- spacer surfaces are surface-doped to produce a sheet resistance between 10 9 and 10 14 ohms/ ⁇
- the spacer can be made of, for instance, ceramic and can be a spacer wall, a spacer structure, or some combination of a spacer wall, spacer walls, and spacer structure.
- the flat panel device also contains a mechanism to emit light.
- the flat panel device can include a field emitter cathode or a thermionic cathode.
- one or more electrodes are formed on the treated spacer surfaces.
- an electrode can be formed near an interface of the spacer and backplate, the voltage of the electrode being controlled to achieve a desired voltage distribution in the vicinity of the interface, thereby deflecting the flow of electrons as desired to correct for distortions resulting from imperfections in the surface treatment or misalignment of the spacer.
- this electrode can be formed with a serpentine path with respect to an interior surface of the backplate in order to achieve a desired voltage distribution.
- a voltage divider establishes the voltage of each electrode.
- the voltage divider is a resistive coating formed on the spacer surfaces. The sheet resistance of the coating must be closely controlled to achieve accurate voltages on the electrodes.
- edge metallization a strip of electrically conductive material
- the edge metallization is electrically connected to the resistive coating.
- the edge metallization and the resistive coating are formed such that an interface between the edge metallization and the resistive coating is at a constant distance from an interior surface of the backplate.
- edge metallization is formed between an edge surface of the spacer and the faceplate to establish good electrical connection between the faceplate and spacer.
- a flat panel device is assembled by mounting a spacer between a backplate and faceplate, treating surfaces of the spacer to prevent or minimize charge buildup on the spacer surfaces, coating an edge surface of the spacer with edge metallization such that the edge metallization forms an electrical connection between the spacer and backplate, and sealing the backplate and faceplate together to encase the spacer in an enclosure.
- the surfaces can be treated by forming a resistive coating orcoatings, by surface doping, by surface doping and forming a resistive coating or coatings, or by firing to reduce the surface.
- CTR cathode ray tube
- the invention is also applicable to other flat panel displays such as plasma displays or vacuum fluorescent displays.
- the invention is not limited to use with displays, but can be used with other flat panel devices used for other purposes such as optical signal processing, optical addressing for use in controlling other devices such as, for instance, phased array radar devices, or scanning of an image to be reproduced on another medium such as in copiers or printers.
- the invention is applicable to flat panel devices having non-rectangular screen shapes, e.g., circular, and irregular screen shapes such as might be used in a vehicle dashboard or an aircraft control panel.
- a flat panel display is a display in which the faceplate and backplate are substantially parallel, and the thickness of the display is small compared to the thickness of a conventional deflected-beam CRT display, the thickness of the display being measured in a direction substantially perpendicular to the faceplate and backplate.
- the thickness of a flat panel display is less than 2 inches (5.08 cm).
- the thickness of a flat panel display is substantially less than 2 inches, e.g., 0.25 - 1.0 inches (0.64 - 2.54 cm).
- spacer is used to describe generally any structure used as an internal support within a flat panel display.
- specific embodiments of spacers according to the invention are described as a “spacer wall” or “spacer walls,” or as a “spacer structure.”
- Spacer subsumes “spacer wall,” “spacer walls,” and “spacer structure,” as well as any other structure performing the above-described function of a spacer.
- spacer walls and spacer structures in embodiments of the invention described below are made of a thin material which is readily workable in an untreated state and becomes stiff and strong after a prescribed treatment. The material must also be compatible with use in a vacuum environment. Further, the spacer walls and spacer structures are made of a material having a coefficient of thermal expansion that closely matches the coefficients of thermal expansion of the faceplate and backplate. Matching the coefficients of thermal expansion means that the spacer walls, faceplate and backplate expand and contract approximately the same amount during heating and cooling that occurs when the flat panel display is assembled or operated. Consequently, proper alignment is maintained among the spacer walls, faceplate and backplate.
- spacer walls are made of a ceramic or glass-ceramic material.
- spacer walls are formed from ceramic tape.
- ceramic or glass-ceramic tapes are the materials used for the spacer walls or spacer structures.
- ceramic is often used, in the context of ceramic tape or ceramic layer or ceramic sheet.
- the term is intended to refer to any of a known family of glass-ceramic tapes, devitrifying glass tapes, ceramic glass tapes, ceramic tapes or other tapes which have plastic binders and ceramic or glass particles and which are flexible and workable in the unfired state, curable to a hard and rigid layer on firing, as well as other materials equivalent thereto, which are initially flexible and may be processed to a final hard and rigid state.
- Spacer walls are formed and assembled into a flat panel display as follows. Strips, having a length and width chosen according to the particular requirements of the flat panel display are cut from a sheet of unfired ceramic tape. An advantage of using an unfired ceramic or glass-ceramic is that the strips can be easily fabricated by slitting or die-cutting. The strips are then fired. The fired strips (spacer walls) are placed at appropriate pre-determined locations with respect to the faceplate and backplate. During assembly, the spacer walls are held in place so that they are property aligned with respect to the faceplate and backplate.
- the strips for the spacer walls can also be fabricated by first making and firing sheets of ceramic or glass-ceramic.
- the fired sheets can then be coated (as explained in more detail below) and cut into strips that form the spacer walls.
- the fired sheets can be cut into strips and then coated.
- FIG 1A illustrates part of a flat-panel color CRT display that employs an area field-emission cathode in combination with a raised black matrix.
- the CRT display in Figure 1A contains transparent electrically insulating flat faceplate 302 and electrically insulating flat backplate 303.
- the internal surfaces of plates 302 and 303 face each other and are typically 0.01 - 2.5 mm apart.
- Faceplate 302 consists of glass typically having a thickness of 1 mm.
- Backplate 303 consists of glass, ceramic, or silicon typically having a thickness of 1 mm.
- a group of laterally separated electrically insulating spacer walls 308 are situated between plates 302 and 303. Spacer walls 308 extend parallel to one another at a uniform spacing. Walls 308 extend perpendicular to plates 302 and 303. Each wall 308 consists of ceramic typically having a thickness of 80 - 90 ⁇ m. The center-to-center spacing of walls 308 is typically 8 - 25 mm. As discussed further below, walls 308 constitute internal supports for maintaining the spacing between plates 302 and 303 at a substantially uniform value across the entire active area of the display.
- Patterned area field-emission cathode structure 305 is situated between backplate 303 and spacer walls 308.
- Figure 1B depicts the layout of field-emission cathode structure 305 as viewed in the direction, and from the positions, represented by arrows C in Figure 1A.
- Cathode structure 305 consists of a large group of electron-emissive elements 309, a patterned metallic emitter electrode (sometimes referred to as base electrode) divided into a group of substantially identical straight lines 310, a metallic gate electrode divided into a group of substantially identical straight lines 311, and an electrically insulating layer 312.
- Emitter-electrode lines 310 are situated on the interior surface of backplate 303 and extend parallel to one another at a uniform spacing.
- the center-to-center spacing of emitter lines 310 is typically 315 - 320 ⁇ m.
- Lines 310 are typically formed of molybdenum or chromium having a thickness of 0.5 ⁇ m.
- Each line 310 typically has a width of 100 ⁇ m.
- Insulating layer 312 lies on lines 310 and on laterally adjoining portions of backplate 303. Insulating layer 312 typically consists of silicon dioxide having a thickness of 1 ⁇ m.
- Gate-electrode lines 311 are situated on insulating layer 312 and extend parallel to one another at a uniform spacing. The center-to-center spacing of gate lines 311 is typically 105 - 110 ⁇ m. Gate lines 311 also extend perpendicularto emitter lines 310. Gate lines 311 are typically formed with a titanium-molybdenum composite having a thickness of 0.02 - 0.5 ⁇ m. Each line 311 typically has a width of 30 ⁇ m.
- Electron-emissive elements 309 are distributed above the interior surface of backplate 303 in an array of laterally separated multi-element sets.
- each set of electron-emissive elements 309 is located above the interior surface of backplate 303 in part or all of the projected area where one of gate lines 311 crosses one of emitter lines 310.
- Spacer walls 308 extend towards areas between the sets of electron-emissive elements 309 and also between emitter lines 310.
- Each electron-emissive element 309 is a field emitter that extends through an aperture (not shown) in insulating layer 310 to contact an underlying one of emitter lines 310.
- the top (or upper end) of each field emitter 309 is exposed through a corresponding opening (not shown) in an overlying one of gate lines 311.
- Field emitters 309 can have various shapes such as needle-like filaments or cones.
- the shapes of field emitters 309 is not particularly material here as long as they have good electron-emission characteristics.
- Emitters 309 can be manufactured according to various processes.
- a light-emitting structure which contains a black matrix is situated between faceplate 302 and spacer walls 308.
- the light-emitting structure consists of a group of light-emissive regions 313, a pattern of substantially identical dark ridges 314 that reflect substantially no light, and light-reflective layer 315.
- Figure 1C depicts the layout of the light-emitting structure as viewed in the direction, and from the positions, represented by arrows D in Figure 1A.
- Light-emissive regions 313 and dark ridges 314 are both situated on the interior surface of faceplate 302. Light-emissive regions 313 are located in spaces between dark ridges 314 (or vice versa). When regions 313 and ridges 314 are struck by electrons emitted from electron-emissive elements 309, light-emissive regions 313 produce light of various colors. Dark ridges 314 are substantially non-emissive of light relative to light-emissive regions 313 and thereby form a black matrix for regions 313.
- light-emissive regions 313 consist of phosphors configured in straight equal-width stripes extending parallel to one another at a uniform spacing in the same direction as gate lines 311.
- Each phosphor stripe 313 typically has a width of 80 ⁇ m.
- the thickness (or height) of phosphor stripes 313 is 1 - 30 ⁇ m, typically 25 ⁇ m.
- Phosphor stripes 313 are divided into a plurality of substantially identical stripes 313rthat emit red (R) light, a like plurality of substantially identical stripes 313g that emit green (G) light, and another like plurality of substantially identical stripes 313b (B) that emit blue light.
- Phosphor stripes 313r, 313g, and313b are repeated at every third stripe 313 as indicated in Figure 1A.
- Each phosphor stripe 313 is situated across from a corresponding one of gate lines 311. Consequently, the center-to-center spacing of stripes 313 is the same as that of gate lines 311.
- Dark ridges 314 similarly extend parallel to one another at a uniform spacing in the same direction as gate lines 311.
- the center-to-center spacing of ridges 314 is likewise the same as that of lines 311.
- the ratio of the average height of each dark ridge 314 to its average width is in the range of 0.5 - 3, typically 2.
- the average width of ridges 314 is 10 - 50 ⁇ m, typically 25 ⁇ m.
- the average height of ridges 314 is 20 - 60 ⁇ m, typically 50 ⁇ m.
- the average height of dark ridges 314 exceeds the thickness (or height) of phosphor stripes 313 by at least 2 ⁇ m. In the typical case described above, ridges 314 extend 25 ⁇ m above stripes 313. Accordingly, ridges 314 extend further away from faceplate 302 than stripes 313.
- Each ridge 314 contains a dark (essentially black), non-reflective region that occupies the entire width of that ridge 314 and at least part of its height.
- Figure 4A depicts an example in which these dark non-reflective regions encompass the full height of ridges 314.
- the later drawings illustrate examples in which the dark non-reflective regions occupy only parts of the ridge height.
- Ridges 314 can be formed with metals such as nickel, chrome, niobium, gold, and nickel-iron alloys. Ridges 314 can also be formed with electrical insulators such as glass, solder glass (or frit), ceramic, and glass-ceramic, with semiconductors such as silicon, and with materials such as silicon carbie. Combinations of these materials can also be utilized in ridges 314.
- ridges 314 consist of metal, they become sufficiently soft at a temperature in the range of 300-600°C as to allow objects, such as spacer walls 308, to be pushed slightly into them.
- ridges 314 are formed with solder glass, they so soften at a temperature in the ranges of 300-500°C.
- the ridge material is glass, ridges 314 soften at a temperature in the range of 500-700°C.
- Light-reflective layer 315 is situated on phosphor stripes 313 and dark ridges 314 as shown in Figure 1B.
- the thickness of layer 315 is sufficiently small, typically 50 - 100 nm, that nearly all of the impinging electrons from electron-emissive elements 309 pass through layer 315 with little energy loss.
- Layer 315 consists of a metal, preferably aluminum. Part of the light emitted by stripes 313 is thus reflected by layer 315 through faceplate 302. That is, layer 315 is basically a mirror. Layer 315 also acts as the final anode for the display. Because stripes 313 contact layer 315, the anode voltage is impressed on stripes 313.
- Spacer walls 308 contact light-reflective layer 315 on the anode side of the display. Because dark ridges 314 extend further toward backplate 303 than phosphor stripes 313, walls 308 specifically contact portions of layer 315 along the tops (or bottoms in the orientation shown in Figure 1A) of ridges 314. The extra height of ridges 314 prevents walls 308 from contacting light-reflective layer 315 along phosphor stripes 313.
- spacer walls 308 are shown as contacting gate lines 311 in Figure 1A. Alternatively, walls 308 may contact focusing ridges that extend above lines 311.
- Phosphor stripes 313 can be damaged easily if mechanically contacted. Because the extra height of dark ridges 314 creates spaces between walls 308 and the portions of light-reflective layer 315 along stripes 313, walls 308 do not exert their resistance forces directly on stripes 313. The amount of damage that stripes 313 could otherwise incur as a result of these resistive forces is greatly reduced.
- the display is subdivided into an array of rows and columns of picture elements ("pixels").
- pixels picture elements
- the boundaries of a typical pixel 316 are indicated by lines with arrowheads in Figure 1A and by dotted lines in Figures 1B and 1C.
- Each emitter line 310 is a row electrode for one of the rows of pixels.
- Only one pixel row is indicated in Figures 1A, 1B, and 1C as being situated between a pair of adjacent spacer walls 308 (with a slight, but inconsequential, overlap along the sides of the pixel row).
- two or more pixel rows typically 24 - 100 pixel rows, are normally located between each pair of adjacent walls 308.
- Each column of pixels has three gate lines 311: (a) one for red, (b) a second for green, and (c) the third for blue.
- each pixel column includes one of each of phosphor stripes 313r, 313g, and 313b.
- Each pixel column utilizes four of dark ridges 314. Two of ridges 314 are internal to the pixel column. The remaining two are shared with pixel(s) in the adjoining column(s).
- Light-reflective layer 315 and, consequently, phosphor stripes 313 are maintained at a positive voltage of 1,500 - 10,000 volts relative to the emitter-electrode voltage.
- elements 309 in that set emit electrons which are accelerated towards a target portion of the phosphors in corresponding stripe 313.
- Figure 1A illustrates trajectories 317 followed by one such group of electrons. Upon reaching the target phosphors in corresponding stripe 313, the-emitted electrons cause these phosphors to emit light represented by items 318 in Figure 1A.
- Some of the electrons invariably strike parts of the light-emitting structure other than the target phosphors.
- the tolerance in striking off-target points is less in the row direction (i.e., along the rows) than in the column direction (i.e., along the columns) because each pixel includes phosphors from three different stripes 313.
- the black matrix formed by dark ridges 314 compensates for off-target hits in the row direction to provide sharp contrast as well as high color purity.
- Figure 1D depicts a cross section of the full CRT of Figure 1A.
- An electrically insulating outer wall 304 extends between plates 302 and 303 outside the active device area to create a sealed enclosure 301.
- Outer wall 304 which can be formed by four individual walls arranged in a square or rectangle, typically consists of glass or ceramic having a thickness of 2 - 3 mm.
- spacer walls 308 typically extend close to outer wall 304. Spacer walls 308 could, however, contact outer wall 304.
- Back plate 303 extends laterally beyond faceplate 302.
- Electronic circuitry such as leads for accessing emitter lines 310 and gate lines 311 is mounted on the interior surface of back plate 303 outside outer wall 304.
- Light-reflective layer 315 extends through the perimeter seal to a contact pad 319 to which the anode/phosphor voltage is applied.
- Figure 2 is a simplified cross-sectional view, viewed illustrating flat panel display 600 including cathode spacer walls 607 and anode spacer structure 608 according to an embodiment of the invention.
- the interior side of faceplate 602 is coated with phosphor.
- Layer 605 is formed between faceplate 602 and backplate 603 within enclosure 601 and extends through a sealed area of the top wall, bottom wall and side walls 604a, 604b to the outside of enclosure 601.
- Addressing grid 606 is formed on the portion of layer 605 corresponding to the active region of faceplate 602.
- Cathode spacer walls 607 and anode spacer structure 608 are disposed between backplate 603 and addressing grid 606, and faceplate 602 and addressing grid 606, respectively.
- a thermionic cathode is located between addressing grid 606 and backplate 603.
- the thermionic cathode includes cathode wires 609, backing electrodes 612 and electron steering grids 613.
- Cathode wire 609 is heated to release electrons.
- a voltage may be applied to backing electrode 612 to help direct the electrons toward addressing grid 606.
- Electron steering grid 613 may be used to help extract electrons from cathode wire 609 and distribute the flow of electrons evenly between each cathode spacer wall 607.
- Voltages applied to electrodes (not shown) formed on the surface of holes 611 formed in addressing grid 606 govern whether the electrons pass through addressing grid 606. Electrons that pass through addressing grid 606 continue through holes 614 in anode spacer structure 608 to strike the phosphor coated on faceplate 602.
- one cathode wire 609 is shown between each cathode spacer wall 607. It is to be understood that there can be more than one cathode wire 609 between each cathode spacer wall 607.
- the spacers must not interfere with the trajectory of the electrons passing between the cathode and the phosphor coating ori the faceplate.
- the walls of the spacers must be sufficiently electrically conductive so that the spacers do not charge up and attract or repel the electrons to a degree that unacceptably distants the paths of the electrons.
- the spacers must be sufficiently electrically insulative so that there is no large current flow from the high voltage phosphor resulting In large power losses. Spacers formed from electrically insulative material and coated with a thin electrically conductive material are preferred.
- Figure 3A is a simplified cross-sectional view of a portion of flat panel display 900 including coating 904 formed on spacer walls 908 according to an embodiment of the invention, taken along plane 9B-9B of Figure 3B.
- Figure 3B is a simplified cross-sectional view of a portion of flat panel display 900, taken along plane 9A-9A of Figure 3A.
- Flat panel display 900 includes faceplate 902, backplate 903 and side walls (not shown) which together form sealed enclosure 901 that is held at vacuum pressure, e.g., approximately 1 x 10 -7 torr or less.
- Focusing ribs (or ridges) 912 are situated above the interior surface of backplate 903 and perpendicular to the plane of Figure 3A. In the trough formed between each pair of focusing ribs 912, field emitters 909 are formed on an interior surface of backplate 903. Field emitters 909 are formed in groups of approximately 1000. Although not illustrated in Figures 3A and 3B, a pattern of emitter-electrode lines analogous to emitter lines 310 in the embodiment of Figure 1A lie under field emitters 909 above backplate 903. Likewise a pattern of unshown gate-electrode lines analogous to gate lines 311 in Figure 1A are situated above field emitters 909.
- a matrix of dark ridges 911 is situated within enclosure 901 on faceplate 902, as described in more detail above with respect to Figures 1A - 1D.
- Phosphor 913 is formed to partially fill each trough between ridges 911.
- Anode 914 which is a thin electrically conductive material such as aluminum, is formed on phosphor 913.
- Spacer walls 908 support faceplate 902 against backplate 903.
- the surfaces of each spacer wall 908 intermediate the opposing ends are coated with resistive coating 904 or are surface doped, as described in more detail below. Resistive coating 904 prevents or minimizes charge build-up on spacer wall 908 that can distort the flow of electrons 915.
- each spacer wall 908 contacts a plurality of ridges 911 and is coated with edge metallization 905.
- An opposite end of each spacer wall 908 contacts a plurality of focusing ribs 912 and is coated with edge metallization 906.
- Edge metallization 905 and 906 can be made of, for Instance, aluminum or nickel. Edge metallizations 905 and 906 provide good electrical contact between coating 904 and faceplate 902 or focusing ribs 912, respectively, so that the voltage at the ends of spacer walls 904 is well-defined and a uniform ohmic contact is formed.
- the interface between spacer wall 908, coating 904 and edge metallization 905 can take on a number of configurations, as described in more detail below.
- Electrodes 917 are formed on the coated (or doped) surfaces of each spacer wall 908, and are used to "segment" the voltage rise from emitters 909 to anode 914.
- spacer walls 908 are formed without electrodes 917.
- Each group of field emitters 909 emit electrons 915 toward the interior surface of faceplate 902.
- Circuitry (not shown) is formed as part of flat panel display 900, e.g., on integrated circuit chips that can be attached to, for instance, an exterior surface of backplate 903, and used to control the voltage of electrodes 917.
- the voltage of each of electrodes 917 is set so that the voltage increases linearly from the voltage level at field emitters 909 to the higher voltage at anode 914.
- electrons 915 are accelerated toward faceplate 902 to strike phosphor 913 and cause light to emanate from flat panel display 900.
- the desired equipotential lines in the plane of Figure 3A, near focusing ribs 912, follow a serpentine path, rising above focusing ribs 912 and falling above the cavity in which emitters 909 are located.
- the presence of spacer wall 909 imposes an equipotential line at this location, i.e., the bottom of spacer wall 909, that is straight.
- one of electrodes 917 can be located near the bottom of spacer wall 909 and formed in a serpentine path in order to create a potential field having equipotential lines with the desired serpentine shape.
- Figure 4 is a graph of voltage versus distance 907 (Figure 3B) from field emitters 909.
- Anode 914 is spaced apart from field emitters 909 by distance 916, and is held at a higher voltage (designated as HV in Figure 4) than field emitters 909.
- HV higher voltage
- spacer walls 908 do not interfere with the flow of electrons 915 from field emitters 909 and the voltage change from field emitters 909 to anode 914 is approximately linear as shown in Figure 4.
- each spacer wall 908 It is necessary that the voltage change near each spacer wall 908 also change linearly between field emitters 909 and anode 914, so that the flow of electrons is not distorted (and the display image thereby degraded).
- the adjacent spacer wall 908 can interfere with the flow of electrons 915 from field emitters 909. Stray electrons 915 emitted from field emitters 909a will strike spacer wall 908, typically resulting in the accumulation of charge on spacer wall 908.
- ⁇ V ⁇ s ⁇ [ x ⁇ ( x ⁇ d ) / 2 ] ⁇ j ⁇ ( 1 ⁇ ⁇ )
- the maximum voltage deviation ⁇ V occurs at the midpoint between two electrodes 917 (i.e., the quantity [x ⁇ (x-d)/2] is maximized), and is proportional to the distance between the electrodes squared. For this reason, providing additional electrodes 917 minimizes the voltage deviation near spacer wall 908 and, thus, the distortion of the flow of electrons 915 toward faceplate 902.
- n electrodes of width w reduces the power consumption of flat panel display 900 according to the ratio given below:
- P NEW P OLD d ⁇ n w d ⁇ ( n + 1 ) 2
- the voltage deviation ⁇ V also decreases as the sheet resistance ⁇ s decreases, and as the secondary emission ratio ⁇ approaches 1.
- the surfaces of spacer walls 908 have a low sheet resistance ⁇ s and a secondary emission ratio ⁇ that approaches 1. Since the secondary emission ratio ⁇ can only go as low as zero, but can increase to a very high number, the secondary emission ratio requirement is typically stated as a preference for a material having a low value of secondary emission ratio ⁇ .
- Figure 5 is a graph of secondary emission ratio ⁇ versus voltage illustrating the characteristics of two materials: material 1101 and material 1102.
- the secondary emission ratio ⁇ is greaterthan 1 (and frequently much greater) for an energy range between 100 volts to 10,000 volts, resulting in a positively charged surface.
- Anode 914 is typically maintained at a positive voltage of 1500 - 10,000 volts relative to emitters 909 as is the case with anode 315 and emitters 309 as described above for Figure 1A.
- spacer walls 908 are preferably made of an electrically insulative (i.e., high resistivity) material.
- spacer walls 908 are typically positively charged (and frequently highly positively charged), resulting in distortion of the flow of electrons 915 from emitters 909.
- material 1102 has a secondary emission ratio ⁇ that, forthe voltage range in flat panel display 900, remains near 1. Since the voltage deviation ⁇ V varies as the quantity 1- ⁇ , when the surfaces of spacer walls 908 are made of material 1102, little charge (positive or negative) accumulates on the surfaces of spacer walls 908. Consequently, the presence of spacer walls 908 has little impact on the voltage drop between field emitters 909 and anode 914, and, therefore, the distortion of the flow of electrons 915 due to the presence of spacer walls 908 is minimized.
- the surfaces of spacer walls 908 facing into enclosure 901 are treated with a material having a secondary emission ratio ⁇ characteristic that looks much like that of material 1102 in Figure 11. Further, the surface is treated so that the surface resistance will be low relative to the bulk resistivity of spacer wall 908, enabling charge to flow easily from spacerwalls 908 to backplate 903 or from faceplate 902, but not so low that there will be high current flow from the high voltage phosphor on faceplate 902 and, thus, large power loss.
- spacer walls 908 are ceramic and coating 904 is a material having a secondary emission ratio ⁇ less than 4 and a sheet resistance ⁇ s between 10 9 and 10 14 ohms/ ⁇
- the material used for coating 904 has the above sheet resistance ⁇ s and a secondary emission ratio ⁇ less than 2.
- the coating 904 according to this embodiment is, for instance, chromium oxide, copper oxide, carbon, titanium oxide, vanadium oxide or a mixture of these materials.
- coating 904 is chromium oxide.
- Coating 904 has a thickness between 0.05 and 20 ⁇ m.
- coating 904 includes a first coating formed on spacer wall 908 of a material having a sheet resistance ⁇ s between 10 9 and 10 14 ohms/ ⁇ without regard to the magnitude of the secondary emission ratio ⁇ .
- the first coating is then covered by a second coating having a secondary emission ratio ⁇ less than 4 in one embodiment, and less than 2 in another embodiment.
- the material for the first coating is, for instance, titanium-chromium-oxide, silicon carbide or silicon nitride.
- the material forthe second coating is, for instance, chromium oxide, copper oxide, carbon, titanium oxide, vanadium oxide or a mixture of those materials.
- the total thickness of coating 904 is between 0.05 and 20 ⁇ m.
- spacer walls 908 are surface doped to produce a sheet resistance ⁇ s between 10 9 and 10 14 ohms/ ⁇ , then covered with coating 904 having a secondary emission ratio ⁇ of less than 4 in one embodiment and less than 2 in another embodiment.
- the dopant can be, for instance, titanium, iron, manganese or chromium.
- Coating 904 is, for instance, chromium oxide, copper oxide, carbon, titanium oxide or vanadium oxide, a mixture of those materials. In one embodiment, coating 904 is chromium oxide. Coating 904 has a thickness between 0.05 and 20 ⁇ m.
- spacer walls 908 are surface-doped to a concentration to produce a sheet resistance between 10 9 and 10 14 ohms/ ⁇
- the dopant can be, for instance, titanium, iron, manganese or chromium.
- spacer walls 908 are made of a partially electrically conductive ceramic or glass-ceramic material.
- coating 904 can be formed on spacer wall 908 by any suitable method.
- coating 904 can be formed according to well-known techniques by, for instance, thermal or plasma-enhanced chemical vapor deposition, sputtering, evaporation, screen printing, roll-on, spraying or dipping. Whatever method is used, it is desirable to form coating 904 with a sheet resistance uniformity of ⁇ 2%. Typically this is done by controlling the thickness of coating 904 within a specified tolerance.
- An alternative to coating spacer surfaces is to take advantage of a material contained in the initial ceramic layers which can be made to become slightly conductive in a later firing.
- spacerwalls treatment of spacerwalls to minimize or eliminate charging of the surfaces of the spacer walls is described.
- spacer structure e.g., spacer structure 608 ( Figure 2)
- the surfaces of holes in the spacer structure through which electrons flow are treated, as described above, to minimize or eliminate charging of those surfaces.
- FIGs 6A through 6D are cross-sectional views illustrating the interface between a spacer wall, resistive coating, edge metallization and focusing ribs according to various embodiments of the invention.
- the coating in each embodiment can be one of the coatings described above with respect to Figures 3A and 3B.
- a sharply defined edge metallization/resistive coating interface is formed that is straight and at a constant height above the cathode so that a straight equipotential is defined at the base of the spacer wall along the length of the spacer wall parallel to the backplate.
- Edge metallization according to the embodiments of the invention described below can be formed on the edge surfaces of the spacer walls by the techniques described above for formation of resistive coating 904.
- resistive coating 1204 is formed on side surfaces 1208a of spacer wall 1208. Coating 1204 is formed on side surfaces 1208a so that coating 1204 does not extend beyond the end of side surfaces 1208a.
- Edge metallization 1206 is formed on end surface 1208b of spacer wall 1208 so that edge metallization 1206 does not extend beyond coating 1204.
- resistive coating 1214 is formed on side surfaces 1218a and end surface 1218b of spacer wall 1218 to entirely cover spacer wall 1218.
- Edge metallization 1206 is formed adjacent the portion of coating 1218 formed on end surface 1218b of spacer wall 1218 so that edge metallization 1206 does not extend beyond the edge of coating 1204.
- resistive coating 1214 is formed on side surfaces 1218a and end surface 1218b of spacer wall 1218 to entirely cover spacer wall 1218.
- Edge metallization 1216 is formed adjacent the portion of coating 1214 formed on end surface 1218b of spacer wall 1218 such that metallization 1216 overlaps coating 1214 and extends around the corner of coating 1214 to a well-defined height.
- resistive coating 1204 is formed on side surfaces 1208a of spacerwall 1208, as in Figure 6A, so that coating 1204 does not extend beyond the end of side surfaces 1208a.
- Edge metallization 1216 is formed adjacent the portion of coating 1204 formed on end surface 1208b of spacer wall 1208 such that metallization 1216 overlaps coating 1204 and extends around the corner of coating 1204 to a well-defined height.
- electrodes 917 are formed at intervals on the surfaces of spacer walls 908 that are exposed within enclosure 901.
- the voltages at these electrodes 917 are set by a voltage divider.
- the voltage divider can either be coating 904 or a resistive strip, outside the active region of display 900, connected to electrically conductive traces extending from each of electrodes 917.
- the voltage divider can be "trimmed" by removing material from the voltage divider at selected locations to increase the resistance at those locations as necessary. The trimming can be done by, for instance, using a laser to ablate material from the voltage divider.
- material can be removed from selected ones of the electrically conductive traces, e.g., the length of one or more of the traces outside of enclosure 901 can be shortened, extending from a voltage divider outside the enclosure to electrodes 917 to achieve the same effect.
- Additional parallel dark non-reflective ridges could be formed on faceplate 302 so as to extend perpendicular to ridges 314.
- Phosphor stripes 313 could be created from thin phosphor films instead of phosphor particles.
- Light-emissive regions 313 could be implemented with elements other than phosphors (in particle or film form).
- a transparent anode that directly adjoins faceplate 302 could be used in place of, or in conjunction with light-reflective layer 315.
- Such an anode would typically consist of a layer of a transparent electrically conductive material such as indium-tin oxide.
- Faceplate 302 and, when present, the adjoining transparent anode then constitute a main section of the light-emitting black-matrix structure.
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- Cathode-Ray Tubes And Fluorescent Screens For Display (AREA)
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Claims (28)
- Flachbildschirmeinrichtung (600, 900), die folgendes umfasst:eine Frontplatte (602, 902);eine Rückplatte (603, 903, 1203), die mit der Frontplatte verbunden ist, um eine abgedichtete Umhüllung (601, 901) zu bilden;ein Mittel (609/612/613, 909/913) zum Emittieren von Licht von der Flachbildschirmeinrichtung;einen Abstandshalter (607/608, 908, 1208, 1218), der in der Umhüllung angeordnet ist und die Rückplatte und die Frontplatte gegenüber in einer Richtung auf die Umhüllung zu wirkenden Kräften stützt, wobei der Abstandshalter Seitenflächen (1208a, 1218a) und eine Endfläche (1208b, 1218b) in der Nähe der Rückplatte aufweist, wobei die Seitenflächen des Abstandshalters so behandelt sind, daß der Ladungsaufbau auf den Seitenflächen des Abstandshalters derart verhindert wird oder minimiert ist, daß der Abstandshalter entlang den Seitenflächen des Abstandshalters einen Flächenwiderstand zwischen 109 und 1014 Ohm/Quadrat aufweist,dadurch gekennzeichnet, dass
eine Kantenmetallisierung (906, 1206, 1216) an der Endfläche entlang der gesamten Länge des Abstandshalters ausgebildet ist, welche eine Äquipotentialfläche auf der Endfläche entlang der gesamten Länge des Abstandshalters bildet und die Kantenmetallisierung den Abstandshalter mit über der Rückplatte angeordnetem elektrisch leitendem Material verbindet. - Einrichtung nach Anspruch 1, weiterhin mit einer Beschichtung (904, 1204, 1214), die über den Seitenflächen des Abstandshalters ausgebildet ist, wobei die Beschichtung aus einem Material mit einer sekundären Emissionsrate unter 4 und einem Flächenwiderstand zwischen 109 und 1014 Ohm/Quadrat besteht.
- Einrichtung nach Anspruch 1, die weiterhin folgendes umfaßt:eine erste Beschichtung, die über den Seitenflächen des Abstandshalters ausgebildet ist, wobei die erste Beschichtung aus einem Material mit einem Flächenwiderstand zwischen 109 und 1014 Ohm/Quadrat besteht; undeine zweite Beschichtung, die über der ersten Beschichtung ausgebildet ist, wobei die zweite Beschichtung aus einem Material mit einer sekundären Emissionsrate unter 4 besteht.
- Einrichtung nach Anspruch 1, wobei die Seitenflächen des Abstandshalters mit einer Dotierungssubstanz oberflächendotiert sind, um einen Flächenwiderstand zwischen 109 und 1014 Ohm/Quadrat zu erhalten.
- Einrichtung nach Anspruch 4, wobei die Dotierungssubstanz aus mindestens einem der Stoffe Titan, Eisen, Mangan und Chrom besteht.
- Einrichtung nach Anspruch 4, weiterhin mit einer Beschichtung (904, 1204, 1214), die über den dotierten Seitenflächen des Abstandshalters ausgebildet ist, wobei die Beschichtung aus einem Material mit einer sekundären Emissionsrate unter 4 besteht.
- Einrichtung nach Anspruch 2 oder 6, wobei die Beschichtung ausgewählt ist aus der Gruppe bestehend aus Chromoxid, Kupferoxid, Kohlenstoff, Titanoxid und Vanadiumoxid.
- Einrichtung nach einem der Ansprüche 1-7, wobei der Abstandshalter eine allgemein flache Abstandshalterwand (908, 1208, 1218) umfaßt.
- Einrichtung nach einem der Ansprüche 1-7, wobei der Abstandshalter eine Abstandshalterstruktur (608) umfaßt, durch die mehrere Abstandshalterstrukturlöcher (614) ausgebildet sind.
- Einrichtung nach einem der Ansprüche 1-9, weiterhin mit einer Elektrode (917), die über einer Fläche des Abstandshalters nahe einer Grenzfläche zwischen dem Abstandshalter und dem über der Rückplatte angeordneten leitenden Material ausgebildet ist, wobei die Spannung der Elektrode so gesteuert wird, daß in der Nähe der Grenzfläche eine gewünschte Spannungsverteilung erzielt wird.
- Einrichtung nach Anspruch 10, wobei die Elektrode bezüglich einer Innenfläche der Rückplatte einen schlangenförmigen Weg aufweist.
- Einrichtung nach einem der Ansprüche 1-9, weiterhin mit mehreren Elektroden (917), die in Abständen über mindestens einer der Seitenflächen des Abstandshalters ausgebildet sind, wobei die Spannung jeder Elektrode so gesteuert wird, daß zwischen dem über der Rückplatte angeordneten leitenden Material und über der Frontplatte angeordnetem, elektrisch leitendem Material eine gewünschte Spannungsverteilung erzielt wird.
- Einrichtung nach Anspruch 12, weiterhin mit einem Spannungsteiler (904), der die Spannung jeder Elektrode festlegt.
- Einrichtung nach Anspruch 13, wobei der Spannungsteiler eine Widerstandsbeschichtung (904) umfaßt, die über mindestens einer der Seitenflächen des Abstandshalters ausgebildet ist.
- Einrichtung nach einem der Ansprüche 1-14, weiterhin mit einer zweiten Kantenmetallisierung (905), die derart zwischen einer zweiten Endfläche des Abstandshalters und der Frontplatte angeordnet ist, daß die zweite Kantenmetallisierung den Abstandshalter mit über der Frontplatte angeordnetem elektrisch leitendem Material verbindet.
- Einrichtung nach Anspruch 15, weiterhin mit einer Widerstandsbeschichtung (904, 1204, 1214), die über den Seitenflächen des Abstandshalters ausgebildet ist, wobei die erste und zweite Kantenmetallisierung mit der Widerstandsbeschichtung elektrisch verbunden ist.
- Flachbildschirmeinrichtung nach einem der Ansprüche 1-16, weiterhin mit Seitenwänden (604a, 604b), durch die die Frontplatte mit der Rückplatte verbunden ist.
- Einrichtung nach einem der Ansprüche 1-17, wobei das Mittel zum Emittieren von Licht aus folgendem besteht:einer Feldemitterkathode (909); undeinem über der Frontplatte angeordneten lichtemittierenden Material (913).
- Einrichtung nach Anspruch 1, wobei die behandelten Seitenflächen des Abstandshalters eine Beschichtung (904, 1204, 1214) umfassen, die über den Seitenflächen des Abstandshalters ausgebildet ist, wobei die Beschichtung aus einem Material mit einer sekundären Emissionsrate unter 4 und einem Flächenwiderstand zwischen 109 und 1014 Ohm/Quadrat besteht.
- Einrichtung nach Anspruch 19, wobei die Beschichtung ausgewählt ist aus der Gruppe bestehend aus Chromoxid, Kupferoxid, Kohlenstoff, Titanoxid und Vanadiumoxid.
- Verfahren zur Montage einer Flachbildschirmeinrichtung (600, 900), wobei das Verfahren die folgenden Schritte umfaßt:Befestigen eines Abstandshalters (607/608, 908, 1208, 1218) zwischen einer Rückplatte (603, 903, 1203) und einer Frontplatte (602, 902);Behandeln von Seitenflächen (1208a, 1218a) des Abstandshalters, so daß der Ladungsaufbau auf den Seitenflächen des Abstandshalters derart verhindert wird oder minimiert ist, daß der Abstandshalter entlang den Seitenflächen des Abstandshalters einen Flächenwiderstand zwischen 109 und 1014 Ohm/Quadrat aufweist;Definieren einer Aquipotentialfläche auf einer Endfläche (1208b, 1218b) des Abstandshalters entlang der gesamten Länge des Abstandshalters durch Beschichten der Endfläche entlang der gesamten Länge des Abstandshalters mit einer Kantenmetallisierung (906, 1206, 1216), die den Abstandshalter mit über der Rückplatte angeordnetem elektrisch leitendem Material verbindet; undAbdichten der Rückplatte und Frontplatte miteinander, um den Abstandshalter in einer Umhüllung (601, 901) zu ummanteln.
- Verfahren nach Anspruch 21, bei dem der Behandlungsschritt das Ausbilden einer Widerstandsbeschichtung (904, 1204, 1214) über den Seitenflächen des Abstandshalters umfaßt.
- Verfahren nach Anspruch 22, bei dem die Widerstandsbeschichtung eine sekundäre Emissionsrate unter 4 und einen Flächenwiderstand zwischen 109 und 1014 Ohm/Quadrat aufweist.
- Verfahren nach Anspruch 21, bei dem der Behandlungsschritt folgendes umfaßt:Ausbilden einer ersten Beschichtung mit einem Flächenwiderstand zwischen 109 und 1014 Ohm/Quadrat über den Seitenflächen des Abstandshalters; undAusbilden einer zweiten Beschichtung mit einer sekundären Emissionsrate unter 4 über der ersten Beschichtung.
- Verfahren nach Anspruch 21, bei dem bei dem Behandlungsschritt die Seitenflächen des Abstandshalters mit einer Dotierungssubstanz dotiert werden, um den Seitenflächen des Abstandshalters einen Flächenwiderstand zwischen 109 und 1014 Ohm/Quadrat zu verleihen.
- Verfahren nach Anspruch 25, wobei die Dotierungssubstanz aus mindestens einem der Stoffe Titan, Eisen, Mangan und Chrom besteht.
- Verfahren nach Anspruch 25, wobei bei dem Behandlungsschritt weiterhin über den dotierten Seitenflächen des Abstandshalters eine Beschichtung (904, 1204, 1214) mit einer sekundären Emissionsrate unter 4 ausgebildet wird.
- Verfahren nach einem der Ansprüche 21-27, wobei der Abstandshalter eine allgemein flache Abstandshalterwand (908, 1208, 1218) umfaßt.
Applications Claiming Priority (7)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/012,542 US5589731A (en) | 1992-04-10 | 1993-02-01 | Internal support structure for flat panel device |
US18885794A | 1994-01-31 | 1994-01-31 | |
US08/188,856 US5477105A (en) | 1992-04-10 | 1994-01-31 | Structure of light-emitting device with raised black matrix for use in optical devices such as flat-panel cathode-ray tubes |
US188856 | 1994-01-31 | ||
US188857 | 1994-01-31 | ||
PCT/US1994/000602 WO1994018694A1 (en) | 1993-02-01 | 1994-02-01 | Flat panel device with internal support structure and/or raised black matrix |
US12542 | 1998-01-23 |
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EP0683920A1 EP0683920A1 (de) | 1995-11-29 |
EP0683920A4 EP0683920A4 (de) | 1998-04-15 |
EP0683920B1 EP0683920B1 (de) | 2002-05-08 |
EP0683920B2 true EP0683920B2 (de) | 2006-04-12 |
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EP94908603A Expired - Lifetime EP0683920B2 (de) | 1993-02-01 | 1994-02-01 | Flacher bildschirm mit innerer tragstruktur |
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JP (1) | JP3595336B2 (de) |
AU (1) | AU6163494A (de) |
DE (1) | DE69430568T3 (de) |
WO (1) | WO1994018694A1 (de) |
Families Citing this family (47)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5675212A (en) * | 1992-04-10 | 1997-10-07 | Candescent Technologies Corporation | Spacer structures for use in flat panel displays and methods for forming same |
CN1271675C (zh) * | 1994-06-27 | 2006-08-23 | 佳能株式会社 | 电子束设备 |
USRE40103E1 (en) * | 1994-06-27 | 2008-02-26 | Canon Kabushiki Kaisha | Electron beam apparatus and image forming apparatus |
US5949184A (en) * | 1994-11-11 | 1999-09-07 | Sony Corporation | Light-emitting device and method of manufacturing the same |
US6384527B1 (en) | 1994-11-21 | 2002-05-07 | Candescent Technologies Corporation | Flat panel display with reduced electron scattering effects |
US6022652A (en) * | 1994-11-21 | 2000-02-08 | Candescent Technologies Corporation | High resolution flat panel phosphor screen with tall barriers |
AU4243596A (en) * | 1994-11-21 | 1996-06-17 | Candescent Technologies Corporation | Field emission device with internal structure for aligning phosphor pixels with corresponding field emitters |
JP3320294B2 (ja) * | 1995-02-03 | 2002-09-03 | キヤノン株式会社 | 電子線発生装置、及び、それを用いた画像形成装置 |
JP2852357B2 (ja) * | 1995-03-09 | 1999-02-03 | 双葉電子工業株式会社 | 表示装置 |
JP3083076B2 (ja) * | 1995-04-21 | 2000-09-04 | キヤノン株式会社 | 画像形成装置 |
JPH09167583A (ja) * | 1995-12-15 | 1997-06-24 | Futaba Corp | 表示装置 |
US6140761A (en) * | 1996-01-31 | 2000-10-31 | Canon Kabushiki Kaisha | Electron generation using a fluorescent element and image forming using such electron generation |
US5726529A (en) * | 1996-05-28 | 1998-03-10 | Motorola | Spacer for a field emission display |
US5811927A (en) * | 1996-06-21 | 1998-09-22 | Motorola, Inc. | Method for affixing spacers within a flat panel display |
US6049165A (en) | 1996-07-17 | 2000-04-11 | Candescent Technologies Corporation | Structure and fabrication of flat panel display with specially arranged spacer |
KR100232136B1 (ko) | 1996-08-20 | 1999-12-01 | 구자홍 | 칼라 플라즈마 디스플레이 패널의 격벽구조 및 격벽제조방법 |
US6005540A (en) * | 1996-10-07 | 1999-12-21 | Canon Kabushiki Kaisha | Image-forming apparatus and method of driving the same |
EP0851458A1 (de) * | 1996-12-26 | 1998-07-01 | Canon Kabushiki Kaisha | Abstandshalter, Bilderzeugungsgerät und Herstellungsverfahren dafür |
CN1127750C (zh) * | 1996-12-27 | 2003-11-12 | 佳能株式会社 | 减少电荷的薄膜,图象形成装置及其制造方法 |
KR100609364B1 (ko) * | 1997-03-25 | 2006-08-08 | 이 아이 듀폰 디 네모아 앤드 캄파니 | 디스플레이 패널용 필드 이미터 캐소드 배면판 구조물, 그제조 방법, 및 그를 포함하는 디스플레이 패널 |
JPH10326579A (ja) * | 1997-03-28 | 1998-12-08 | Canon Inc | 画像形成装置とその製造方法 |
JP3703287B2 (ja) | 1997-03-31 | 2005-10-05 | キヤノン株式会社 | 画像形成装置 |
FR2764109A1 (fr) * | 1997-05-30 | 1998-12-04 | Commissariat Energie Atomique | Espaceurs pour ecran plat de visualisation |
FR2764729A1 (fr) * | 1997-06-13 | 1998-12-18 | Commissariat Energie Atomique | Procede de fabrication d'espaceurs pour ecran plat de visualisation |
US5872424A (en) | 1997-06-26 | 1999-02-16 | Candescent Technologies Corporation | High voltage compatible spacer coating |
JP2000113997A (ja) * | 1998-10-02 | 2000-04-21 | Canon Inc | 帯電防止膜、部材、この部材を用いた電子線装置、画像形成装置 |
JP3014046B1 (ja) | 1997-08-01 | 2000-02-28 | キヤノン株式会社 | 電子線装置及びそれを用いた画像形成装置及び前記電子線装置で用いる部材及び前記電子線装置の製造方法及び前記画像形成装置の製造方法及び前記部材の製造方法 |
US6366014B1 (en) | 1997-08-01 | 2002-04-02 | Canon Kabushiki Kaisha | Charge-up suppressing member, charge-up suppressing film, electron beam apparatus, and image forming apparatus |
WO1999022394A1 (en) * | 1997-10-27 | 1999-05-06 | Evgeny Invievich Givargizov | Cathodoluminescent screen with a columnar structure, and the method for its preparation |
WO1999034390A1 (en) * | 1997-12-29 | 1999-07-08 | Motorola Inc. | Field emission device having high capacitance spacer |
US6075323A (en) * | 1998-01-20 | 2000-06-13 | Motorola, Inc. | Method for reducing charge accumulation in a field emission display |
US5990613A (en) * | 1998-01-20 | 1999-11-23 | Motorola, Inc. | Field emission device having a non-coated spacer |
US6215241B1 (en) * | 1998-05-29 | 2001-04-10 | Candescent Technologies Corporation | Flat panel display with encapsulated matrix structure |
DE69820599T2 (de) * | 1998-06-11 | 2004-10-07 | Ibm | Gitterelektroden fur eine Anzeigevorrichtung |
JP3302341B2 (ja) | 1998-07-02 | 2002-07-15 | キヤノン株式会社 | 帯電緩和膜及び電子線装置及び画像形成装置及び画像形成装置の製造方法 |
JP3689598B2 (ja) | 1998-09-21 | 2005-08-31 | キヤノン株式会社 | スペーサの製造方法および前記スペーサを用いた画像形成装置の製造方法 |
US7067171B1 (en) | 1999-02-17 | 2006-06-27 | Canon Kabushiki Kaisha | Manufacturing method of electron beam apparatus and spacer, and electron beam apparatus |
JP3135897B2 (ja) * | 1999-02-25 | 2001-02-19 | キヤノン株式会社 | 電子線装置用スペーサの製造方法と電子線装置の製造方法 |
JP3501709B2 (ja) | 1999-02-25 | 2004-03-02 | キヤノン株式会社 | 電子線装置用支持部材の製造方法および画像表示装置の製造方法 |
JP3507393B2 (ja) * | 1999-02-25 | 2004-03-15 | キヤノン株式会社 | スペーサの製造方法および電子源装置の製造方法 |
US6861798B1 (en) * | 1999-02-26 | 2005-03-01 | Candescent Technologies Corporation | Tailored spacer wall coatings for reduced secondary electron emission |
JP2002157959A (ja) | 2000-09-08 | 2002-05-31 | Canon Inc | スペーサの製造法およびこのスペーサを用いた画像形成装置の製造方法 |
KR100600892B1 (ko) * | 2001-07-23 | 2006-07-14 | 엘지.필립스 디스플레이 주식회사 | 음극선관 |
JP3919676B2 (ja) * | 2002-03-05 | 2007-05-30 | キヤノン株式会社 | 高電圧型画像表示装置 |
JP2010015870A (ja) | 2008-07-04 | 2010-01-21 | Canon Inc | 画像表示装置 |
JP5590830B2 (ja) | 2008-08-11 | 2014-09-17 | キヤノン株式会社 | 発光体基板及びこれを用いた画像表示装置 |
CN103943033B (zh) * | 2014-04-02 | 2017-02-15 | 京东方科技集团股份有限公司 | 一种透明显示设备 |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3808497A (en) * | 1972-05-08 | 1974-04-30 | Ibm | Gaseous discharge device and method of spacing the plates thereof |
BR7401317D0 (pt) * | 1973-03-15 | 1974-11-05 | Burroughs Corp | Painel exibidor de caracteres de multiplas posicoes e membro preformado |
US4099082A (en) * | 1976-10-06 | 1978-07-04 | Zenith Radio Corporation | Stacked lattice spacer support for luminescent display panels |
NL7706617A (nl) * | 1977-06-16 | 1978-12-19 | Philips Nv | Kleurenbeeldbuis. |
DE2750587A1 (de) * | 1977-11-11 | 1979-05-17 | Siemens Ag | Gasentladungsanzeigevorrichtung mit abstandselementen |
DE3036671A1 (de) * | 1980-09-29 | 1982-05-13 | Siemens AG, 1000 Berlin und 8000 München | Flacher bildschirm, verfahren zu seiner herstellung und seine verwendung |
EP0050294B1 (de) * | 1980-10-20 | 1987-01-14 | Matsushita Electric Industrial Co., Ltd. | Verfahren zum Herstellen einer Elektrodenanordnung und durch dieses Verfahren herstellbare Elektrodenanordnung |
US4857799A (en) * | 1986-07-30 | 1989-08-15 | Sri International | Matrix-addressed flat panel display |
US5063327A (en) * | 1988-07-06 | 1991-11-05 | Coloray Display Corporation | Field emission cathode based flat panel display having polyimide spacers |
US5003219A (en) * | 1988-11-10 | 1991-03-26 | Matsushita Electric Industrial Co., Ltd. | Fixed construction for plate electrodes in a flat display unit |
US5160871A (en) * | 1989-06-19 | 1992-11-03 | Matsushita Electric Industrial Co., Ltd. | Flat configuration image display apparatus and manufacturing method thereof |
EP0405262B2 (de) * | 1989-06-19 | 2004-01-02 | Matsushita Electric Industrial Co., Ltd. | Anzeigevorrichtung mit flachem Bildschirm |
CA2073923C (en) * | 1991-07-17 | 2000-07-11 | Hidetoshi Suzuki | Image-forming device |
EP0580244B1 (de) * | 1992-07-23 | 1997-10-08 | Koninklijke Philips Electronics N.V. | Flache Bildwiedergabeanordnung mit Elektronenfortpflanzungskanälen |
-
1994
- 1994-02-01 DE DE69430568T patent/DE69430568T3/de not_active Expired - Lifetime
- 1994-02-01 WO PCT/US1994/000602 patent/WO1994018694A1/en active IP Right Grant
- 1994-02-01 AU AU61634/94A patent/AU6163494A/en not_active Abandoned
- 1994-02-01 JP JP51805294A patent/JP3595336B2/ja not_active Expired - Fee Related
- 1994-02-01 EP EP94908603A patent/EP0683920B2/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE69430568T3 (de) | 2007-04-26 |
EP0683920A1 (de) | 1995-11-29 |
JPH08508846A (ja) | 1996-09-17 |
DE69430568D1 (de) | 2002-06-13 |
EP0683920B1 (de) | 2002-05-08 |
JP3595336B2 (ja) | 2004-12-02 |
EP0683920A4 (de) | 1998-04-15 |
DE69430568T2 (de) | 2003-01-09 |
WO1994018694A1 (en) | 1994-08-18 |
AU6163494A (en) | 1994-08-29 |
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