EP0647357A1 - Semiconductor chip encapsulation method, device produced by this method and its application to three dimensional chip interconnection - Google Patents
Semiconductor chip encapsulation method, device produced by this method and its application to three dimensional chip interconnectionInfo
- Publication number
- EP0647357A1 EP0647357A1 EP94913654A EP94913654A EP0647357A1 EP 0647357 A1 EP0647357 A1 EP 0647357A1 EP 94913654 A EP94913654 A EP 94913654A EP 94913654 A EP94913654 A EP 94913654A EP 0647357 A1 EP0647357 A1 EP 0647357A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- pellets
- conductors
- pads
- washer
- stack
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/4824—Pads with extended contours, e.g. grid structure, branch structure, finger structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L24/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0657—Stacked arrangements of devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/023—Redistribution layers [RDL] for bonding areas
- H01L2224/0233—Structure of the redistribution layers
- H01L2224/02333—Structure of the redistribution layers being a bump
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/023—Redistribution layers [RDL] for bonding areas
- H01L2224/0237—Disposition of the redistribution layers
- H01L2224/02371—Disposition of the redistribution layers connecting the bonding area on a surface of the semiconductor or solid-state body with another surface of the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
- H01L2224/1133—Manufacturing methods by local deposition of the material of the bump connector in solid form
- H01L2224/1134—Stud bumping, i.e. using a wire-bonding apparatus
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/24137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06524—Electrical connections formed on device or on substrate, e.g. a deposited or grown layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06551—Conductive connections on the side of the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06589—Thermal management, e.g. cooling
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00013—Fully indexed content
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01015—Phosphorus [P]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01058—Cerium [Ce]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01061—Promethium [Pm]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
Definitions
- the subject of the present invention is a method of encapsulating semiconductor wafers as well as the resulting device, each of the wafers containing for example an electronic component, an integrated circuit or a sensor. It also relates to the application of such encapsulation to the three-dimensional interconnection of these pellets.
- the pellets are stacked after having been provided with connection wires oriented towards the lateral faces of the stack, then they are made integral with one another, for example using a resin; the interconnections of the pellets are then made on the faces of the stack.
- the object of the present invention is to modify this process in particular to make it easier to integrate into a semiconductor factory and to reduce its cost.
- cables are conductors, wires for example, directly on a semiconductor washer carrying a large number of pads; the washer being glued on an elastic film, the washer is sawn to individualize the pellets and then the film is stretched so as to spread the pellets; we then join all the pellets and the wires in an insulating material, polymerizable resin for example, then, after polishing, metallic deposits are produced above the wires so as to connect the latter to the sides of the pellets; the assembly is then cut so as to separate the pellets: we then obtain pellets encapsulated in a coating forming a housing, provided with connections.
- FIG. 1 therefore represents an embodiment of the method according to the invention.
- the first step, marked 10 consists in fixing (for example gluing), on an elastic film, a washer of semiconductor material (also known by the English name of "wafer"), in which a large number of pads (usually in the order of several hundred), each containing an integrated circuit or discrete component; the film is for example a self-adhesive polymer type.
- the second step, marked 11, consists in wiring electrical conductors, wires or ribbons, on each of the connection pads of each of the pads contained in the washer.
- FIG. 2 The result of these operations is illustrated in FIG. 2.
- a semiconductor washer 1 has been shown in which a pad 21 has been identified.
- the washer 1 is mounted on the elastic film, marked 2.
- conductors 23, for example wires are connected vertically using the technique called "bail bonding" and consisting of melting the end of the wire 23 to obtain a small ball 24, facilitating its connection to the pad 22.
- Other techniques can be used, as illustrated for example below in FIG. 7.
- the wires 23 are each cut at a predetermined height, which can for example be 150 to 200 ⁇ m, for a wire diameter of about 25 to 30 ⁇ m, a thickness of washer of the order of 500 ⁇ m and of film 2 of the order of 200 ⁇ m, for example.
- the next step (12, Figure 1) consists in sawing the washer 2 preferably over its entire thickness, so as to individualize the pellets such as 21.
- the next step, marked 13, consists in uniformly stretching the elastic film (2); this has the effect of spreading the pellets (21) from each other and, this, regularly. It should be noted that the step 11 of wiring the wires on the washer (1) can, in an alternative embodiment, be carried out only after this step 13 of stretching the elastic film (2).
- the next step, marked 14 consists of joining the pellets and their connection wires and coating the whole in an electrically insulating material, for example an organic resin, epoxy or polyimide, by a casting or molding technique for example, the the material then being, where appropriate, polymerized.
- an electrically insulating material for example an organic resin, epoxy or polyimide
- the next step, marked 15, consists in polishing the upper face (27, FIG. 3) of the coating material 25, so as to obtain a flat surface on which the sections of the wires 23 are flush.
- the thickness of the coating material 25 depends on that of the washer 1 and of the materials concerned, in particular for thermo-mechanical reasons. For example, for a washer 400 to 500 ⁇ m thick, the material 25 can be approximately 150 ⁇ m.
- the next step (16, Figure 1) is to remove the elastic film 2.
- the rear face of the assembly, marked 28 in FIG. 3, is polished, that is to say the face opposite to face 27 to remove the film 2 and / or to thin the pellets 21 in order to reduce the thickness and size, which can be particularly advantageous in the application described below of stacking the pellets encapsulated in three dimensions.
- the elastic film 2 is not removed, which then makes it possible to isolate and / or protect the rear face 28 of the patch.
- the next step, marked 17, consists in making connections connecting each of the conductors 23 to what will become the lateral face of the pads after separation, these connections being made by metallizations on the upper face 27 above the inter-pad interval .
- FIGS 4a and 4b illustrate this step, seen respectively in section and from above.
- FIG. 4a represents the pellets 21 with their wires 23 embedded in the material 25.
- the upper face 27 of the assembly carries metallizations 30 above the wires 23, metallizations which connect each of the wires 23 to the gap 26 between pads.
- These metallizations can take different forms as illustrated in the top view of FIG. 4b: they can connect a wire 23 to the inter-pad area 26, connect two wires 23 of different pads together or further connect a wire 23 to an area 31, used later for testing the pellets for example.
- connections 30 can be made by any known means, for example depositing a metal layer and subsequent etching of this layer.
- the deposit can be a metallic deposit such as gold, nickel and gold, nickel-copper and gold, copper and gold, carried out for example under vacuum by cathodic sputtering, optionally recharged electrochemically.
- the subsequent engraving may for example be a photoengraving.
- a so-called reverse photoengraving that is to say leaving the metal everywhere except around the conductors, the latter making it possible in addition to produce electromagnetic shielding.
- the last step in the production of the encapsulated pellets (step 18, in FIG. 1) consists in the separation of the pellets. This separation is carried out by cutting the material 25 between the pellets, for example using a diamond saw. Semiconductor wafers are then obtained, each coated on five of their faces in an insulating material forming a housing, the latter being provided with connections (metallizations 30), which can be tested and manipulated.
- step 19, Figure 1 When we want to achieve with pellets thus encapsulated a three-dimensional stack (step 19, Figure 1), we have the boxes in a slide allowing to align two of the side faces of the boxes, thus simplifying the problems of relative positioning of the boxes . Between the housings are arranged layers of adhesive material, such as a polymerizable resin for example. Then the assembly is pressed and optionally it is polymerized, so as to secure it.
- adhesive material such as a polymerizable resin for example
- FIG. 5 where there are the pellets 21 and their coating material 25, separated from each other by an adhesive layer 32.
- the film is used elastic 2, an adhesive material - or made adhesive by an appropriate treatment - which is left in place, thus avoiding the interposition of the layers 32.
- On each of the end faces of the stack there is also a closing layer 42 non-adhesive, which is fixed by means of a layer 32.
- the closure layers 42 can be adhesive on one of their faces, thus avoiding the layer 32.
- the metallizations 30 connect each of the conductors 23 to the edge 35 of the stack.
- the next step (20, FIG. 1) consists in interconnecting the various pellets of the stack and in connecting them, if necessary, to pads, called stack pads, allowing their connection to external circuits. These interconnections are made on the faces of the stack, for example as described in the aforementioned French patent application.
- Figure 5 there is shown by way of example the different connections 30 all connected together using a metallization 33 disposed on the face of the stack and extending (34) for example on one or on both of the end faces of the stack. In the latter case, one of the faces can be used for the test while the other is used for mounting the stack on a printed circuit for example.
- the cooling of the pellets in operation can be improved by the insertion of thermal drains between the housings, possibly connected to a radiator.
- a heat sink 38 metallic layer for example, of copper or nitride aluminum, or even diamond, is placed between each pellet 21 by means of a layer of glue 36.
- the left lateral face of the stack is for example glued, by means of a layer of glue 39, preferably thermally conductive, to a radiator 37, which is thus in thermal contact with the drains 38.
- glue 39 preferably thermally conductive
- step 11 of Figure 1 shows, in sectional view, an alternative embodiment of step 11 of Figure 1, namely the wiring of conductors on the washer.
- the washer 1 mounted on its elastic film 2 and carrying pads 22, on which one wishes to wire conductors 23.
- the upper face of the washer 1 is provided with pieces of substrate of the circuit type printed 39, preferably at least one per patch, the printed circuit 39 being fixed on the washer using for example a layer of glue 40.
- the printed circuit 39 carries at least one metallization 41.
- the conductor 23 is no longer cut but it is curved so as to be moreover connected to the metallization 41 carried by the printed circuit 39.
- the conductor 23 can be connected vertically to the pad 22 as shown in the preceding figures or as shown in FIG. 7, connected horizontally as in metallization 41.
- the method described above, as well as the devices obtained, have a certain number of advantages among which the fact that it is possible to process a large number of pellets simultaneously (all those which belong to the same washer) and, this , with techniques known in the semiconductor industry, easily integrated into a production line for semiconductor circuits, which considerably reduces the cost of the encapsulated chip and which makes it possible, by the techniques used, to obtain very small dimensions, in particular by the coating material, which can typically represent an increase in the area (of the pellet) of less than 1%.
- the encapsulation mode is well suited to a "three-dimensional" stack, which can be carried out collectively and simply, with the cost advantages which result therefrom.
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Wire Bonding (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
According to the method of the invention, conductive leads are directly wired onto a semiconductor wafer carrying a large number of chips, the wafer is bonded to a resilient film and cut to separate each chip, after which the film is stretched to space the chips; the totality of the chips and leads are then held in an insulating material such as a polymerizable resin, and, after polishing, metal plating is applied over the leads to connect them to the sides of the chips; the assembly is then cut in order to separate the chips.
Description
PROCEDE D'ENCAPSULATION DE PASTILLES SEMI-CONDUCTRICES, DISPOSITIF OBTENU PAR CE PROCEDE ET APPLICATION A L'INTERCONNEXION DE PASTILLES EN TROIS DIMENSIONS SEMICONDUCTOR PELLET ENCAPSULATION PROCESS, DEVICE OBTAINED BY THIS PROCESS AND APPLICATION TO THE INTERCONNECTION OF THREE-DIMENSIONAL PELLETS
La présente invention a pour objet un procédé d'encapsulation de pastilles semi-conductrices ainsi que le dispositif en résultant, chacune des pastilles contenant par exemple un composant électronique, un circuit intégré ou un capteur. Elle a également pour objet l'application d'une telle encapsulation à l'interconnexion en trois dimensions de ces pastilles.The subject of the present invention is a method of encapsulating semiconductor wafers as well as the resulting device, each of the wafers containing for example an electronic component, an integrated circuit or a sensor. It also relates to the application of such encapsulation to the three-dimensional interconnection of these pellets.
La réalisation des systèmes électroniques actuels, tant civils que militaires, doit tenir compte d'exigences de plus en plus grandes de compacité, du fait du nombre de plus en plus élevé de circuits mis en oeuvre.The realization of current electronic systems, both civil and military, must take account of ever greater compactness requirements, due to the increasing number of circuits implemented.
En ce sens, il a déjà été proposé de réaliser des empilements de circuits intégrés dits "trois dimensions", comme par exemple décrit dans la demande de brevet français n° 2.670.323 au nom de THOMSON-CSF. Selon cette réalisation, les pastilles sont empilées après avoir été munies de fils de connexion orientés vers les faces latérales de l'empilement, puis elles sont rendues solidaires les unes des autres, à l'aide par exemple d'une résine ; les interconnexions des pastilles sont ensuite réalisées sur les faces de l'empilement.In this sense, it has already been proposed to produce stacks of so-called "three-dimensional" integrated circuits, as for example described in French patent application No. 2,670,323 in the name of THOMSON-CSF. According to this embodiment, the pellets are stacked after having been provided with connection wires oriented towards the lateral faces of the stack, then they are made integral with one another, for example using a resin; the interconnections of the pellets are then made on the faces of the stack.
La présente invention a pour but de modifier ce processus notamment pour en rendre la réalisation plus facilement intégrable dans une usine de semi-conducteurs et en diminuer le coût.The object of the present invention is to modify this process in particular to make it easier to integrate into a semiconductor factory and to reduce its cost.
Plus précisément, selon le procédé de l'invention, on câble des conducteurs, fils par exemple, directement sur une rondelle semi- conductrice portant un grand nombre de pastilles ; la rondelle étant collée sur un film élastique, on scie la rondelle pour individualiser les pastilles puis on étire le film de sorte à écarter les pastilles ; on solidarise ensuite
l'ensemble des pastilles et des fils dans un matériau isolant, résine polymérisable par exemple, puis, après polissage, on réalise des dépôts métalliques au-dessus des fils de sorte à relier ceux-ci aux côtés des pastilles ; on découpe ensuite l'ensemble de façon à séparer les pastilles : on obtient alors des pastilles encapsulées dans un enrobage formant boîtier, muni de connexions. Pour une application "trois dimensions", on procède à l'empilement des boîtiers précédents, ceux-ci étant simplement collés entre eux à l'aide d'un intercalaire disposé entre chaque pastille et la suivante, puis les interconnexions sont réalisées sur les faces latérales de l'empilement ainsi obtenu, par exemple comme décrit dans la demande de brevet précitée.More precisely, according to the method of the invention, cables are conductors, wires for example, directly on a semiconductor washer carrying a large number of pads; the washer being glued on an elastic film, the washer is sawn to individualize the pellets and then the film is stretched so as to spread the pellets; we then join all the pellets and the wires in an insulating material, polymerizable resin for example, then, after polishing, metallic deposits are produced above the wires so as to connect the latter to the sides of the pellets; the assembly is then cut so as to separate the pellets: we then obtain pellets encapsulated in a coating forming a housing, provided with connections. For a "three-dimensional" application, the preceding boxes are stacked, these being simply glued to each other using an interlayer placed between each pad and the next, then the interconnections are made on the faces side of the stack thus obtained, for example as described in the aforementioned patent application.
D'autres objets, particularités et résultats de l'invention ressortiront de la description suivante, donnée à titre d'exemple et illustrée par les dessins annexés, qui représentent :Other objects, features and results of the invention will emerge from the following description, given by way of example and illustrated by the appended drawings, which represent:
- la figure 1 , un mode de réalisation du procédé selon l'invention ;- Figure 1, an embodiment of the method according to the invention;
- les figures 2 à 4a et 5, différents schémas vus en coupe, illustrant différentes étapes du procédé selon l'invention ;- Figures 2 to 4a and 5, different diagrams seen in section, illustrating different stages of the method according to the invention;
- la figure 4b, une vue de dessus du schéma de la figure 4a ; - les figures 6 et 7, des vues en coupe schématiques de variantes de l'invention.- Figure 4b, a top view of the diagram of Figure 4a; - Figures 6 and 7, schematic sectional views of variants of the invention.
Sur ces différentes figures, les mêmes références se rapportent aux mêmes éléments. D'autre part, pour la clarté des dessins, l'échelle réelle n'a pas été respectée.In these different figures, the same references relate to the same elements. On the other hand, for the sake of clarity of the drawings, the real scale was not respected.
La figure 1 représente donc un mode de réalisation du procédé selon l'invention.FIG. 1 therefore represents an embodiment of the method according to the invention.
La première étape, repérée 10, consiste à fixer (par exemple coller), sur un film élastique, une rondelle de matériau semi-conducteur (également connue sous le nom anglais de "wafer"), dans laquelle on a réalisé un grand nombre de pastilles (couramment de l'ordre de plusieurs centaines), contenant chacune un circuit intégré ou composant discret ; le film est par exemple un auto-adhésif de type polymère.
La deuxième étape, repérée 11 , consiste à câbler des conducteurs électriques, fils ou rubans, sur chacun des plots de connexion de chacune des pastilles contenues dans la rondelle.The first step, marked 10, consists in fixing (for example gluing), on an elastic film, a washer of semiconductor material (also known by the English name of "wafer"), in which a large number of pads (usually in the order of several hundred), each containing an integrated circuit or discrete component; the film is for example a self-adhesive polymer type. The second step, marked 11, consists in wiring electrical conductors, wires or ribbons, on each of the connection pads of each of the pads contained in the washer.
Le résultat de ces opérations est illustré sur la figure 2. Sur cette dernière figure, on a représenté une rondelle semi- conductrice 1 dans laquelle on a identifié une pastille 21. La rondelle 1 est montée sur le film élastique , repéré 2. Sur chacun des plots, repérés 22, de la rondelle 1 sont connectés des conducteurs 23, par exemple des fils. Ceux-ci peuvent être connectés verticalement à l'aide de la technique dite "bail bonding" et consistant à faire fondre l'extrémité du fil 23 pour obtenir une petite boule 24, facilitant sa connexion sur le plot 22. D'autres techniques peuvent être employées, comme illustré par exemple ci-après figure 7. Après leur fixation, les fils 23 sont coupés chacun à une hauteur prédéterminée, qui peut être par exemple de 150 à 200 μm, pour un diamètre de fil d'environ 25 à 30 μm, une épaisseur de rondelle de l'ordre de 500 μm et de film 2 de l'ordre de 200 μm, par exemple.The result of these operations is illustrated in FIG. 2. In this latter figure, a semiconductor washer 1 has been shown in which a pad 21 has been identified. The washer 1 is mounted on the elastic film, marked 2. On each studs, marked 22, of the washer 1 are connected conductors 23, for example wires. These can be connected vertically using the technique called "bail bonding" and consisting of melting the end of the wire 23 to obtain a small ball 24, facilitating its connection to the pad 22. Other techniques can be used, as illustrated for example below in FIG. 7. After their fixing, the wires 23 are each cut at a predetermined height, which can for example be 150 to 200 μm, for a wire diameter of about 25 to 30 μm, a thickness of washer of the order of 500 μm and of film 2 of the order of 200 μm, for example.
L'étape suivante (12, figure 1 ) consiste à scier la rondelle 2 de préférence sur toute son épaisseur, de sorte à individualiser les pastilles telles que 21.The next step (12, Figure 1) consists in sawing the washer 2 preferably over its entire thickness, so as to individualize the pellets such as 21.
L'étape suivante, repérée 13, consiste à étirer uniformément le film élastique (2) ; cela a pour effet d'écarter les pastilles (21 ) les unes des autres et, ce, de façon régulière. II est à noter que l'étape 11 de câblage des fils sur la rondelle (1 ) peut être, dans une variante de réalisation, effectuée seulement après cette étape 13 d'étirement du film élastique (2).The next step, marked 13, consists in uniformly stretching the elastic film (2); this has the effect of spreading the pellets (21) from each other and, this, regularly. It should be noted that the step 11 of wiring the wires on the washer (1) can, in an alternative embodiment, be carried out only after this step 13 of stretching the elastic film (2).
L'étape suivante, repérée 14, consiste à solidariser les pastilles et leurs fils de connexion et enrober le tout dans un matériau électriquement isolant, par exemple une résine organique, époxy ou polyimide, par une technique de coulage ou de moulage par exemple, le matériau étant ensuite, le cas échéant, polymérisé.The next step, marked 14, consists of joining the pellets and their connection wires and coating the whole in an electrically insulating material, for example an organic resin, epoxy or polyimide, by a casting or molding technique for example, the the material then being, where appropriate, polymerized.
Le résultat de cette étape est illustré sur la figure 3.
Sur cette figure, on retrouve le film 2 portant des pastilles 21 , maintenant individualisées et séparées les unes des autres. Les pastilles 21 et leurs conducteurs 23 sont noyés dans un matériau isolant 25, qui pénètre également dans les intervalles 26 entre pastilles.The result of this step is illustrated in Figure 3. In this figure, we find the film 2 carrying pellets 21, now individualized and separated from each other. The pads 21 and their conductors 23 are embedded in an insulating material 25, which also penetrates into the gaps 26 between pads.
L'étape suivante, repérée 15, consiste à polir la face supérieure (27, figure 3) du matériau d'enrobage 25, de sorte à obtenir une surface plane sur laquelle les sections des fils 23 affleurent.The next step, marked 15, consists in polishing the upper face (27, FIG. 3) of the coating material 25, so as to obtain a flat surface on which the sections of the wires 23 are flush.
L'épaisseur du matériau d'enrobage 25 dépend de celle de la rondelle 1 et des matériaux concernés, notamment pour des raisons thermo- mécaniques. A titre d'exemple, pour une rondelle de 400 à 500 μm d'épaisseur, le matériau 25 peut faire environ 150 μm.The thickness of the coating material 25 depends on that of the washer 1 and of the materials concerned, in particular for thermo-mechanical reasons. For example, for a washer 400 to 500 μm thick, the material 25 can be approximately 150 μm.
L'étape suivante (16, figure 1 ) consiste à supprimer le film élastique 2.The next step (16, Figure 1) is to remove the elastic film 2.
Cette suppression peut être réalisée par exemple par décollage du film. Dans une variante de réalisation, on procède à un polissage de la face arrière de l'ensemble, repéré 28 sur la figure 3, c'est-à-dire la face opposée à la face 27 pour supprimer le film 2 et/ou amincir les pastilles 21 dans le but d'en réduire l'épaisseur et l'encombrement, ce qui peut être particulièrement avantageux dans l'application décrite ci-après d'empilement des pastilles encapsulées en trois dimensions.This can be done, for example, by peeling off the film. In an alternative embodiment, the rear face of the assembly, marked 28 in FIG. 3, is polished, that is to say the face opposite to face 27 to remove the film 2 and / or to thin the pellets 21 in order to reduce the thickness and size, which can be particularly advantageous in the application described below of stacking the pellets encapsulated in three dimensions.
Dans une variante de réalisation, on ne supprime pas le film élastique 2 qui permet alors d'isoler et/ou de protéger la face arrière 28 de la pastille.In an alternative embodiment, the elastic film 2 is not removed, which then makes it possible to isolate and / or protect the rear face 28 of the patch.
L'étape suivante, repérée 17, consiste à réaliser des connexions reliant chacun des conducteurs 23 à ce qui deviendra la face latérale des pastilles après séparation, ces connexions étant réalisées par métallisations sur la face supérieure 27 au dessus de l'intervalle inter-pastilles.The next step, marked 17, consists in making connections connecting each of the conductors 23 to what will become the lateral face of the pads after separation, these connections being made by metallizations on the upper face 27 above the inter-pad interval .
Les figures 4a et 4b illustrent cette étape, vue respectivement en coupe et de dessus.Figures 4a and 4b illustrate this step, seen respectively in section and from above.
La figure 4a représente les pastilles 21 avec leurs fils 23 noyés dans le matériau 25. La face supérieure 27 de l'ensemble porte des métallisations
30 au-dessus des fils 23, métallisations qui relient chacun des fils 23 à l'intervalle 26 entre pastilles.FIG. 4a represents the pellets 21 with their wires 23 embedded in the material 25. The upper face 27 of the assembly carries metallizations 30 above the wires 23, metallizations which connect each of the wires 23 to the gap 26 between pads.
Ces métallisations peuvent affecter différentes formes comme illustré sur la vue de dessus de la figure 4b : elles peuvent relier un fil 23 à la zone inter-pastille 26, relier ensemble deux fils 23 de pastilles différentes ou relier en outre un fil 23 à une zone 31 , utilisée ultérieurement pour le test des pastilles par exemple.These metallizations can take different forms as illustrated in the top view of FIG. 4b: they can connect a wire 23 to the inter-pad area 26, connect two wires 23 of different pads together or further connect a wire 23 to an area 31, used later for testing the pellets for example.
La réalisation des connexions 30 peut être faite par tout moyen connu, par exemple dépôt d'une couche métallique et gravure ultérieure de cette couche. Le dépôt peut être un dépôt métallique tel que or, nickel et or, nickel-cuivre et or, cuivre et or, effectué par exemple sous vide par pulvérisation cathodique, éventuellement rechargé par voie électrochimique.The connections 30 can be made by any known means, for example depositing a metal layer and subsequent etching of this layer. The deposit can be a metallic deposit such as gold, nickel and gold, nickel-copper and gold, copper and gold, carried out for example under vacuum by cathodic sputtering, optionally recharged electrochemically.
La gravure ultérieure peut être par exemple une photogravure. Dans une variante, on peut utiliser une photogravure dite inverse, c'est-à-dire laissant le métal partout sauf autour des conducteurs, celle-ci permettant de réaliser en outre un blindage électromagnétique.The subsequent engraving may for example be a photoengraving. In a variant, it is possible to use a so-called reverse photoengraving, that is to say leaving the metal everywhere except around the conductors, the latter making it possible in addition to produce electromagnetic shielding.
La dernière étape de la réalisation des pastilles encapsulées (étape 18, sur la figure 1 ) consiste en la séparation des pastilles. Cette séparation est réalisée par découpe du matériau 25 entre les pastilles, par exemple à l'aide d'une scie diamantée. On obtient alors des pastilles semi-conductrices enrobées chacune sur cinq de leurs faces dans un matériau isolant formant boîtier, ce dernier étant muni de connexions (métallisations 30), testable et manipulable.The last step in the production of the encapsulated pellets (step 18, in FIG. 1) consists in the separation of the pellets. This separation is carried out by cutting the material 25 between the pellets, for example using a diamond saw. Semiconductor wafers are then obtained, each coated on five of their faces in an insulating material forming a housing, the latter being provided with connections (metallizations 30), which can be tested and manipulated.
Lorsqu'on veut réaliser avec des pastilles ainsi encapsulées un empilement en trois dimensions (étape 19, figure 1 ), on dispose les boîtiers dans une glissière permettant d'aligner deux des faces latérales des boîtiers, simplifiant ainsi les problèmes de positionnement relatif des boîtiers. Entre les boîtiers sont disposées des couches de matériau adhésif, tel qu'une résine polymérisable par exemple. On presse ensuite l'ensemble et éventuellement on le polyméhse, de sorte à le solidariser.When we want to achieve with pellets thus encapsulated a three-dimensional stack (step 19, Figure 1), we have the boxes in a slide allowing to align two of the side faces of the boxes, thus simplifying the problems of relative positioning of the boxes . Between the housings are arranged layers of adhesive material, such as a polymerizable resin for example. Then the assembly is pressed and optionally it is polymerized, so as to secure it.
Ceci est illustré sur la figure 5 où on retrouve les pastilles 21 et leur matériau d'enrobage 25, séparés les uns des autres par une couche adhésive 32. Dans une variante de réalisation, on utilise, pour le film
élastique 2, un matériau adhésif -ou rendu adhésif par un traitement approprié- qu'on laisse en place, évitant ainsi l'interposition des couches 32. Sur chacune des faces extrêmes de l'empilement, on dispose en outre une couche de fermeture 42 non adhésive, qui est fixée par l'intermédiaire d'une couche 32. Dans une variante de réalisation (non représentée), les couches de fermeture 42 peuvent être adhésives sur l'une de leurs faces, évitant ainsi la couche 32. Les métallisations 30 relient chacun des conducteurs 23 vers la tranche 35 de l'empilement.This is illustrated in FIG. 5 where there are the pellets 21 and their coating material 25, separated from each other by an adhesive layer 32. In an alternative embodiment, the film is used elastic 2, an adhesive material - or made adhesive by an appropriate treatment - which is left in place, thus avoiding the interposition of the layers 32. On each of the end faces of the stack, there is also a closing layer 42 non-adhesive, which is fixed by means of a layer 32. In an alternative embodiment (not shown), the closure layers 42 can be adhesive on one of their faces, thus avoiding the layer 32. The metallizations 30 connect each of the conductors 23 to the edge 35 of the stack.
L'étape suivante (20, figure 1 ) consiste à interconnecter entre elles les différentes pastilles de l'empilement et à les relier, le cas échéant, à des plots, dits plots d'empilement, permettant leur connexion à des circuits extérieurs. Ces interconnexions sont réalisées sur les faces de l'empilement, par exemple comme décrit dans la demande de brevet français précitée. Sur la figure 5, on a représenté à titre d'exemple les différentes connexions 30 toutes reliées entre elles à l'aide d'une métallisation 33 disposée sur la face de l'empilement et se prolongeant (34) par exemple sur l'une ou sur les deux des faces extrêmes de l'empilement. Dans ce dernier cas, l'une des faces peut être utilisée pour le test alors que l'autre est utilisée pour le montage de l'empilement sur un circuit imprimé par exemple.The next step (20, FIG. 1) consists in interconnecting the various pellets of the stack and in connecting them, if necessary, to pads, called stack pads, allowing their connection to external circuits. These interconnections are made on the faces of the stack, for example as described in the aforementioned French patent application. In Figure 5, there is shown by way of example the different connections 30 all connected together using a metallization 33 disposed on the face of the stack and extending (34) for example on one or on both of the end faces of the stack. In the latter case, one of the faces can be used for the test while the other is used for mounting the stack on a printed circuit for example.
Dans une autre variante de réalisation (non représentée), on peut réaliser en même temps plusieurs empilements, ceux-ci étant éventuellement séparés les uns des autres en outre par un intercalaire non adhésif. Les interconnexions des pastilles par les faces latérales de l'empilement peuvent alors être réalisées de façon collective, simultanément pour tous les empilements.In another alternative embodiment (not shown), several stacks can be produced at the same time, these being optionally separated from each other in addition by a non-adhesive interlayer. The interconnections of the pellets by the lateral faces of the stack can then be carried out collectively, simultaneously for all the stacks.
Dans une autre variante de réalisation, on peut améliorer le refroidissement des pastilles en fonctionnement par l'insertion de drains thermiques entre les boîtiers, reliés éventuellement à un radiateur.In another alternative embodiment, the cooling of the pellets in operation can be improved by the insertion of thermal drains between the housings, possibly connected to a radiator.
Dans l'exemple représenté sur la figure 6, on retrouve les pastillesIn the example shown in Figure 6, we find the pellets
21 , leurs conducteurs 23 et le matériau d'enrobage 25. Les connexions 30 liant les fils 23 à l'une des faces latérales de la pastille sont dirigées de sorte à dégager l'une de ces faces, par exemple la face gauche sur la figure. Un drain thermique 38, couche métallique par exemple, en cuivre ou nitrure
d'aluminium, ou encore en diamant, est disposé entre chaque pastille 21 par l'intermédiaire d'une couche de colle 36. La face latérale gauche de l'empilement est par exemple collée, par l'intermédiaire d'une couche de colle 39, de préférence thermiquement conductrice, à un radiateur 37, lequel se trouve ainsi en contact thermique avec les drains 38. Pour la clarté du schéma, les couches de colle 36 n'ont pas été hachurées bien que vues en coupe.21, their conductors 23 and the coating material 25. The connections 30 connecting the wires 23 to one of the lateral faces of the patch are directed so as to release one of these faces, for example the left face on the figure. A heat sink 38, metallic layer for example, of copper or nitride aluminum, or even diamond, is placed between each pellet 21 by means of a layer of glue 36. The left lateral face of the stack is for example glued, by means of a layer of glue 39, preferably thermally conductive, to a radiator 37, which is thus in thermal contact with the drains 38. For clarity of the diagram, the layers of adhesive 36 have not been hatched although seen in section.
La figure 7 représente, vue en coupe, une variante de réalisation de l'étape 11 de la figure 1 , à savoir le câblage de conducteurs sur la rondelle.7 shows, in sectional view, an alternative embodiment of step 11 of Figure 1, namely the wiring of conductors on the washer.
Sur cette figure, on retrouve la rondelle 1 montée sur son film élastique 2 et portant des plots 22, sur lesquels on souhaite câbler des conducteurs 23. Selon cette variante, on munit la face supérieure de la rondelle 1 de morceaux de substrat du type circuit imprimé 39, de préférence au moins un par pastille, le circuit imprimé 39 étant fixé sur la rondelle à l'aide par exemple d'une couche de colle 40. Le circuit imprimé 39 porte au moins une métallisation 41. Selon cette variante, le conducteur 23 n'est plus coupé mais il est courbé de sorte à être connecté de plus à la métallisation 41 portée par le circuit imprimé 39. En outre, le conducteur 23 peut être connecté verticalement sur le plot 22 comme représenté sur les figures précédentes ou bien comme représenté sur la figure 7, connecté horizontalement comme sur la métallisation 41.In this figure, we find the washer 1 mounted on its elastic film 2 and carrying pads 22, on which one wishes to wire conductors 23. According to this variant, the upper face of the washer 1 is provided with pieces of substrate of the circuit type printed 39, preferably at least one per patch, the printed circuit 39 being fixed on the washer using for example a layer of glue 40. The printed circuit 39 carries at least one metallization 41. According to this variant, the conductor 23 is no longer cut but it is curved so as to be moreover connected to the metallization 41 carried by the printed circuit 39. In addition, the conductor 23 can be connected vertically to the pad 22 as shown in the preceding figures or as shown in FIG. 7, connected horizontally as in metallization 41.
Toutes les opérations ultérieures du procédé selon l'invention se déroulent de la même manière, le conducteur 23 étant coupé lors du polissage du matériau d'enrobage (étape 15) de sorte à venir affleurer comme précédemment sur la face supérieure de la pastille.All the subsequent operations of the method according to the invention take place in the same way, the conductor 23 being cut during the polishing of the coating material (step 15) so as to come to be flush as before on the upper face of the pellet.
Le procédé décrit ci-dessus, ainsi que les dispositifs obtenus, présentent un certain nombre d'avantages parmi lesquels le fait qu'il est possible de traiter un grand nombre de pastilles simultanément (toutes celles qui appartiennent à une même rondelle) et, ce, avec des techniques connues dans l'industrie des semi-conducteurs, facilement intégrables dans une chaîne de production de circuits semi-conducteurs, ce qui diminue considérablement le coût de la pastille encapsulée et qui permet, de par les techniques utilisées, d'obtenir des dimensions très réduites, notamment par
le matériau d'enrobage, qui peut représenter typiquement un accroissement de l'aire (de la pastille) de moins de 1 %. En outre, le mode d'encapsulation est bien adapté à un empilement "trois dimensions", réalisable collectivement et simplement, avec les avantages de coût qui en découlent.
The method described above, as well as the devices obtained, have a certain number of advantages among which the fact that it is possible to process a large number of pellets simultaneously (all those which belong to the same washer) and, this , with techniques known in the semiconductor industry, easily integrated into a production line for semiconductor circuits, which considerably reduces the cost of the encapsulated chip and which makes it possible, by the techniques used, to obtain very small dimensions, in particular by the coating material, which can typically represent an increase in the area (of the pellet) of less than 1%. In addition, the encapsulation mode is well suited to a "three-dimensional" stack, which can be carried out collectively and simply, with the cost advantages which result therefrom.
Claims
1. Procédé d'encapsulation de pastilles semi-conductrices, caractérisé par le fait qu'il comporte les étapes suivantes : - câblage de conducteurs (23) sur les plots de connexion (22) des pastilles (21 ), celles-ci étant contenues dans une même rondelle (1 ) de matériau semi-conducteur ;1. Method for encapsulating semiconductor wafers, characterized in that it comprises the following steps: - wiring of conductors (23) on the connection pads (22) of the wafers (21), these being contained in the same washer (1) of semiconductor material;
- sciage de la rondelle pour individualiser les pastilles, la rondelle étant fixée sur un film élastique (2) ; - étirement du film élastique de sorte à séparer les pastilles ;- sawing the washer to individualize the pellets, the washer being fixed on an elastic film (2); - stretching of the elastic film so as to separate the pellets;
- solidarisation et enrobage des conducteurs et pastilles à l'aide d'un matériau (25) électriquement isolant ;- Securing and coating of the conductors and pads using an electrically insulating material (25);
- polissage du matériau d'enrobage de sorte à faire affleurer les conducteurs ; - réalisation sur le matériau d'enrobage de connexions (30) reliant les conducteurs aux côtés des pastilles ;- polishing of the coating material so as to make the conductors flush; - Making connections on the coating material (30) connecting the conductors to the sides of the pellets;
- séparation des pastilles.- separation of the pellets.
2. Procédé selon la revendication 1 , caractérisé par le fait que le matériau d'enrobage (25) est une résine polymérisable.2. Method according to claim 1, characterized in that the coating material (25) is a polymerizable resin.
3. Procédé selon l'une des revendications précédentes, caractérisé par le fait qu'il comporte en outre, après l'étape de polissage, une étape de suppression du film élastique (2).3. Method according to one of the preceding claims, characterized in that it further comprises, after the polishing step, a step of removing the elastic film (2).
4. Pastille semi-conductrice (21 ) comportant des plots de connexion (22), caractérisée par le fait qu'elle comporte des conducteurs (23) connectés sur ses plots, que la pastille et ses conducteurs sont enrobés d'un matériau isolant (25), de telle sorte que les conducteurs affleurent la surface (27) du matériau isolant, et qu'elle comporte en outre sur cette dernière surface des connexions électriques (30) reliant les conducteurs aux côtés de la pastille.4. Semiconductor chip (21) comprising connection pads (22), characterized in that it includes conductors (23) connected to its pads, that the chip and its conductors are coated with an insulating material ( 25), so that the conductors are flush with the surface (27) of the insulating material, and that it further comprises on this latter surface electrical connections (30) connecting the conductors to the sides of the patch.
5. Pastille selon la revendication 4, caractérisée par le fait que chacun des conducteurs (23) est formé par un fil ou un ruban. 5. Pellet according to claim 4, characterized in that each of the conductors (23) is formed by a wire or a ribbon.
6. Procédé d'interconnexion de pastilles obtenues par le procédé selon la revendication 1 , caractérisé par le fait qu'il comporte en outre les étapes suivantes : - empilement des pastilles séparées et solidarisation de l'empilement ;6. Method for interconnecting pellets obtained by the method according to claim 1, characterized in that it further comprises the following steps: - stacking of the separate pellets and securing of the stack;
- réalisation de l'interconnexion des connexions des pastilles sur les faces de l'empilement.- Realization of the interconnection of the connections of the pads on the faces of the stack.
7. Procédé selon la revendication 6, caractérisé par le fait que l'empilement des pastilles séparées est réalisé en disposant entre les pastilles une couche d'un matériau susceptible de les faire adhérer l'une à l'autre.7. Method according to claim 6, characterized in that the stacking of the separate pellets is carried out by placing between the pellets a layer of a material capable of causing them to adhere to one another.
8. Dispositif comportant des pastilles selon la revendication 4, caractérisé par le fait que les pastilles (21 ) sont empilées et séparées par une couche (2, 32) d'un matériau assurant leur adhérence mutuelle et qu'il comporte en outre des interconnexions (33) portées par les faces de l'empilement, interconnectant les connexions (30) des pastilles. 8. Device comprising pellets according to claim 4, characterized in that the pellets (21) are stacked and separated by a layer (2, 32) of a material ensuring their mutual adhesion and that it also comprises interconnections (33) carried by the faces of the stack, interconnecting the connections (30) of the pads.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9304962 | 1993-04-27 | ||
FR9304962A FR2704690B1 (en) | 1993-04-27 | 1993-04-27 | Method for encapsulating semiconductor wafers, device obtained by this process and application to the interconnection of wafers in three dimensions. |
PCT/FR1994/000427 WO1994025987A1 (en) | 1993-04-27 | 1994-04-15 | Semiconductor chip encapsulation method, device produced by this method and its application to three dimensional chip interconnection |
Publications (1)
Publication Number | Publication Date |
---|---|
EP0647357A1 true EP0647357A1 (en) | 1995-04-12 |
Family
ID=9446488
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP94913654A Withdrawn EP0647357A1 (en) | 1993-04-27 | 1994-04-15 | Semiconductor chip encapsulation method, device produced by this method and its application to three dimensional chip interconnection |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP0647357A1 (en) |
JP (1) | JPH07509104A (en) |
FR (1) | FR2704690B1 (en) |
WO (1) | WO1994025987A1 (en) |
Families Citing this family (58)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000124354A (en) * | 1998-10-21 | 2000-04-28 | Matsushita Electric Ind Co Ltd | Chip-size package and its manufacture |
JP3235586B2 (en) * | 1999-02-25 | 2001-12-04 | 日本電気株式会社 | Semiconductor device and method of manufacturing semiconductor device |
JP3065309B1 (en) | 1999-03-11 | 2000-07-17 | 沖電気工業株式会社 | Method for manufacturing semiconductor device |
AU6001599A (en) * | 1999-10-01 | 2001-05-10 | Hitachi Limited | Semiconductor device and method of manufacture thereof |
DE10023539B4 (en) * | 2000-05-13 | 2009-04-09 | Micronas Gmbh | Method for producing a component |
ATE311604T1 (en) * | 2000-06-20 | 2005-12-15 | Nanonexus Inc | INTEGRATED CIRCUIT TEST SYSTEM |
US20020100600A1 (en) * | 2001-01-26 | 2002-08-01 | Albert Douglas M. | Stackable microcircuit layer formed from a plastic encapsulated microcircuit and method of making the same |
DE10137184B4 (en) | 2001-07-31 | 2007-09-06 | Infineon Technologies Ag | Method for producing an electronic component with a plastic housing and electronic component |
DE10149689A1 (en) | 2001-10-09 | 2003-04-10 | Philips Corp Intellectual Pty | Electrical/electronic component has lateral, rear cover materials at least partly of electrically conductive material and/or of electrically conductive material in layers but in connected manner |
WO2005027223A1 (en) * | 2003-09-09 | 2005-03-24 | Sanyo Electric Co., Ltd | Semiconductor module including circuit device and insulating film, method for manufacturing same, and application of same |
US7915085B2 (en) | 2003-09-18 | 2011-03-29 | Cree, Inc. | Molded chip fabrication method |
ATE522953T1 (en) * | 2003-09-30 | 2011-09-15 | Ibm | FLEXIBLE ASSEMBLY OF STACKED CHIPS |
US20050104027A1 (en) * | 2003-10-17 | 2005-05-19 | Lazarev Pavel I. | Three-dimensional integrated circuit with integrated heat sinks |
US7215018B2 (en) | 2004-04-13 | 2007-05-08 | Vertical Circuits, Inc. | Stacked die BGA or LGA component assembly |
US7217583B2 (en) | 2004-09-21 | 2007-05-15 | Cree, Inc. | Methods of coating semiconductor light emitting elements by evaporating solvent from a suspension |
EP1963743B1 (en) | 2005-12-21 | 2016-09-07 | Cree, Inc. | Lighting device |
US8969908B2 (en) | 2006-04-04 | 2015-03-03 | Cree, Inc. | Uniform emission LED package |
US7943952B2 (en) | 2006-07-31 | 2011-05-17 | Cree, Inc. | Method of uniform phosphor chip coating and LED package fabricated using method |
US7901989B2 (en) | 2006-10-10 | 2011-03-08 | Tessera, Inc. | Reconstituted wafer level stacking |
US7829438B2 (en) | 2006-10-10 | 2010-11-09 | Tessera, Inc. | Edge connect wafer level stacking |
US8513789B2 (en) | 2006-10-10 | 2013-08-20 | Tessera, Inc. | Edge connect wafer level stacking with leads extending along edges |
US7759166B2 (en) | 2006-10-17 | 2010-07-20 | Tessera, Inc. | Microelectronic packages fabricated at the wafer level and methods therefor |
US10295147B2 (en) | 2006-11-09 | 2019-05-21 | Cree, Inc. | LED array and method for fabricating same |
US7952195B2 (en) | 2006-12-28 | 2011-05-31 | Tessera, Inc. | Stacked packages with bridging traces |
US9024349B2 (en) | 2007-01-22 | 2015-05-05 | Cree, Inc. | Wafer level phosphor coating method and devices fabricated utilizing method |
US8232564B2 (en) | 2007-01-22 | 2012-07-31 | Cree, Inc. | Wafer level phosphor coating technique for warm light emitting diodes |
US9159888B2 (en) | 2007-01-22 | 2015-10-13 | Cree, Inc. | Wafer level phosphor coating method and devices fabricated utilizing method |
US8723332B2 (en) | 2007-06-11 | 2014-05-13 | Invensas Corporation | Electrically interconnected stacked die assemblies |
US10505083B2 (en) | 2007-07-11 | 2019-12-10 | Cree, Inc. | Coating method utilizing phosphor containment structure and devices fabricated using same |
WO2009017758A2 (en) * | 2007-07-27 | 2009-02-05 | Tessera, Inc. | Reconstituted wafer stack packaging with after-applied pad extensions |
CN101861646B (en) * | 2007-08-03 | 2015-03-18 | 泰塞拉公司 | Stack packages using reconstituted wafers |
US8043895B2 (en) | 2007-08-09 | 2011-10-25 | Tessera, Inc. | Method of fabricating stacked assembly including plurality of stacked microelectronic elements |
US8704379B2 (en) | 2007-09-10 | 2014-04-22 | Invensas Corporation | Semiconductor die mount by conformal die coating |
US9041285B2 (en) | 2007-12-14 | 2015-05-26 | Cree, Inc. | Phosphor distribution in LED lamps using centrifugal force |
US8167674B2 (en) | 2007-12-14 | 2012-05-01 | Cree, Inc. | Phosphor distribution in LED lamps using centrifugal force |
US8878219B2 (en) | 2008-01-11 | 2014-11-04 | Cree, Inc. | Flip-chip phosphor coating method and devices fabricated utilizing method |
US8178978B2 (en) | 2008-03-12 | 2012-05-15 | Vertical Circuits, Inc. | Support mounted electrically interconnected die assembly |
US8637883B2 (en) | 2008-03-19 | 2014-01-28 | Cree, Inc. | Low index spacer layer in LED devices |
US7863159B2 (en) | 2008-06-19 | 2011-01-04 | Vertical Circuits, Inc. | Semiconductor die separation method |
US9153517B2 (en) | 2008-05-20 | 2015-10-06 | Invensas Corporation | Electrical connector between die pad and z-interconnect for stacked die assemblies |
WO2009154761A1 (en) | 2008-06-16 | 2009-12-23 | Tessera Research Llc | Stacking of wafer-level chip scale packages having edge contacts |
CN102144176B (en) | 2008-09-08 | 2013-11-06 | 皇家飞利浦电子股份有限公司 | Production method of radiation detector with a stack of converter plates and interconnect layers |
FR2940521B1 (en) | 2008-12-19 | 2011-11-11 | 3D Plus | COLLECTIVE MANUFACTURING METHOD OF ELECTRONIC MODULES FOR SURFACE MOUNTING |
EP2406821A2 (en) | 2009-03-13 | 2012-01-18 | Tessera, Inc. | Stacked microelectronic assemblies having vias extending through bond pads |
JP5963671B2 (en) | 2009-06-26 | 2016-08-03 | インヴェンサス・コーポレーション | Electrical interconnection for stacked dies in zigzag configuration |
WO2011056668A2 (en) | 2009-10-27 | 2011-05-12 | Vertical Circuits, Inc. | Selective die electrical insulation additive process |
TWI544604B (en) | 2009-11-04 | 2016-08-01 | 英維瑟斯公司 | Stacked die assembly having reduced stress electrical interconnects |
US10546846B2 (en) | 2010-07-23 | 2020-01-28 | Cree, Inc. | Light transmission control for masking appearance of solid state light sources |
US9166126B2 (en) | 2011-01-31 | 2015-10-20 | Cree, Inc. | Conformally coated light emitting devices and methods for providing the same |
US9825002B2 (en) | 2015-07-17 | 2017-11-21 | Invensas Corporation | Flipped die stack |
US9871019B2 (en) | 2015-07-17 | 2018-01-16 | Invensas Corporation | Flipped die stack assemblies with leadframe interconnects |
US9490195B1 (en) | 2015-07-17 | 2016-11-08 | Invensas Corporation | Wafer-level flipped die stacks with leadframes or metal foil interconnects |
US9508691B1 (en) | 2015-12-16 | 2016-11-29 | Invensas Corporation | Flipped die stacks with multiple rows of leadframe interconnects |
US10566310B2 (en) | 2016-04-11 | 2020-02-18 | Invensas Corporation | Microelectronic packages having stacked die and wire bond interconnects |
US9595511B1 (en) | 2016-05-12 | 2017-03-14 | Invensas Corporation | Microelectronic packages and assemblies with improved flyby signaling operation |
US9728524B1 (en) | 2016-06-30 | 2017-08-08 | Invensas Corporation | Enhanced density assembly having microelectronic packages mounted at substantial angle to board |
CN110382216B (en) * | 2016-12-01 | 2021-10-26 | 洛桑联邦理工学院 | Reversible elasticity of engineered ductile or brittle films and products resulting from such engineering |
US10615057B1 (en) | 2018-12-11 | 2020-04-07 | Northrop Grumman Systems Corporation | Encapsulation process for semiconductor devices |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3677601D1 (en) * | 1986-08-22 | 1991-03-28 | Ibm Deutschland | INTEGRATED WIRING SYSTEM FOR VERY HIGHLY INTEGRATED CIRCUITS. |
US5098305A (en) * | 1987-05-21 | 1992-03-24 | Cray Research, Inc. | Memory metal electrical connector |
DE3719742A1 (en) * | 1987-06-12 | 1988-12-29 | Siemens Ag | Arrangement and method for separation of the semiconductor chips contained in a wafer whilst maintaining their order |
FR2645681B1 (en) * | 1989-04-07 | 1994-04-08 | Thomson Csf | DEVICE FOR VERTICALLY INTERCONNECTING PADS OF INTEGRATED CIRCUITS AND ITS MANUFACTURING METHOD |
WO1991000619A1 (en) * | 1989-06-30 | 1991-01-10 | Raychem Corporation | Flying leads for integrated circuits |
EP0577779A4 (en) * | 1991-03-27 | 1994-05-25 | Integrated System Assemblies | Multichip integrated circuit module and method of fabrication |
-
1993
- 1993-04-27 FR FR9304962A patent/FR2704690B1/en not_active Expired - Fee Related
-
1994
- 1994-04-15 EP EP94913654A patent/EP0647357A1/en not_active Withdrawn
- 1994-04-15 WO PCT/FR1994/000427 patent/WO1994025987A1/en not_active Application Discontinuation
- 1994-04-15 JP JP6523941A patent/JPH07509104A/en active Pending
Non-Patent Citations (1)
Title |
---|
See references of WO9425987A1 * |
Also Published As
Publication number | Publication date |
---|---|
WO1994025987A1 (en) | 1994-11-10 |
FR2704690B1 (en) | 1995-06-23 |
FR2704690A1 (en) | 1994-11-04 |
JPH07509104A (en) | 1995-10-05 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
WO1994025987A1 (en) | Semiconductor chip encapsulation method, device produced by this method and its application to three dimensional chip interconnection | |
EP0638933B1 (en) | Interconnection process of stacked semi-conductors chips and devices | |
US6548376B2 (en) | Methods of thinning microelectronic workpieces | |
EP0321340B1 (en) | Electronic-component support, especially for a memory card, and product so obtained | |
KR100651115B1 (en) | Semiconductor device and fabrication method thereof | |
US7727875B2 (en) | Grooving bumped wafer pre-underfill system | |
EP0565391B1 (en) | Method and device for encapsulation of three-dimensional semi-conductor chips | |
EP0584349B1 (en) | Process and device for three-dimensional interconnection of housings for electronic components | |
EP0490739B1 (en) | Interconnection method and device for three-dimensional integrated circuits | |
EP1715518B1 (en) | Device for protecting an electronic circuit | |
EP1715520A1 (en) | Device for protecting an electronic circuit | |
FR2917234A1 (en) | MULTI-COMPONENT DEVICE INTEGRATED IN A SEMICONDUCTOR MATRIX | |
WO2021099713A1 (en) | Method for manufacturing a functional chip suitable for being assembled to wire elements | |
EP0593330A1 (en) | 3D-interconnection method for electronic component housings and resulting 3D component | |
FR2857157A1 (en) | METHOD FOR INTERCONNECTING ACTIVE AND PASSIVE COMPONENTS AND HETEROGENEOUS COMPONENT WITH LOW THICKNESS THEREFROM | |
CN101226889B (en) | Reconfiguration line structure and manufacturing method thereof | |
US7476606B2 (en) | Eutectic bonding of ultrathin semiconductors | |
US5473192A (en) | Unitary silicon die module | |
CN111739805B (en) | Semiconductor packaging method and semiconductor packaging structure | |
FR3000604A1 (en) | ELECTRIC CIRCUIT AND METHOD FOR PRODUCING THE SAME | |
EP1724823A2 (en) | Method of connecting a semiconductor chip on an interconnection carrier | |
CN111599694B (en) | Semiconductor packaging method | |
WO2002047151A2 (en) | Method for making a semiconductor chip using an integrated rigidity layer | |
EP2040291A1 (en) | Method of gluing chips to a constraint substrate and method of placing a semi-conductor reading circuit under constraint | |
FR2953063A1 (en) | Electronic components encapsulation method, involves forming resin layer between welding balls, thinning another resin layer, gluing adhesive band on latter resin layer, and cutting structure into individual electronic chips |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
17P | Request for examination filed |
Effective date: 19941123 |
|
AK | Designated contracting states |
Kind code of ref document: A1 Designated state(s): BE DE FR GB IT |
|
17Q | First examination report despatched |
Effective date: 19960625 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN |
|
18D | Application deemed to be withdrawn |
Effective date: 19961106 |