JP3235586B2 - Semiconductor device and method of manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device and a method for manufacturing a semiconductor device. In particular, the present invention relates to a small and thin semiconductor device having higher stability and a method for manufacturing a semiconductor device having high productivity.

[Prior art]

In recent years, new types of semiconductor devices have been developed one after another in order to respond to demands for higher functionality, smaller size, lighter weight, and higher speed of electronic equipment. For example, not only semiconductor integrated circuits but also individual semiconductors such as diodes and transistors are required to be reduced in size and weight.

As an example of a conventional semiconductor device and its manufacturing process, FIG. 16 shows a semiconductor device and its manufacturing process disclosed in Japanese Patent Application Laid-Open No. 10-144631. FIG. 16 (a)
16 (b) (FIG. 16 (b) corresponds to A-
Semiconductor wafer 0 as shown in FIG.
Is adhered to the dicing tape 2 (see FIG. 16C), and then the semiconductor wafer 0 is subjected to full dicing vertically and horizontally to form individual semiconductor chips 81 (FIG. 16D).
reference). Next, expansion is performed while each semiconductor chip 81 is adhered to the dicing tape 2 to enlarge the interval between the semiconductor chips 81 (see FIG. 16E). next,
After bonding the metal plate 831 via an adhesive 841 onto the electrode portion 81A of each semiconductor chip 81 attached to the dicing tape 2 after the completion of the expansion (see FIG. 16 (f)), the dicing tape 2 is peeled off, and the electrode portion 81 of the semiconductor chip 1 on the opposite side of the electrode portion 81A.
Another metal plate 832 is bonded on B via an adhesive 842 (see FIG. 16G). Subsequently, an insulator 85 such as epoxy resin or glass is filled between the semiconductor chips 81 and cured and dried to protect the outer surface 81C of the semiconductor chip 81 (see FIG. 16H).
1. Each semiconductor device is obtained by fully dicing the portion of the metal plate 832 and the insulator 85 vertically and horizontally. (Figure 1
6 (i)).

On the other hand, the semiconductor device obtained by the process shown in FIG. 16 is mounted on a mounting board of an electronic device after being obtained by the above process. Next, a general process when a conventional electronic component such as a semiconductor device is mounted on a substrate will be described with reference to FIG.
Will be described with reference to the flowchart shown in FIG. As shown in FIG. 12, the mounting substrate 101 used in the mounting step has a mounting pattern 102 made of copper or the like. This mounting board 1
Electronic components including the semiconductor device and the like obtained by the process shown in FIG. In the mounting step, first, a screen mask 11 in which a mask opening 114 is formed on a mounting pattern 102 of a mounting substrate 101 shown in FIG.
2 is installed, and then a squeegee 1
13, the solder paste 111 is printed (see FIG. 13), and the solder paste 111 is printed on the mounting pattern 102.
After forming a layer of the solder paste 121 formed from No. 1 (see step S1 in FIGS. 13 and 11), an electronic component (the diode 122) including the semiconductor device is placed at a predetermined position on the mounting board 101 using a component mounting machine. And transistor 12
3) etc. are mounted (see step S2 in FIGS. 14 and 11). Subsequently, the mounting substrate 101 is placed in a solder reflow furnace to melt the solder paste 121, so that the external terminals of the electronic components and the like and the mounting pattern 102 provided below the solder paste 121 (see FIGS. 12 and 14).
Are connected (step S3 in FIG. 11).

[0005]

However, FIG.
The conventional semiconductor device manufacturing process disclosed in Japanese Patent Application Laid-Open No. Hei 10-44631 and the semiconductor device obtained by the above process have the following problems. In the manufacturing process of such a semiconductor device, as shown in FIGS. 16 (c) and 16 (d), the semiconductor wafers 0 are attached to a dicing tape 2 and then full dicing is performed vertically and horizontally so that each semiconductor chip 81 Is formed, expansion is performed while each semiconductor chip 81 is adhered to the dicing tape 2 to increase the interval between the semiconductor chips 81.
In this case, when the semiconductor chip 81 is diced on the dicing tape 2, as shown in FIG. 16 (j) (enlarged view of FIG. 16 (d)), a cut 87 is made to the dicing tape 2 by dicing. In the state where the cut 87 is present in the dicing tape 2 in this manner, FIG.
As shown in FIG. 6E, when the expanding is performed, the notch 87 is enlarged, so that the unevenness of the notch 87 formed in the dicing tape 2 is expanded. As a result, the semiconductor chip disposed on the dicing tape 2 is expanded. 81 is disturbed. When a semiconductor device is manufactured by using the semiconductor chip 81 in a state in which the arrangement is disturbed by the steps shown in FIG. 16F and thereafter, the shape of the finally obtained semiconductor device may vary and the appearance may be reduced. Even if it seems that there is no problem from the viewpoint, a device in which the semiconductor chip 81 is installed obliquely between the metal plate 831 and the metal plate 832, or an insulator which should be installed to protect the semiconductor chip 81 A large number of defective products such as devices that are not sufficiently formed on the outer surface of the semiconductor chip 81 cause a problem that the yield is low and the productivity is low.

On the other hand, the size of an electronic component that can be mounted on a mounting board by a component mounting machine is currently 0.6 mm wide × 0.3 m high.
m is the minimum, and widths and heights below this cannot be implemented. Therefore, it is difficult to mount the semiconductor device on the mounting board 101 as shown in FIG. In the manufacturing process of the semiconductor device shown in FIG. 16, since the size of the semiconductor device can be adjusted only by the thickness of the metal plates 831 and 832 and the thickness of the semiconductor chip 81 itself, the manufacturing cost may increase. In addition, there has been a problem that it is not possible to flexibly respond to a change in the package length.

[0007] The present invention has been made in view of the above-mentioned problems in the prior art. An object of the present invention is to provide a semiconductor device which is easy to handle at the time of mounting. Another object of the present invention is to provide a method for manufacturing a semiconductor device having excellent productivity. Another object of the present invention is to provide a semiconductor device that can flexibly set the size of the entire device according to the application.

[0008]

[0009]

[0010]

[0011]

[Summary of the present application first invention, bump wire is pulled out for length adjustment of the semiconductor device is installed on one principal surface, first in the one main surface and anti-facing A semiconductor chip having an outer surface covered with an insulator, which is in contact with the first metal electrode via a conductor, and a wire drawn out from the bump is connected to the second metal electrode via a second conductor; A semiconductor device comprising:

According to the semiconductor device of the first invention of the present application having the above configuration, a bump from which a wire for adjusting the length of the semiconductor device is drawn is provided on one main surface, and the one main surface is provided with a bump. > contact with the first metal electrode through the first conductive material with anti-facing, has a semiconductor chip in which the outer surface becomes covered with an insulator, wire drawn from the bump first through the second conductive material 2
By being connected to the metal electrode, the size of the semiconductor device itself can be set by changing the length of the wire, so that it is possible to flexibly cope with a change in the package length.

[0013] Further, the second invention of the present application has a feature in that two
The bumps installed the contact with via the first conductive material in the one main surface and the counter-face the first metal electrode, having a semiconductor chip which the outer surface becomes covered with an insulator, the bump is first respectively 2
2nd insulated from each other by the groove through the conductor of
A semiconductor device which is connected to a metal.

[0014] According to the semiconductor device of the present application the second invention having the above structure, the second bumps are disposed on one principal surface, a first metal electrode through the first conductive material in said one main surface and anti-facing And a semiconductor chip having an outer surface covered with an insulator, wherein each of the two bumps is connected to two second metal electrodes mutually insulated by a groove via a second conductive material. As a result, a device that is smaller and thinner than a conventional semiconductor device such as a transistor can be obtained.

Further, this application a third invention, the second bump wire for length adjustment has been pulled out of the semiconductor device is installed on one principal surface, a first conductive material in said one main surface and anti-facing A semiconductor chip having an outer surface covered with an insulator via a conductor, and wires drawn out from the two bumps are insulated from each other by a groove via a conductor. And a second metal electrode.

According to the semiconductor device of the third invention of the present application having the above configuration, according to the semiconductor device of the twelfth invention of the present application having the above configuration, a wire for adjusting the length of the semiconductor device is provided on one main surface. a second bump disposed drawn, the contact with the through the first conductive material in the one main surface and the counter-face the first metal electrode, having a semiconductor chip which the outer surface becomes covered with an insulator, the two The wires drawn from the bumps are connected to the two second metal electrodes mutually insulated by the grooves via the respective conductors, so that the size is further reduced as compared with a conventional semiconductor device such as a transistor. -It can be obtained as a thin device. Further, since the size of the semiconductor device itself can be set by changing the length of the wire, it is possible to flexibly cope with a change in the package length.

Further, the fourth invention of the present application is directed to a semiconductor device having a semiconductor device attached to a main surface of a plurality of semiconductor chips adhered to a metal foil provided on a dicing tape via a conductive material. Place the bump from which the wire for adjustment is pulled out,
Filling and curing an insulator to the extent that the tip of the wire is exposed between the semiconductor chips and on the semiconductor chip, placing another metal foil via another conductive material on the wire and the insulator, After bonding the wire and the another conductive material, the semiconductor device including the first metal electrode and the second metal electrode is cut by cutting a portion of the insulator between the left and right semiconductor chips. Forming a semiconductor device.

Further, the fifth invention of the present application provides two bumps on one main surface of a plurality of semiconductor chips bonded via a conductive material on a metal foil provided on a dicing tape,
An insulator is filled and cured to the extent that the two bumps are exposed between the semiconductor chips and on the semiconductor chip, and another metal foil is placed on the second bump and the insulator via another conductive material. Then, after bonding the second bump to another conductive material, a groove is formed from the another metal foil to the insulating film, and a portion of the insulating material sandwiched between a plurality of semiconductor chips on the left and right is cut. A semiconductor device including a first metal electrode and two second metal electrodes mutually insulated from each other.

The sixth invention of the present application is directed to a semiconductor device having a semiconductor device on one main surface of a plurality of semiconductor chips bonded via a conductive material on a metal foil provided on a dicing tape. The two bumps from which the wires for adjusting the length are drawn out are installed, and an insulating film is filled and hardened so that the tip of the wire is exposed between the semiconductor chips and on the semiconductor chip. After placing another metal foil via another conductor and bonding the wire and the another conductor, a groove is formed from the another metal foil to the insulator, and of the insulator, A semiconductor device comprising a first metal electrode and two second metal electrodes mutually insulated by cutting a portion sandwiched between a plurality of semiconductor chips on the left and right sides. Manufacturing method

[0020] The fourth to sixth applications of the present application having the above configuration.
According to the method for manufacturing a semiconductor device of any one of the inventions, a plurality of semiconductor devices can be manufactured at once,
Productivity can be improved.

Further, the seventh invention of the present application is the first invention of the present application.
3 , the ratio of the long side to the height of the semiconductor device is 1: 1.
To 4: 1.

According to the seventh aspect of the present invention, the ratio between the long side and the height is in the range of 1: 1 to 4: 1. Since it is possible to prevent the device from overturning, it is possible to obtain a device having high stability at the time of mounting. As a result, the yield can be increased, and the device can be manufactured at low cost.

[0023]

[0024]

[0025]

[0026]

[0027]

[0028]

[0029]

[0030]

[0031]

[0032]

[0033]

[0034]

[0035]

[0036]

[0037]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a method for manufacturing a semiconductor device and a semiconductor device according to an embodiment of the present invention will be described with reference to the drawings. It is only an example of a method and a semiconductor device. (First Embodiment) FIG. 1 is a view showing one manufacturing process of a semiconductor device according to the present embodiment. FIG. 4 is a perspective view showing a semiconductor device obtained by a manufacturing process of the semiconductor device according to the present embodiment.

The semiconductor device obtained by the manufacturing method according to the present embodiment is an individual semiconductor such as a diode, and is formed from a semiconductor wafer 0 as shown in FIG. FIG. 1B is a sectional view taken along the line AA ′ of FIG.
1B to 1J described later are all cross-sectional views along AA '. First, the semiconductor wafer 0 and the metal foil 3
1 is applied to the dicing tape 2 by applying pressure and heat via a conductor 41 (see FIG. 1C). The metal foil 31 is generally made of a material containing Al, Cu, Au, or an alloy containing them, and the conductive material 41 is a conductive resin such as Ag paste or Cu paste or a high melting point made of Sn, Pb, Ag, or the like. Use solder or the like. Subsequently, the semiconductor wafer 0 is provided with a cutting margin having a predetermined width, and is fully diced vertically and horizontally to a desired chip size to form each semiconductor chip 1 (see FIG. 1D). Here, the width of the cutting margin is set to such an extent that an insulator 5 having a thickness sufficient to protect the semiconductor chip 1 can be formed on the side surface 1C of the semiconductor chip 1 in a process after dicing. It is desirable that the width is such that the interval between the chips 1 can be provided. At present, due to the limitation of the dicing blade used when dicing the semiconductor wafer 0 simultaneously with the metal foil 31,
When dicing, the semiconductor wafer 0 has at least about 200 μm.
m is cut. However, in order to form the insulator 5 on the side surface 1C of the semiconductor chip 1 in order to protect the semiconductor chip 1, it is necessary that a gap of about 50 μm is further formed on both sides of the semiconductor chip 1. Therefore, it is desirable that the width of the cutting margin is provided at least about 300 μm (see FIG. 1E: FIG. 1E is an enlarged view of a dotted line portion in FIG. 1D). Further, in the present embodiment, the semiconductor chip 1 includes the metal foil 31 and the conductor 41.
Since the dicing tape 2 is placed on the dicing tape 2 through the dicing, no cut is made in the dicing tape 2 by the dicing (see FIG. 1E), and the arrangement of the semiconductor chips 1 is disturbed due to the cut. Nothing. As a result, the semiconductor chip 1 is correctly positioned at a predetermined position.
Can be manufactured semiconductor devices in which
The yield can be increased, and the productivity can be improved.

Next, an insulating material 5 made of epoxy resin, SiO2, or the like is filled between the semiconductor chips 1 and cured to protect the side surface portion 1C (see FIG. 1F). The insulator 5 is filled so that the electrode portion 1A provided on the side of the semiconductor chip 1 opposite to the connection surface with the conductor 41 is exposed without being buried in the insulator 5. Subsequently, the insulator 5
Then, another metal foil 32 having a conductor 42 formed on one main surface is placed on the semiconductor chip 1. In this case, the metal foil 32
The metal foil 32 is set so that the surface on which the conductive material 42 is formed is in contact with the insulator 5 and the semiconductor chip 1.
Then, the insulator 5 and the semiconductor chip 1 are bonded to the metal foil 32 through the metal foil 2 (see FIG. 1 (g)). The metal foil 32
The conductor 42 is made of the same material as the metal foil 31 and the conductor 41. Thereafter, platings 71 and 72 are applied to the surfaces of the metal foils 31 and 32 (see FIG. 1 (h)). The plating 71 and 72 include, in addition to solder plating including Sn and Pb, Au plating, Sn plating, Sn-B
i plating or Pd plating may be used. Also,
At this stage, instead of applying the platings 71 and 72 to the metal foils 31 and 32, the metal foils 31 and 32 having platings 71 and 72 formed in advance on the side opposite to the surface on which the conductors 41 and 42 are formed are used. You may. Finally, after the semiconductor chip 1 molded with the cured insulator 5 sandwiched between the metal foils 31 and 32 is fully diced vertically and horizontally in the portions of the metal foils 31 and 32 and the insulator 5 (FIG. 1 (i)). The semiconductor device is obtained by peeling off the dicing tape 2 (see FIG. 1 (j):
(Enlarged view of FIG. 1 (i)). In the semiconductor device according to the present embodiment, as shown in FIG. 1J, a first metal electrode 131 formed from a metal foil 31 via a conductor 41 is provided on one main surface of a semiconductor chip 1. A second metal electrode 132 formed of a metal foil 32 is provided on a side opposite to the one main surface via a conductive material 42, and the first metal electrode 131 and the second metal electrode 132 are provided.
Plating 71 and 72 are applied to the side surface of the metal electrode 132 opposite to the connection surface with the conductors 41 and 42.

Next, a method of manufacturing a semiconductor device and a semiconductor device according to a second embodiment of the present invention will be described with reference to the drawings. (Second Embodiment) FIG. 2 is a view showing one manufacturing process of a semiconductor device according to the present embodiment. FIG. 4 is a perspective view showing a semiconductor device obtained by a manufacturing process of the semiconductor device according to the present embodiment.

The semiconductor device obtained by the manufacturing method according to the present embodiment is formed from a semiconductor wafer 0 as shown in FIG. 1A, as in the first embodiment. FIG. 2A shows a semiconductor wafer 0 shown in FIG.
FIG. 2 is a sectional view taken along line AA ′ of FIG. 2 (a) to 2 (n) described later are all A-
It is sectional drawing in A '. The materials used in this embodiment are substantially the same as those used in the first embodiment of the present invention, and are shown in FIGS. 2 (i) to 2 (n) in this embodiment. Since the steps are substantially the same as those shown in FIGS. 1D to 1J according to the first embodiment of the present invention, detailed description will be omitted.

First, after the semiconductor wafer 0 is attached to the first dicing tape 12 (see FIG. 2B), the semiconductor wafer 0 is vertically extended to a predetermined position in a direction substantially perpendicular to the first dicing tape 12. Each semiconductor chip 1 is obtained by full dicing laterally. (See FIG. 2 (c)). next,
First dicing tape 1 in the semiconductor chip 1
(2) After attaching a new second dicing tape 12 'to the surface opposite to the attaching surface, the first dicing tape 12 is peeled off (see FIG. 2 (e)). Subsequently, the second dicing tape 12 'on which the semiconductor chips 1 are adhered is expanded to increase the distance between the semiconductor chips 1. In this embodiment, in order to attach the semiconductor chip 1 to a new second dicing tape 12 ′, the first dicing tape 12 is diced by dicing the semiconductor wafer 0 in the step shown in FIG. (See FIG. 2 (d)), the arrangement of the semiconductor chips 1 will not be disturbed by replacing with the second dicing tape 12 '. Thereby, a semiconductor device in which the semiconductor chip 1 is correctly placed at a predetermined position can be manufactured. Therefore, even if the semiconductor chip 1 is expanded in the step shown in FIG. 2G, the arrangement of the semiconductor chips 1 is disturbed as occurs in the conventional semiconductor chip manufacturing step shown in FIG. Since there is no occurrence, the yield can be increased and the productivity can be improved.

Subsequently, the metal foil 31 having one main surface provided with the conductive material 41 is placed on the semiconductor chip 1, and the conductive material 41 is provided.
After the semiconductor chip 1 and the metal foil 31 are adhered to each other via the substrate (see FIG. 2 (h)), the second dicing tape 12 'is formed.
Then, each semiconductor chip 1 is peeled off and turned over, and the surface of the metal foil 31 on which the semiconductor chip 1 is not mounted is attached to a second dicing tape 12 ′ (FIG. 2 (i)).
reference). Subsequently, in the steps shown in FIGS. 2 (j) to 2 (n), each semiconductor is manufactured in the same manner as the manufacturing steps according to the first embodiment shown in FIGS. 1 (f) to 1 (j). Chip 1
After filling and curing the insulator 5 in between (see FIG. 2 (j)), another metal foil 32 having the conductor 42 formed on one main surface is placed on the insulator 5 and the semiconductor chip 1. After that, the insulator 5 and the semiconductor chip 1 are bonded to the metal foil 32 via the conductor 42 (see FIG. 2 (k)), and thereafter, the surfaces of the metal foil 31 and the metal foil 32 are plated 71. 7
2 (see FIG. 2 (l)), and the semiconductor chip 1 molded with the cured insulator 5 sandwiched between the metal foils 31 and 32
After fully dicing the portion between the adjacent semiconductor chips 1 in the insulator 5 (see FIG. 2 (m)), the second dicing tape 12 'is peeled off to obtain a semiconductor device (FIG. 2 (n)). -See FIG. 2 (o)). As shown in FIGS. 2 (n) and 2 (o), a semiconductor device according to the present embodiment has a first main surface formed of a metal foil 31 with a conductor 41 interposed therebetween on one main surface of a semiconductor chip 1. A metal electrode 231 is provided, and a second metal electrode 232 formed from a metal foil 32 via a conductor 42 is provided on a side opposite to the one main surface, and a first metal electrode 231 and a second metal electrode 232 are provided. Plating 71 · on the side opposite to the connection surface with conductors 41 · 42
72.

A method of manufacturing a semiconductor device and a semiconductor device according to a third embodiment of the present invention will be described with reference to the drawings. (Third Embodiment) FIG. 3 is a diagram showing a semiconductor device manufacturing process according to the present embodiment. FIG. 4 is a perspective view showing a semiconductor device obtained by a manufacturing process of the semiconductor device according to the present embodiment.

The semiconductor device obtained by the manufacturing method according to this embodiment is similar to the semiconductor device according to the first embodiment described above.
It is formed from a semiconductor wafer 0 as shown in FIG. In addition, materials and the like used in this embodiment are substantially the same as the materials used in the first embodiment of the present invention. FIG. 3A is a cross-sectional view taken along the line AA ′ of the semiconductor wafer 0 shown in FIG. 1A, and is similar to FIG. 1B. Note that FIGS. 3A to 3M described later are all cross-sectional views taken along line AA ′. After the semiconductor wafer 0 is attached to the first dicing tape 12 (FIG.
(B), the first dicing is performed vertically and horizontally in a direction substantially perpendicular to the first dicing tape 12 to a predetermined position on the semiconductor wafer 0 to form the groove 8 (FIG. 3C).
reference). Here, up to a predetermined position of the semiconductor wafer 0,
Dicing horizontally means half dicing the semiconductor wafer 0. In other words, the half dicing does not completely divide the semiconductor wafer 0 but performs dicing halfway through the semiconductor wafer 0. As a result, a groove 8 is formed. Next, after the first dicing tape 12 is peeled off, the semiconductor wafer 0 shown in FIG. 3C is turned upside down, and is again adhered on the second dicing tape 12 ′. That is, the opening of the groove 8 is the second
(See FIG. 3D). Subsequently, the second dicing is performed without cutting the semiconductor wafer 0 vertically and horizontally from the opposite side of the portion where the groove 8 is formed, that is, from the cut surface B to the second dicing tape 12 ′. Each semiconductor chip 21 is formed (see FIG. 3E). Here, in the step shown in FIG.
When dicing is performed, only the edge of the semiconductor wafer 0 may be fully diced to form the cutting margin 22, and then the above-described steps (see FIGS. 3D and 3E) may be performed. Thus, the cutting margin 22 can be used as a positioning mark at the time of dicing in a later step, so that the semiconductor wafer 0 can be diced with high accuracy.

Next, the first dicing tape 12 to which the semiconductor wafer 0 is adhered is expanded to widen the interval between the semiconductor chips 21 (see FIG. 3F). Subsequently, a metal foil 31 having a conductive material 41 applied to one main surface is placed on the semiconductor chip 21, and the semiconductor chip 21 and the metal foil 31 are bonded via the conductive material 41 (FIG. 3).
(G)), the semiconductor chip 2 in the metal foil 31
2 is the second dicing tape 1
After being attached to 2 ′, each semiconductor chip 21 is peeled off from the first dicing tape 12. Here, each semiconductor chip 21 may be peeled off from the first dicing tape 12 and then turned over, and the surface of the metal foil 31 opposite to the installation surface of the semiconductor chip 21 may be attached to the second dicing tape 12 ′. (See FIG. 3 (h)). Subsequently, FIG.
In the steps shown in (i) to FIG.
After filling the insulator 5 between the semiconductor chips 21 and curing the same as in the manufacturing process according to the first embodiment shown in (f) to FIG. 1 (i) (see FIG. 3 (i)) The insulator 5
Then, another metal foil 32 having a conductor 42 formed on one main surface is placed on the semiconductor chip 21, and then the insulator 5, the semiconductor chip 21, and the metal foil 32 are interposed via the conductor 42.
(See FIG. 3 (j)), and then the metal foil 31
And plating 71 and 72 on the surface of the metal foil 32 (FIG. 3).
(K), the semiconductor chip 21 sandwiched between the metal foils 31 and 32 and molded with the cured insulator 5 is removed from the insulator 5.
After fully dicing the portion sandwiched between the adjacent semiconductor chips 21 (see FIGS. 3 (l) and 3 (m)), the second dicing tape 12 'is peeled off to obtain a semiconductor device (FIG. 3 (n)). )reference). In the semiconductor device according to the present embodiment, as shown in FIG. 3 (n), a first metal electrode 331 formed from a metal foil 31 via a conductor 41 is provided on one main surface of a semiconductor chip 21. A second metal electrode 332 formed of a metal foil 32 is provided on a side opposite to the one main surface via a conductor 42, and the first metal electrode 33
Plating 71 and 72 are applied to the side opposite to the surface of the first and second metal electrodes 332 connected to the conductors 41 and 42.

In the method of manufacturing a semiconductor device according to the present embodiment, as described above, the groove 8 is formed by dicing vertically and horizontally to a predetermined position on the semiconductor wafer 0, and then the semiconductor wafer 0 is removed. The semiconductor chips 21 are formed by turning over and pasting on the second dicing tape 12 ′, and further dicing the semiconductor wafer 0 vertically and horizontally. As a result, a cut is not formed in the dicing tape during dicing as in the conventional semiconductor device. For this reason, since the arrangement of the semiconductor chips 21 is not disturbed by the cuts, even if the semiconductor wafer 0 is expanded in a later step, the defective arrangement is caused by the further dislocation of the semiconductor chips 21. Can be reduced. This allows
Since a semiconductor device in which the semiconductor chip 1 is correctly placed at a predetermined position can be manufactured, the yield can be increased and the productivity can be improved.

4 (a) and 4 (b), respectively, by the manufacturing process of the semiconductor device according to the first and second embodiments of the present invention and the manufacturing process of the semiconductor device according to the present embodiment.
(B) As shown in FIG. 4C, a semiconductor device in which the ratio of the long side X to the height Z, X: Z is 1: 1 to 4: 1 is obtained (FIG. 4A). 4 (b) and 4 (c) are diagrams similar to FIGS. 1 (k), 2 (o) and 3 (n), respectively. Since the semiconductor device has such a long side X and a height Z, the semiconductor device can be prevented from tipping over when the semiconductor device is mounted on a mounting board. An apparatus with high stability can be obtained. As a result, the yield can be increased, and the device can be manufactured at low cost.

A method for manufacturing a semiconductor device and a semiconductor device according to another embodiment of the present invention will be described with reference to the drawings. (Fourth Embodiment) FIG. 5 is a sectional view showing a semiconductor device according to the present embodiment. FIG. 6 is a diagram illustrating one manufacturing process of the semiconductor device according to the present embodiment.

As shown in FIG. 5, the semiconductor device according to the present embodiment has a semiconductor chip 1 in which two bumps 542 are provided on the one main surface.
Are respectively in contact with the second metal electrodes 532 (second metal electrodes 5321 and 5322) via the second conductor 442, the second metal electrodes 5321 and 5322 are mutually insulated by the groove 543, and the semiconductor chip 1 is The side opposite to the one main surface is in contact with the metal electrode 531 via a first conductor 441 different from the second conductor 442, and the side of the semiconductor chip 1 is covered with an insulator 5. In the first metal electrodes 531 and 2, the second metal electrodes 5321 and 5322
Plating 71 and 72 are formed on the side opposite to the side on which the conductor 441 and the second conductor 442 are formed. Further, in the present embodiment, one principal surface refers to a surface of the semiconductor chip 1 on which the two bumps 542 are provided,
The one main surface and the opposite side are different from each other in the first chip of the semiconductor chip 1.
The surface in contact with the conductor 441. Here, the semiconductor chip 1 that has been diffused is used, and the second metal electrodes 532 (the second metal electrodes 5321 and 5321) of the first metal electrodes 531 and 2 are used.
322) is made of metal foils 31 and 32 (described later) containing Al, Cu, Au, or an alloy containing them, and the first conductive material 441 and the second conductive material 442 are made of Ag paste, Cu paste, or the like. Conductive resin or SnPbA
g of high melting point solder or the like is used. Also, the bump 54
2 is a ball bump made of Au or Cu, Sn, P
b, plating bumps made of Au or the like. The groove 543 has two second metal electrodes 532, that is, the second metal electrode 532.
The first and second metal electrodes 5322 are provided to insulate the first metal electrodes 5322 and the second metal electrodes 532 of the first metal electrodes 531 and 2 are provided with platings 71 and 72 as pre-soldering at the time of mounting. It has been subjected. This plating 71.7
As 2, solder plating containing Sn and Pb is used, or Au plating, Sn plating, Sn-Bi plating, or Pd plating is used. Also, the insulator 5
It is made of an insulating material such as epoxy resin and SiO2. As described above, since the semiconductor device according to the present embodiment has the above-described structure, it is possible to obtain a smaller and thinner device than a conventional semiconductor device such as a transistor. Can be.

Next, one manufacturing process of the semiconductor device as shown in FIG. 5 will be described with reference to FIG. Note that materials and the like used in this embodiment are substantially the same as those used in the first embodiment of the present invention. The diffusion-processed semiconductor wafer 0 is subjected to the same steps as the steps (see FIGS. 1A to 1C) obtained by the manufacturing steps described in the first embodiment of the present invention. , FIG.
As shown in FIGS. 6A to 6C, each semiconductor chip 1 is obtained on the dicing tape 2 with the metal foil 31 interposed therebetween. Note that a first conductor 441 made of the same material as the conductor 41 according to the above-described first embodiment of the present invention is provided between the metal foil 31 and each semiconductor chip 1. Next, two bumps 542 are provided for each semiconductor chip 1 on the electrode portion 51A of each semiconductor chip 1 (FIG. 6).
(See (d).) Here, the case where the two bumps 542 are ball bumps is shown. When the two bumps 542 are ball bumps, when the two bumps 542 are provided for each semiconductor chip 1, the dicing tape 2 is once peeled off from the state shown in FIG. 6) After moving up, after forming the ball bumps on the semiconductor chip 1, the semiconductor chip 1 is re-attached to the dicing tape 2 to obtain a state shown in FIG. On the other hand, when the second bump 542 is a plating bump, the plating bump is provided on the semiconductor wafer 0 before dicing the semiconductor wafer 0. After the step shown in FIG. 6D, the insulator 5 is filled between the semiconductor chips 1 and on the surface on which the second bump 542 is provided (see FIG. 6E). In this case, as shown in FIG.
When the second bump 542 is buried in the insulator 5,
The insulator 5 is ground until the bump 542 is exposed (see FIG. 6G). Subsequently, as in the manufacturing process (FIGS. 1 (g) to 1 (i)) according to the first embodiment described above, in the processes shown in FIGS. On the insulator 5 and the bump 542, the second conductive material 44 is formed on one main surface.
Another metal foil 32 on which 2 is formed is placed. For the second conductor 442, a material similar to that of the first conductor 441 is used. In this case, the metal foil 32 is provided so that the surface of the metal foil 32 on which the second conductor 442 is formed is in contact with the insulator 5 and the bump 542, and the insulator 5 is interposed via the second conductor 442.
After bonding the bump 542 and the metal foil 32, plating 71 and 72 is applied to the surfaces of the metal foil 31 and the metal foil 32.
After that, each semiconductor chip 1 of the insulator 5 is
The semiconductor chip 1 sandwiched between the metal foils 31 and 32 and molded with the insulator 5 is obtained by performing full dicing on the portion sandwiched between. At the same time, by forming a groove 543 from the metal foil 32 having the plating 72 on the surface to the insulator 5, two second metal electrodes 532 insulated from the metal foil 32, that is, the second metal electrode 532, are formed. The metal electrodes 5321 and 5322 are formed, and the first metal electrode 531 is obtained from the metal foil 31. Here, the groove 543 is formed to such a depth that the bottom does not reach the semiconductor chip 1 (see FIG. 6 (k): FIG. 6 (k) is an enlarged view of FIG. 6 (j)). Thus, a semiconductor device is obtained (see FIG. 6 (l): FIG. 6 (l) is a perspective view of the semiconductor device according to the present embodiment shown in FIG. 5). In the present embodiment,
FIGS. 6A to 6C show the steps of manufacturing the semiconductor device according to the first embodiment of the present invention (FIGS. 1A to 1C).
Although a semiconductor chip formed by using the same process as (c)) was used, a semiconductor device manufacturing process according to the second embodiment of the present invention (FIGS. FIG.
A semiconductor chip formed using (i)) or the manufacturing process (FIGS. 2A to 2H) of the semiconductor device according to the third embodiment of the present invention may be used.

A method of manufacturing a semiconductor device and a semiconductor device according to a fifth embodiment of the present invention will be described with reference to the drawings. (Fifth Embodiment) FIG. 7 is a sectional view showing a semiconductor device according to the present embodiment. FIG. 8 is a diagram illustrating one manufacturing process of the semiconductor device according to the present embodiment.

In the semiconductor device according to the present embodiment, as shown in FIG. 7, a bump 742 from which a wire 741 is drawn out is provided on one main surface, and a first conductor 441 is provided on a side opposite to the one main surface. And the semiconductor chip 1 whose outer surface is covered with the insulator 5 via the second conductor 442. The wire 741 is connected to the second metal electrode 732 via the second conductor 442. Become. In the first metal electrode 731 and the second metal electrode 732, platings 71 and 72 are formed on the side opposite to the surface on which the first conductor 441 and the second conductor 442 are formed. Further, in the present embodiment, one main surface refers to a surface of the semiconductor chip 1 on which the bumps 742 are provided, and a side opposite to the one main surface refers to another first conductive material 4 in the semiconductor chip 1.
The surface in contact with 41. Plating 71 and 72 are applied to the first metal electrode 731 and the second metal electrode 732 on the side opposite to the conductor installation surface to prevent corrosion. Wire 741
Is made of a conductive material such as a metal. The semiconductor chip 1, the first metal electrode 731, the second metal electrode 732,
The bump 742, the first conductor 441, the second conductor 442,
The platings 71 and 72, the insulator 5, and the like are formed using the same material as the semiconductor device according to the fourth embodiment of the present invention. As described above, since the semiconductor device according to the present embodiment has the above-described structure, the size and size of the semiconductor device can be reduced as compared with a conventional semiconductor device such as a transistor.
It can be obtained as a thin device. Further, since the size of the semiconductor device itself can be set by changing the length of the wire 741, it is possible to flexibly cope with a change in the package length.

Next, a manufacturing process of the semiconductor device shown in FIG. 7 will be described with reference to FIG. The semiconductor device shown in FIG. 7 is obtained by substantially the same manufacturing steps as those of the semiconductor device shown in FIG. In the present embodiment, a semiconductor device is manufactured using substantially the same materials as those used in the above-described fourth embodiment of the present invention.
That is, a process similar to the process (see FIGS. 1A to 1C) obtained by the manufacturing process shown in the above-described first embodiment of the present invention with respect to the diffused semiconductor wafer 0. Then, as shown in FIGS. 8A to 8C, each semiconductor chip 1 placed on the dicing tape 2 via the metal foil 31 is obtained. Note that a first conductor 441 is provided between the metal foil 31 and each semiconductor chip 1 as in the above-described first embodiment of the present invention. next,
After the bumps 742 are installed on the electrode portions 71A of the respective semiconductor chips 1, a wire 741 having a constant height is applied to each of the semiconductor chips 1 by applying wire bonding.
It is formed thereon (see FIG. 8D). Forming the wire 741 by applying wire bonding, in other words,
After bonding the bumps 742 on the respective semiconductor chips 1 using a wire bonder, a wire having a predetermined length is drawn out of the capillary and cut to form the wire 741. Next, the insulator 5 is filled between the semiconductor chips 1 and on the surface on which the wires 741 are provided (see FIG. 8E). Again,
Similarly to the fourth embodiment of the present invention, when the wire 741 is buried in the insulator 5 as shown in FIG. 8F, the insulator 5 is ground until the wire 741 is exposed (see FIG. 8F). 8 (g)). Subsequently, similarly to the manufacturing process (FIGS. 1 (g) to 1 (i)) according to the above-described first embodiment, in the processes shown in FIGS. On the insulator 5 and the wire 741, the second conductor 44 is formed on one main surface.
Another metal foil 32 on which 2 is formed is placed. in this case,
The metal foil 32 is set so that the surface of the metal foil 32 on which the second conductor 442 is formed is in contact with the insulator 5 and the wire 741, and the insulator 5 and the wire 741 are connected to the insulator 5 and the wire 741 via the second conductor 442. After bonding the metal foil 32, plating 71 and 72 are applied to the surfaces of the metal foil 31 and the metal foil 32,
Thereafter, by fully dicing the portion of the insulator 5 sandwiched between the semiconductor chips 1, the metal foil 31,
A semiconductor chip 1 sandwiched between 32 and molded with an insulator 5
Get. Thereby, the second metal electrode 73 is separated from the metal foil 32.
2 and the first metal electrode 731 is formed from the metal foil 31 (see FIG. 8 (k): FIG. 8 (k) is an enlarged view of FIG. 8 (j)). Through the above steps, a semiconductor device is obtained (FIG. 8).
(See (l): FIG. 8 (l) is a perspective view of the semiconductor device according to the present embodiment shown in FIG. 7). In this embodiment, as in the fourth embodiment of the present invention, FIG.
8A to 8C, the steps of manufacturing the semiconductor device according to the first embodiment of the present invention (FIGS. 1A to 1C).
Although the semiconductor chip 1 formed by using the same process as (c) is used, a semiconductor device manufacturing process according to the second embodiment of the present invention (FIG. 2A) is used instead of this process. 2A to 2I) or a semiconductor chip formed by using the semiconductor device manufacturing process according to the third embodiment of the present invention (FIGS. 2A to 2H). .

A method of manufacturing a semiconductor device and a semiconductor device according to a sixth embodiment of the present invention will be described with reference to the drawings. (Sixth Embodiment) FIG. 9 is a perspective view showing a semiconductor device according to the present embodiment. FIG. 10 is a diagram illustrating one manufacturing process of the semiconductor device according to the present embodiment.

As shown in FIG. 9, the semiconductor device according to the present embodiment has a semiconductor chip 1 in which two bumps 942 from which wires are drawn are provided on the one main surface.
Each of the wires 941 is connected to two second metal electrodes 932 (second metal electrodes 9321 and 932) via the second conductor 442.
22), the second metal electrode 9321 and the second metal electrode 9322 are insulated from each other by a groove 943, and the semiconductor chip 1 is connected to the second conductive material 4 on the side opposite to the one main surface.
The first metal electrode 9 via a first conductor 441 different from 42
31, the side surface of the semiconductor chip 1 is covered with the insulator 5. That is, a wire 941 is provided on each of the two bumps 942, and except for a portion connecting the second conductor 442 and the semiconductor chip 1 via these wires 941, the semiconductor device shown in FIG. It has a similar configuration. The wire 941 is made of a conductive material such as a metal such as Cu, Al, or Au or an alloy thereof,
The two wires 941 are formed at substantially the same height. As described above, in the semiconductor device according to the present embodiment, the wires 941 are provided on the two bumps 942, respectively, and the wires 941 are respectively connected to the two second metal electrodes 932 via the second conductors 442. By setting the length of the wire 941 to a desired length in advance, the thickness of the semiconductor chip 1, the first metal electrode 931 and the second metal electrode 932 is changed. Since the size of the semiconductor device can be set without the need, the semiconductor device can be obtained as a semiconductor device manufactured flexibly in response to a user's request.

Next, a manufacturing process of the semiconductor device shown in FIG. 9 will be described with reference to FIG. The semiconductor device shown in FIG. 9 is obtained by substantially the same manufacturing steps as those of the semiconductor device shown in FIG. Further, in the manufacturing process according to the present embodiment, substantially the same materials as those used in the above-described fourth embodiment of the present invention are used. That is, in the steps shown in FIGS. 10D to 10G, after the two bumps 942 are set on each semiconductor chip 1, a predetermined height is applied to each semiconductor chip 1 by applying wire bonding. Of the wire 941 to the bump 94
2 (see FIG. 10D). To form the wire 941 by applying wire bonding,
In other words, two bumps 942 are formed using a wire bonder.
Is bonded to each semiconductor chip 1, a wire having a predetermined length is drawn out from the capillary, and cut to form a wire 941.
Next, the insulator 5 is installed to such an extent that the tip of the wire 941 projects (see FIGS. 10 (f) and 10 (g)). The subsequent steps (FIGS. 10 (h) to 10 (k)) are substantially the same as the manufacturing steps (see FIGS. 6 (h) to 6 (k)) according to the fourth embodiment of the present invention. is there. Through the above steps,
A semiconductor device according to the present embodiment is obtained (see FIG. 10 (l): FIG. 10 (l) is a perspective view of the semiconductor device according to the present embodiment shown in FIG. 9). In this embodiment, as in the fourth and fifth embodiments of the present invention, FIG.
1A to FIG. 10C, the steps of manufacturing the semiconductor device according to the first embodiment of the present invention (FIGS. 1A to 1C).
Although the semiconductor chip 1 formed by using the same process as (c) is used, a semiconductor device manufacturing process according to the second embodiment of the present invention (FIG. 2A) is used instead of this process. 2A to 2I) or a semiconductor chip formed by using the semiconductor device manufacturing process according to the third embodiment of the present invention (FIGS. 2A to 2H). .

FIG. 6 (l) shows the manufacturing process of the semiconductor device according to the fourth, fifth, and sixth embodiments of the present invention.
As shown in FIGS. 8 (l) and 10 (l),
A semiconductor device in which the ratio of the long side X to the height Z, X: Z is 1: 1 to 4: 1 is obtained. Since the semiconductor device has such a long side X and a height Z, the semiconductor device can be prevented from tipping over when the semiconductor device is mounted on a mounting board. An apparatus with high stability can be obtained. As a result, the yield can be increased, and the device can be manufactured at low cost.

[Brief description of the drawings]

FIG. 1 is a view showing one manufacturing process of a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a view illustrating one manufacturing process of a semiconductor device according to a second embodiment of the present invention;

FIG. 3 is a view illustrating one manufacturing process of a semiconductor device according to a third embodiment of the present invention;

FIG. 4 is a perspective view showing a semiconductor device obtained by a manufacturing process of the semiconductor device according to the first, second, and third embodiments of the present invention.

FIG. 5 is a sectional view showing a semiconductor device according to a fourth embodiment of the present invention.

FIG. 6 is a view illustrating one manufacturing step of a semiconductor device according to a fourth embodiment of the present invention;

FIG. 7 is a sectional view showing a semiconductor device according to a fifth embodiment of the present invention.

FIG. 8 is a view showing one manufacturing step of a semiconductor device according to a fifth embodiment of the present invention.

FIG. 9 is a sectional view showing a semiconductor device according to a sixth embodiment of the present invention.

FIG. 10 is a view illustrating one manufacturing step of the semiconductor device according to the sixth embodiment of the present invention;

FIG. 11 is a flowchart illustrating an example of a mounting process when mounting the semiconductor devices of the related art and the present invention on a mounting board.

FIG. 12 is a diagram illustrating an example of a mounting process when the conventional and the semiconductor devices of the present invention are mounted on a mounting board.

FIG. 13 is a diagram illustrating an example of a mounting process when the conventional and the semiconductor devices of the present invention are mounted on a mounting board.

FIG. 14 is a diagram illustrating an example of a mounting process when mounting the semiconductor devices of the related art and the present invention on a mounting board.

FIG. 15 is a diagram illustrating an example of a mounting process when the conventional and the semiconductor devices of the present invention are mounted on a mounting board.

FIG. 16 is a view showing one manufacturing process of a conventional semiconductor device.

[Explanation of symbols]

 Reference Signs List 0 semiconductor wafer 1, 21, 81 semiconductor chip 1A, 51A, 71A electrode part 1C side part 2 dicing tape 5 insulator 7 cut 8 groove 12 first dicing tape 12 'second dicing tape 22 cutting margin 31.32 metal Foil 41/42 Conductor 71/72 Plating 81A / 81B Electrode part 81C Outer surface 85 Insulator 87 Cutout 101 Mounting substrate 102 Mounting pattern 111/121 Solder paste 112 Screen mask 113 Squeegee 114 Mask opening 122 Diode 123 Transistor 131 First Metal electrode 132 Second metal electrode 134 Mask opening 141 Adhesive 231 First metal electrode 232 Second metal electrode 331 First metal electrode 332 Second metal electrode 441 First conductor 442 Second conductor 531 First metal electrode 532 2nd metal electrode 5321/5322 2nd metal electrode 541 wire 542 2 bump 543 groove 731 1st metal electrode 732 2nd metal electrode 741 wire 742 bump 831/832 metal plate 841 ・ 842 adhesive 931 1st metal Electrode 932 2nd metal electrode 9321 9322 2nd metal electrode 941 Wire 942 2 Bump 943 Groove AA ′ Cross section B Cut surface X Long side Z Height

Continuation of front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 21/301

Claims (7)

(57) [Claims] 1. A bump from which a wire for adjusting the length of a semiconductor device is drawn is provided on one main surface, and a bump is provided opposite to the one main surface.
A semiconductor chip in contact with the first metal electrode on the opposite side via the first conductor, and having an outer surface covered with an insulator; and a wire drawn from the bump is connected to the second metal via the second conductor. A semiconductor device which is connected to an electrode. Wherein is installed a second bump on one main surface, the contact with the through the first conductive material in the one main surface and the counter-face the first metal electrode, made the outer surface covered with an insulator semiconductor A chip, wherein each of the two bumps is via a second conductor,
A semiconductor device, wherein the semiconductor device is connected to two second metal electrodes mutually insulated by a groove. 3. A second bumps wires for length adjustment has been pulled out of the semiconductor device is installed on one principal surface, first through the first conductive material in said one main surface <br/> anti face A second semiconductor chip which is in contact with the first metal electrode and whose outer surface is covered with an insulator, and wherein the wires drawn out from the second bumps are insulated from each other by the grooves via the respective conductors; A semiconductor device which is connected to a metal electrode. 4. A wire for adjusting the length of a semiconductor device is drawn out on one main surface of a plurality of semiconductor chips adhered via a conductive material onto a metal foil provided on a dicing tape. The bumps are placed, an insulator is filled between the semiconductor chips and on the semiconductor chip to the extent that the tip of the wire is exposed and cured, and another metal is interposed on the wire and the insulator via another conductor. After placing a foil and bonding the wire and the another conductor, the first metal electrode and the second metal electrode are cut by cutting a portion of the insulator between the left and right semiconductor chips. A method of manufacturing a semiconductor device, comprising forming individual semiconductor devices including the same. 5. A method according to claim 1, wherein two bumps are provided on one main surface of a plurality of semiconductor chips bonded via a conductive material on a metal foil provided on a dicing tape, and between the semiconductor chips and the semiconductor chips. An insulator is filled and cured to the extent that the two bumps are exposed, and another metal foil is placed on the second bump and the insulator via another conductive material, and separated from the second bump. After bonding with the conductive material, a groove is formed from the another metal foil to the insulating film, and a portion of the insulating material sandwiched between a plurality of semiconductor chips on the left and right sides is cut to form a first metal electrode and A method for manufacturing a semiconductor device, comprising forming individual semiconductor devices including two second metal electrodes that are insulated from each other. 6. A wire for adjusting the length of a semiconductor device is drawn out on one main surface of a plurality of semiconductor chips adhered via a conductive material onto a metal foil placed on a dicing tape. The two bumps are set, and the insulating film is filled and cured to such an extent that the tip of the wire is exposed between the semiconductor chips and on the semiconductor chip, and the insulating film is separately placed on the wire and the insulator via another conductive material. After placing the metal foil and bonding the wire and the another conductive material, a groove is formed from the another metal foil to the insulating material, and the left and right sides of the insulating material are sandwiched by a plurality of semiconductor chips. A method of manufacturing a semiconductor device, comprising forming an individual semiconductor device including a first metal electrode and two second metal electrodes insulated from each other by cutting the cut portion. 7. The semiconductor device according to claim 1, wherein a ratio between a long side and a height is 1: 1.
To 4: The semiconductor device of claims 1 to 3 any one characterized in that it is a 1.