JP3604108B2 - Manufacturing method of chip type optical semiconductor - Google Patents
Manufacturing method of chip type optical semiconductor Download PDFInfo
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- JP3604108B2 JP3604108B2 JP03192497A JP3192497A JP3604108B2 JP 3604108 B2 JP3604108 B2 JP 3604108B2 JP 03192497 A JP03192497 A JP 03192497A JP 3192497 A JP3192497 A JP 3192497A JP 3604108 B2 JP3604108 B2 JP 3604108B2
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H01L2924/01029—Copper [Cu]
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- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
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- Dicing (AREA)
- Light Receiving Elements (AREA)
Description
【0001】
【発明の属する技術分野】
本発明は、チップ型光半導体の製造方法に係り、特に発光ダイオード素子、フォトダイオード素子、フォトトランジスタ素子などの光半導体素子を基板の上に直接ダイボンドするタイプのチップ型光半導体の製造方法に関するものである。
【0002】
【従来の技術】
従来、この種のチップ型光半導体は、例えば図4及び図5に示したような工程で製造されていた。この製造方法では先ず光半導体ウエハ1をダイシングシート2に接着し(イ)、次いでダイシングシート2上の光半導体ウエハ1を枡目状にダイシングして各発光チップ3毎に分離する(ロ)。その後、発光チップ3を1個ずつ吸着し易いように、エキスパンド工程においてダイシングシート2を引っ張り、隣接する発光チップ3同士の間隔を空ける(ハ)。
【0003】
次の工程では、図5に示したように、吸着ノズルによって発光チップ3を1個ずつ基板4上に移動し、所定の電極上に導電性接着剤5を介してダイボンドする(ニ)。ダイボンドしたのち、基板4をキュア炉に通し、導電性接着剤5を溶融して基板4に発光チップ3を接合する。キュア炉から出した後に、発光チップ3の上面と基板4上の電極とを金属細線6でボンディングする(ホ)。そして、発光チップ3及び金属細線6を保護するために透光性樹脂7で基板4の全面を樹脂封止する(ヘ)。最後に、ダイシングマシーンによって封止樹脂7及び基板4を発光チップ3毎に枡目状に切断し、1個ずつのチップ型光半導体(チップ型発光ダイオード)8を得る(ト)。
【0004】
図6は、上記製造方法によって形成されたチップ型発光ダイオード8の拡大斜視図である。このチップ型発光ダイオード8は、基板4の表面に形成された電極4a,4b間に電流を流すことにより発光チップ3が発光する。
【0005】
【発明が解決しようとする課題】
しかしながら、上記従来のチップ型光半導体の製造方法にあっては、ダイシングした発光チップ3を1個ずつ基板4上に移し替え、各々位置合わせしてからダイボンドする工程と、ダイボンドした発光チップ3と基板4上の電極とを金属細線6を用いてワイヤボンディングする工程とが必要となっていたために、作業工程が面倒であると共に作業時間がかかってしまうという問題があった。
【0006】
そこで、本発明は半導体チップを基板上にダイボンドする工程を容易にすると共に、ダイボンドした発光チップのワイヤボンディング工程を省略することを目的としている。
【0007】
【課題を解決するための手段】
上記課題を解決するために、本発明に係るチップ型光半導体の製造方法は、電極が形成された第1の基板に導電性接着剤を介して光半導体ウエハをダイボンドする工程と、前記第1の基板に切れ目を入れながら光半導体ウエハを個別の発光チップ毎にダイシングする工程と、ダイシングした前記光半導体ウエハの上面に導電性接着剤を介して、電極が形成された第2の基板をダイボンドする工程と、前記ダイシングによって生じた各発光チップ間の隙間に透光性樹脂を充填して封止する工程と、前記第1の基板、光半導体ウエハ及び第2の基板を前記透光性樹脂の充填箇所に沿って再度ダイシングして、両端に電極を有する個別の発光チップを得る工程とを備えたことを特徴とする。
【0008】
また、上記第1の基板及び第2の基板は、導電性の基板もしくは表面に電極膜が形成された絶縁性の基板のいずれでも対象となる。導電性の基板としては、銅板やアルミニウム板のような金属基板が主であり、また絶縁性の基板としては、ガラスエポキシ板のような樹脂基板やポリエステルフィルム、ホリイミドフィルムのようなフレキシブル基板が主に利用される。
【0009】
【発明の実施の形態】
以下、添付図面に基づいて本発明に係るチップ型光半導体の製造方法を詳細に説明する。図1は本発明に係るチップ型光半導体の製造工程を示したものである。この製造工程では、先ず第1に、全面に電極が形成された第1の基板9の上面全体に導電性接着剤10を均一に塗布し、その上に光半導体ウエハ11を位置決めして載せる(イ)。次に、これをキュア炉に通して導電性接着剤10を硬化し、光半導体ウエハ11と第1の基板9とを接着する。この時、導電性接着剤10は、光半導体ウエハの全面に接着して全面電極を構成する。次のダイシング工程ではダイシングマシーンによって光半導体ウエハ11を枡目状に切断して発光チップ12毎に分割する(ロ)。この時、光半導体ウエハ11と導電性接着剤10及び第1の基板9まで切れ目を入れる。この時、第1の基板9は完全には切断しないように、ダイシングマシーンのブレードの深さを調整する。次いで、上記第1の基板9と同様に、全面に電極が形成された第2の基板13の全面に導電性接着剤10を塗布してから、発光チップ12の上に位置決めして載せ、再びキュア炉に通して導電性接着剤10を硬化し、発光チップ12と第2の基板13とを接着する(ハ)。そして、ダイシングによって発光チップ12同士の間に発生した隙間に透光性樹脂14を充填して発光チップ12の周囲を樹脂封止する(ニ)。透光性樹脂14はキュア炉に通すことで硬化する。なお、上記第1の基板9及び第2の基板13に、銅板やアルミニウム板のような金属板を用いた場合には基板の全面がそのまま電極となるが、ガラスエポキシ板やフレキシブルフィルムを基板とする場合には表面に銅箔などのパターンを形成することで電極とすることができる。
【0010】
次のダイシング工程では、上述のようにサンドイッチ構造となった第1の基板9、発光チップ12及び第2の基板13を、ダイシングマシーンによって発光チップ12毎に一緒に切断する(ホ)。このダイシングマシーンに使用されるブレードは、最初のダイシングの時よりも幅の薄いものが使用される。従って、発光チップ12の側面に樹脂封止した透光性樹脂14を残すことができ、発光チップ12の周囲を透光性樹脂14が取り囲んだチップ型光半導体(チップ型発光ダイオード)15が完成する。
【0011】
図2は、上記製造方法によって形成されたチップ型発光ダイオード15の拡大斜視図である。このチップ型発光ダイオード15は、第1の基板9の電極と発光チップ12の一方側の電極、及び第2の基板13の電極と発光チップ12の他方側の電極が、いずれも導電性接着剤10を介して電気的に接続されている。従って、第1の基板9と第2の基板13との間に電流を流すことにより発光チップ12が発光する。
【0012】
図3は、上記チップ型発光ダイオード15をマザーボード16上に実装した状態を示す断面図である。この場合、マザーボード16に対して第1及び第2の基板9,13が直交するようにチップ型発光ダイオード15を載置し、マザーボード16の表面に形成されたボード電極17a,17b上に第1の基板9及び第2の基板13の各端面を配置する。そして、両者を半田18でそれぞれ接続することにより、第1の基板9と第2の基板13との間に電流が流れ、発光チップ12が発光して上方及び基板9,13によって塞がれていない側方が光る。
【0013】
このように、上記実施例では光半導体ウエハ11を第1の基板9上に直接ダイボンドするので、従来のように発光チップを1個ずつ移し替えてダイボンドするのに比べて作業が極めて容易となる。また、上記実施例では第1の基板9と第2の基板13との間に電気を流すだけで発光チップを発光させることができ、従来のようなワイヤボンディング作業を省略することができた。
【0014】
【発明の効果】
以上説明したように、本発明に係るチップ型光半導体の製造方法によれば、光半導体ウエハを電極が形成された第1の基板及び第2の基板で挟んで形成しているので、前記第1の基板から第2の基板にかけて直接ダイシングすることによって、一対の電極で挟持された構造の発光チップを一括して大量生産することができる。また、前記第1の基板上に光半導体ウエハを接合した状態でダイシングして切り込みを入れた上で、第2の基板を接合し、前記切り込みを入れた箇所に透光性樹脂を充填し、この透光性樹脂が形成された箇所に沿ってダイシングを行っているため、ダイシング面が透光性樹脂で保護された発光チップを簡易に製造することができる。このように、本発明の製造方法によれば、少なくとも2回のダイシング工程を経ることによって、発光面となる側面が透光性樹脂で保護され、且つ一対の電極で挟持された構造の発光チップの生産が可能となる。
【図面の簡単な説明】
【図1】本発明に係るチップ型光半導体の製造工程図である。
【図2】本発明の製造方法により形成したチップ型発光ダイオードの斜視図である。
【図3】チップ型発光ダイオードのマザーボードへの実装状態を示す断面図である。
【図4】従来のチップ型光半導体の製造工程図である。
【図5】従来のチップ型光半導体の製造工程図である。
【図6】従来の製造方法により形成したチップ型発光ダイオードの斜視図である。
【符号の説明】
9 第1の基板
10 導電性接着剤
11 光半導体ウエハ
12 発光チップ
13 第2の基板
14 透光性樹脂
15 チップ型発光ダイオード(チップ型光半導体)[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method of manufacturing a chip-type optical semiconductor, and more particularly to light emitting diode element, photodiode elements, the type of method of manufacturing a chip-type light semiconductor optical semiconductor elements are die-bonded directly onto a substrate, such as a phototransistor element It is.
[0002]
[Prior art]
Conventionally, this type of chip-type optical semiconductor has been manufactured by the steps shown in FIGS. 4 and 5, for example. In this manufacturing method, first, the
[0003]
In the next step, as shown in FIG. 5, the
[0004]
FIG. 6 is an enlarged perspective view of the chip-type light emitting diode 8 formed by the above manufacturing method. In the chip type light emitting diode 8, the
[0005]
[Problems to be solved by the invention]
However, in the above-described conventional method for manufacturing a chip-type optical semiconductor, the steps of transferring the diced light-emitting
[0006]
Accordingly, it is an object of the present invention to facilitate the step of die-bonding a semiconductor chip on a substrate and to omit the wire bonding step of the die-bonded light emitting chip .
[0007]
[Means for Solving the Problems]
In order to solve the above-mentioned problems, a method of manufacturing a chip-type optical semiconductor according to the present invention includes a step of die-bonding an optical semiconductor wafer to a first substrate on which electrodes are formed via a conductive adhesive; Dicing the optical semiconductor wafer into individual light emitting chips while making a cut in the substrate, and die bonding the second substrate on which electrodes are formed on the upper surface of the diced optical semiconductor wafer via a conductive adhesive. And filling the gap between the light emitting chips generated by the dicing with a translucent resin, and sealing the first substrate, the optical semiconductor wafer and the second substrate with the translucent resin. Dicing again along the filled portion to obtain individual light emitting chips having electrodes at both ends.
[0008]
In addition, the first substrate and the second substrate are both a conductive substrate and an insulating substrate having an electrode film formed on a surface thereof . As the conductive substrate, a metal substrate such as a copper plate or an aluminum plate is mainly used, and as the insulating substrate, a resin substrate such as a glass epoxy plate or a flexible substrate such as a polyester film or a polyimide film is used. Mainly used.
[0009]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, a method for manufacturing a chip-type optical semiconductor according to the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 shows a manufacturing process of a chip type optical semiconductor according to the present invention. In this manufacturing process, first, the
[0010]
In the next dicing step, the
[0011]
FIG. 2 is an enlarged perspective view of the chip type
[0012]
FIG. 3 is a cross-sectional view showing a state where the chip-type
[0013]
As described above, in the above embodiment, since the
[0014]
【The invention's effect】
As described above, according to the method for manufacturing a chip-type optical semiconductor according to the present invention, the optical semiconductor wafer is formed between the first substrate and the second substrate on which the electrodes are formed. By directly dicing from the first substrate to the second substrate, it is possible to mass-produce light emitting chips having a structure sandwiched between a pair of electrodes. Further, after dicing and making a cut in a state in which the optical semiconductor wafer is bonded on the first substrate, the second substrate is bonded, and a portion where the cut is made is filled with a translucent resin. Since dicing is performed along the place where the light-transmitting resin is formed, a light-emitting chip whose dicing surface is protected by the light-transmitting resin can be easily manufactured. As described above, according to the manufacturing method of the present invention, the light emitting chip having a structure in which the side surface serving as the light emitting surface is protected by the translucent resin and is sandwiched between the pair of electrodes by performing at least two dicing steps Can be produced.
[Brief description of the drawings]
FIG. 1 is a manufacturing process diagram of a chip-type optical semiconductor according to the present invention.
FIG. 2 is a perspective view of a chip-type light emitting diode formed by the manufacturing method of the present invention.
FIG. 3 is a cross-sectional view showing a mounted state of a chip type light emitting diode on a motherboard.
FIG. 4 is a manufacturing process diagram of a conventional chip type optical semiconductor.
FIG. 5 is a manufacturing process diagram of a conventional chip type optical semiconductor.
FIG. 6 is a perspective view of a chip-type light emitting diode formed by a conventional manufacturing method.
[Explanation of symbols]
9
Claims (2)
前記第1の基板に切れ目を入れながら光半導体ウエハを個別の発光チップ毎にダイシングする工程と、 Dicing the optical semiconductor wafer into individual light emitting chips while making a cut in the first substrate;
ダイシングした前記光半導体ウエハの上面に導電性接着剤を介して、電極が形成された第2の基板をダイボンドする工程と、 A step of die-bonding a second substrate on which electrodes are formed on the upper surface of the diced optical semiconductor wafer via a conductive adhesive;
前記ダイシングによって生じた各発光チップ間の隙間に透光性樹脂を充填して封止する工程と、 A step of filling a gap between the respective light emitting chips generated by the dicing with a transparent resin and sealing the gap;
前記第1の基板、光半導体ウエハ及び第2の基板を前記透光性樹脂の充填箇所に沿って再度ダイシングして、両端に電極を有する個別の発光チップを得る工程とを備えたことを特徴とするチップ型光半導体の製造方法。 Dicing the first substrate, the optical semiconductor wafer, and the second substrate again along the translucent resin-filled portion to obtain individual light-emitting chips having electrodes at both ends. Of manufacturing a chip type optical semiconductor.
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JP03192497A JP3604108B2 (en) | 1997-02-17 | 1997-02-17 | Manufacturing method of chip type optical semiconductor |
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JP03192497A JP3604108B2 (en) | 1997-02-17 | 1997-02-17 | Manufacturing method of chip type optical semiconductor |
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JP3604108B2 true JP3604108B2 (en) | 2004-12-22 |
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JP3235586B2 (en) * | 1999-02-25 | 2001-12-04 | 日本電気株式会社 | Semiconductor device and method of manufacturing semiconductor device |
KR100420433B1 (en) * | 1999-12-30 | 2004-03-03 | 앰코 테크놀로지 코리아 주식회사 | Film adhesive for semiconductor package |
KR100444228B1 (en) * | 2001-12-27 | 2004-08-16 | 삼성전기주식회사 | Chip package and method of fabricating the same |
KR100401975B1 (en) * | 2001-12-27 | 2003-10-17 | 삼성전기주식회사 | Chip package and the method of fabricating the same |
JP5141076B2 (en) * | 2006-06-05 | 2013-02-13 | 株式会社デンソー | Semiconductor device |
DE102008014927A1 (en) | 2008-02-22 | 2009-08-27 | Osram Opto Semiconductors Gmbh | Method for producing a plurality of radiation-emitting components and radiation-emitting component |
JP5636557B2 (en) * | 2008-10-31 | 2014-12-10 | 旭化成エレクトロニクス株式会社 | Infrared sensor manufacturing method, infrared sensor, and quantum infrared gas concentration meter |
WO2011149009A1 (en) | 2010-05-28 | 2011-12-01 | オリンパス株式会社 | Cell sorter, cell sorting system, and cell sorting method |
JP5744905B2 (en) | 2010-11-19 | 2015-07-08 | オリンパス株式会社 | Biological sample preparation method |
EP2711683B1 (en) | 2011-05-20 | 2016-08-03 | Olympus Corporation | Method of manufacturing base sheet |
JP5996550B2 (en) | 2011-11-24 | 2016-09-21 | オリンパス株式会社 | Cell sorting device and cell sorting method |
JP6413460B2 (en) * | 2014-08-08 | 2018-10-31 | 日亜化学工業株式会社 | LIGHT EMITTING DEVICE AND LIGHT EMITTING DEVICE MANUFACTURING METHOD |
TWI651830B (en) * | 2015-02-17 | 2019-02-21 | 立昌先進科技股份有限公司 | Multifunctinal miniaturized smd electronic components and process for manufacturing the same |
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